]> git.ipfire.org Git - thirdparty/u-boot.git/blame - common/cmd_mp.c
Add cmd_process() to process commands in one place
[thirdparty/u-boot.git] / common / cmd_mp.c
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ec2b74ff 1/*
0e870980 2 * Copyright 2008-2009 Freescale Semiconductor, Inc.
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3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#include <common.h>
24#include <command.h>
25
26int
54841ab5 27cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ec2b74ff 28{
79679d80 29 unsigned long cpuid;
ec2b74ff 30
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31 if (argc < 3)
32 return cmd_usage(cmdtp);
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33
34 cpuid = simple_strtoul(argv[1], NULL, 10);
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35 if (!is_core_valid(cpuid)) {
36 printf ("Core num: %lu is not valid\n", cpuid);
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37 return 1;
38 }
39
40
41 if (argc == 3) {
47e26b1b 42 if (strncmp(argv[2], "reset", 5) == 0)
ec2b74ff 43 cpu_reset(cpuid);
47e26b1b 44 else if (strncmp(argv[2], "status", 6) == 0)
ec2b74ff 45 cpu_status(cpuid);
47e26b1b 46 else if (strncmp(argv[2], "disable", 7) == 0)
4194b366 47 return cpu_disable(cpuid);
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48 else
49 return cmd_usage(cmdtp);
50
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51 return 0;
52 }
53
54 /* 4 or greater, make sure its release */
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55 if (strncmp(argv[2], "release", 7) != 0)
56 return cmd_usage(cmdtp);
ec2b74ff 57
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58 if (cpu_release(cpuid, argc - 3, argv + 3))
59 return cmd_usage(cmdtp);
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60
61 return 0;
62}
63
64#ifdef CONFIG_PPC
65#define CPU_ARCH_HELP \
79679d80 66 " [args] : <pir> <r3> <r6>\n" \
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67 " pir - processor id (if writeable)\n" \
68 " r3 - value for gpr 3\n" \
ec2b74ff 69 " r6 - value for gpr 6\n" \
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70 "\n" \
71 " Use '-' for any arg if you want the default value.\n" \
79679d80 72 " Default for r3 is <num> and r6 is 0\n" \
ec2b74ff 73 "\n" \
79679d80 74 " When cpu <num> is released r4 and r5 = 0.\n" \
a89c33db 75 " r7 will contain the size of the initial mapped area"
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76#endif
77
78U_BOOT_CMD(
6d0f6bcf 79 cpu, CONFIG_SYS_MAXARGS, 1, cpu_cmd,
2fb2604d 80 "Multiprocessor CPU boot manipulation and release",
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81 "<num> reset - Reset cpu <num>\n"
82 "cpu <num> status - Status of cpu <num>\n"
4194b366 83 "cpu <num> disable - Disable cpu <num>\n"
a89c33db 84 "cpu <num> release <addr> [args] - Release cpu <num> at <addr> with [args]"
ec2b74ff 85#ifdef CPU_ARCH_HELP
a89c33db 86 "\n"
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87 CPU_ARCH_HELP
88#endif
a89c33db 89);