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Commit | Line | Data |
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c609719b WD |
1 | /* |
2 | * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
3 | * Andreas Heppel <aheppel@sysgo.de> | |
4 | * | |
5 | * (C) Copyright 2002 | |
6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
7 | * Wolfgang Grandegger, DENX Software Engineering, wg@denx.de. | |
8 | * | |
1a459660 | 9 | * SPDX-License-Identifier: GPL-2.0+ |
c609719b WD |
10 | */ |
11 | ||
12 | /* | |
13 | * PCI routines | |
14 | */ | |
15 | ||
16 | #include <common.h> | |
0098e179 | 17 | #include <bootretry.h> |
18d66533 | 18 | #include <cli.h> |
c609719b | 19 | #include <command.h> |
c609719b WD |
20 | #include <asm/processor.h> |
21 | #include <asm/io.h> | |
c609719b WD |
22 | #include <pci.h> |
23 | ||
c609719b WD |
24 | /* |
25 | * Follows routines for the output of infos about devices on PCI bus. | |
26 | */ | |
27 | ||
28 | void pci_header_show(pci_dev_t dev); | |
29 | void pci_header_show_brief(pci_dev_t dev); | |
30 | ||
31 | /* | |
32 | * Subroutine: pciinfo | |
33 | * | |
34 | * Description: Show information about devices on PCI bus. | |
6d0f6bcf | 35 | * Depending on the define CONFIG_SYS_SHORT_PCI_LISTING |
c609719b WD |
36 | * the output will be more or less exhaustive. |
37 | * | |
38 | * Inputs: bus_no the number of the bus to be scanned. | |
39 | * | |
40 | * Return: None | |
41 | * | |
42 | */ | |
43 | void pciinfo(int BusNum, int ShortPCIListing) | |
44 | { | |
45 | int Device; | |
46 | int Function; | |
47 | unsigned char HeaderType; | |
48 | unsigned short VendorID; | |
49 | pci_dev_t dev; | |
50 | ||
51 | printf("Scanning PCI devices on bus %d\n", BusNum); | |
52 | ||
53 | if (ShortPCIListing) { | |
54 | printf("BusDevFun VendorId DeviceId Device Class Sub-Class\n"); | |
55 | printf("_____________________________________________________________\n"); | |
56 | } | |
57 | ||
58 | for (Device = 0; Device < PCI_MAX_PCI_DEVICES; Device++) { | |
59 | HeaderType = 0; | |
60 | VendorID = 0; | |
61 | for (Function = 0; Function < PCI_MAX_PCI_FUNCTIONS; Function++) { | |
62 | /* | |
63 | * If this is not a multi-function device, we skip the rest. | |
64 | */ | |
65 | if (Function && !(HeaderType & 0x80)) | |
66 | break; | |
67 | ||
68 | dev = PCI_BDF(BusNum, Device, Function); | |
69 | ||
70 | pci_read_config_word(dev, PCI_VENDOR_ID, &VendorID); | |
71 | if ((VendorID == 0xFFFF) || (VendorID == 0x0000)) | |
72 | continue; | |
73 | ||
c7de829c | 74 | if (!Function) pci_read_config_byte(dev, PCI_HEADER_TYPE, &HeaderType); |
c609719b WD |
75 | |
76 | if (ShortPCIListing) | |
77 | { | |
78 | printf("%02x.%02x.%02x ", BusNum, Device, Function); | |
79 | pci_header_show_brief(dev); | |
80 | } | |
81 | else | |
82 | { | |
83 | printf("\nFound PCI device %02x.%02x.%02x:\n", | |
84 | BusNum, Device, Function); | |
85 | pci_header_show(dev); | |
86 | } | |
87 | } | |
88 | } | |
89 | } | |
90 | ||
c609719b WD |
91 | |
92 | /* | |
93 | * Subroutine: pci_header_show_brief | |
94 | * | |
95 | * Description: Reads and prints the header of the | |
53677ef1 | 96 | * specified PCI device in short form. |
c609719b WD |
97 | * |
98 | * Inputs: dev Bus+Device+Function number | |
99 | * | |
100 | * Return: None | |
101 | * | |
102 | */ | |
103 | void pci_header_show_brief(pci_dev_t dev) | |
104 | { | |
105 | u16 vendor, device; | |
106 | u8 class, subclass; | |
107 | ||
108 | pci_read_config_word(dev, PCI_VENDOR_ID, &vendor); | |
109 | pci_read_config_word(dev, PCI_DEVICE_ID, &device); | |
110 | pci_read_config_byte(dev, PCI_CLASS_CODE, &class); | |
111 | pci_read_config_byte(dev, PCI_CLASS_SUB_CODE, &subclass); | |
112 | ||
5d232d0e | 113 | printf("0x%.4x 0x%.4x %-23s 0x%.2x\n", |
c609719b | 114 | vendor, device, |
983eb9d1 | 115 | pci_class_str(class), subclass); |
c609719b WD |
116 | } |
117 | ||
118 | /* | |
119 | * Subroutine: PCI_Header_Show | |
120 | * | |
121 | * Description: Reads the header of the specified PCI device. | |
122 | * | |
123 | * Inputs: BusDevFunc Bus+Device+Function number | |
124 | * | |
125 | * Return: None | |
126 | * | |
127 | */ | |
128 | void pci_header_show(pci_dev_t dev) | |
129 | { | |
130 | u8 _byte, header_type; | |
131 | u16 _word; | |
132 | u32 _dword; | |
133 | ||
134 | #define PRINT(msg, type, reg) \ | |
135 | pci_read_config_##type(dev, reg, &_##type); \ | |
136 | printf(msg, _##type) | |
137 | ||
138 | #define PRINT2(msg, type, reg, func) \ | |
139 | pci_read_config_##type(dev, reg, &_##type); \ | |
140 | printf(msg, _##type, func(_##type)) | |
141 | ||
142 | pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type); | |
143 | ||
144 | PRINT (" vendor ID = 0x%.4x\n", word, PCI_VENDOR_ID); | |
145 | PRINT (" device ID = 0x%.4x\n", word, PCI_DEVICE_ID); | |
146 | PRINT (" command register = 0x%.4x\n", word, PCI_COMMAND); | |
147 | PRINT (" status register = 0x%.4x\n", word, PCI_STATUS); | |
148 | PRINT (" revision ID = 0x%.2x\n", byte, PCI_REVISION_ID); | |
149 | PRINT2(" class code = 0x%.2x (%s)\n", byte, PCI_CLASS_CODE, | |
983eb9d1 | 150 | pci_class_str); |
c609719b WD |
151 | PRINT (" sub class code = 0x%.2x\n", byte, PCI_CLASS_SUB_CODE); |
152 | PRINT (" programming interface = 0x%.2x\n", byte, PCI_CLASS_PROG); | |
153 | PRINT (" cache line = 0x%.2x\n", byte, PCI_CACHE_LINE_SIZE); | |
154 | PRINT (" latency time = 0x%.2x\n", byte, PCI_LATENCY_TIMER); | |
155 | PRINT (" header type = 0x%.2x\n", byte, PCI_HEADER_TYPE); | |
156 | PRINT (" BIST = 0x%.2x\n", byte, PCI_BIST); | |
157 | PRINT (" base address 0 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_0); | |
c609719b | 158 | |
7c7a23bd WD |
159 | switch (header_type & 0x03) { |
160 | case PCI_HEADER_TYPE_NORMAL: /* "normal" PCI device */ | |
161 | PRINT (" base address 1 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_1); | |
162 | PRINT (" base address 2 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_2); | |
163 | PRINT (" base address 3 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_3); | |
164 | PRINT (" base address 4 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_4); | |
165 | PRINT (" base address 5 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_5); | |
166 | PRINT (" cardBus CIS pointer = 0x%.8x\n", dword, PCI_CARDBUS_CIS); | |
167 | PRINT (" sub system vendor ID = 0x%.4x\n", word, PCI_SUBSYSTEM_VENDOR_ID); | |
168 | PRINT (" sub system ID = 0x%.4x\n", word, PCI_SUBSYSTEM_ID); | |
169 | PRINT (" expansion ROM base address = 0x%.8x\n", dword, PCI_ROM_ADDRESS); | |
170 | PRINT (" interrupt line = 0x%.2x\n", byte, PCI_INTERRUPT_LINE); | |
171 | PRINT (" interrupt pin = 0x%.2x\n", byte, PCI_INTERRUPT_PIN); | |
172 | PRINT (" min Grant = 0x%.2x\n", byte, PCI_MIN_GNT); | |
173 | PRINT (" max Latency = 0x%.2x\n", byte, PCI_MAX_LAT); | |
174 | break; | |
8bde7f77 | 175 | |
7c7a23bd WD |
176 | case PCI_HEADER_TYPE_BRIDGE: /* PCI-to-PCI bridge */ |
177 | ||
178 | PRINT (" base address 1 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_1); | |
c609719b WD |
179 | PRINT (" primary bus number = 0x%.2x\n", byte, PCI_PRIMARY_BUS); |
180 | PRINT (" secondary bus number = 0x%.2x\n", byte, PCI_SECONDARY_BUS); | |
181 | PRINT (" subordinate bus number = 0x%.2x\n", byte, PCI_SUBORDINATE_BUS); | |
182 | PRINT (" secondary latency timer = 0x%.2x\n", byte, PCI_SEC_LATENCY_TIMER); | |
183 | PRINT (" IO base = 0x%.2x\n", byte, PCI_IO_BASE); | |
184 | PRINT (" IO limit = 0x%.2x\n", byte, PCI_IO_LIMIT); | |
185 | PRINT (" secondary status = 0x%.4x\n", word, PCI_SEC_STATUS); | |
186 | PRINT (" memory base = 0x%.4x\n", word, PCI_MEMORY_BASE); | |
187 | PRINT (" memory limit = 0x%.4x\n", word, PCI_MEMORY_LIMIT); | |
188 | PRINT (" prefetch memory base = 0x%.4x\n", word, PCI_PREF_MEMORY_BASE); | |
189 | PRINT (" prefetch memory limit = 0x%.4x\n", word, PCI_PREF_MEMORY_LIMIT); | |
190 | PRINT (" prefetch memory base upper = 0x%.8x\n", dword, PCI_PREF_BASE_UPPER32); | |
191 | PRINT (" prefetch memory limit upper = 0x%.8x\n", dword, PCI_PREF_LIMIT_UPPER32); | |
192 | PRINT (" IO base upper 16 bits = 0x%.4x\n", word, PCI_IO_BASE_UPPER16); | |
193 | PRINT (" IO limit upper 16 bits = 0x%.4x\n", word, PCI_IO_LIMIT_UPPER16); | |
194 | PRINT (" expansion ROM base address = 0x%.8x\n", dword, PCI_ROM_ADDRESS1); | |
195 | PRINT (" interrupt line = 0x%.2x\n", byte, PCI_INTERRUPT_LINE); | |
196 | PRINT (" interrupt pin = 0x%.2x\n", byte, PCI_INTERRUPT_PIN); | |
197 | PRINT (" bridge control = 0x%.4x\n", word, PCI_BRIDGE_CONTROL); | |
7c7a23bd WD |
198 | break; |
199 | ||
200 | case PCI_HEADER_TYPE_CARDBUS: /* PCI-to-CardBus bridge */ | |
201 | ||
202 | PRINT (" capabilities = 0x%.2x\n", byte, PCI_CB_CAPABILITY_LIST); | |
203 | PRINT (" secondary status = 0x%.4x\n", word, PCI_CB_SEC_STATUS); | |
204 | PRINT (" primary bus number = 0x%.2x\n", byte, PCI_CB_PRIMARY_BUS); | |
205 | PRINT (" CardBus number = 0x%.2x\n", byte, PCI_CB_CARD_BUS); | |
206 | PRINT (" subordinate bus number = 0x%.2x\n", byte, PCI_CB_SUBORDINATE_BUS); | |
8bde7f77 | 207 | PRINT (" CardBus latency timer = 0x%.2x\n", byte, PCI_CB_LATENCY_TIMER); |
7c7a23bd WD |
208 | PRINT (" CardBus memory base 0 = 0x%.8x\n", dword, PCI_CB_MEMORY_BASE_0); |
209 | PRINT (" CardBus memory limit 0 = 0x%.8x\n", dword, PCI_CB_MEMORY_LIMIT_0); | |
210 | PRINT (" CardBus memory base 1 = 0x%.8x\n", dword, PCI_CB_MEMORY_BASE_1); | |
211 | PRINT (" CardBus memory limit 1 = 0x%.8x\n", dword, PCI_CB_MEMORY_LIMIT_1); | |
212 | PRINT (" CardBus IO base 0 = 0x%.4x\n", word, PCI_CB_IO_BASE_0); | |
213 | PRINT (" CardBus IO base high 0 = 0x%.4x\n", word, PCI_CB_IO_BASE_0_HI); | |
214 | PRINT (" CardBus IO limit 0 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_0); | |
215 | PRINT (" CardBus IO limit high 0 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_0_HI); | |
216 | PRINT (" CardBus IO base 1 = 0x%.4x\n", word, PCI_CB_IO_BASE_1); | |
217 | PRINT (" CardBus IO base high 1 = 0x%.4x\n", word, PCI_CB_IO_BASE_1_HI); | |
218 | PRINT (" CardBus IO limit 1 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_1); | |
219 | PRINT (" CardBus IO limit high 1 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_1_HI); | |
220 | PRINT (" interrupt line = 0x%.2x\n", byte, PCI_INTERRUPT_LINE); | |
221 | PRINT (" interrupt pin = 0x%.2x\n", byte, PCI_INTERRUPT_PIN); | |
222 | PRINT (" bridge control = 0x%.4x\n", word, PCI_CB_BRIDGE_CONTROL); | |
223 | PRINT (" subvendor ID = 0x%.4x\n", word, PCI_CB_SUBSYSTEM_VENDOR_ID); | |
224 | PRINT (" subdevice ID = 0x%.4x\n", word, PCI_CB_SUBSYSTEM_ID); | |
225 | PRINT (" PC Card 16bit base address = 0x%.8x\n", dword, PCI_CB_LEGACY_MODE_BASE); | |
226 | break; | |
8bde7f77 | 227 | |
7c7a23bd WD |
228 | default: |
229 | printf("unknown header\n"); | |
8bde7f77 | 230 | break; |
c609719b WD |
231 | } |
232 | ||
233 | #undef PRINT | |
234 | #undef PRINT2 | |
235 | } | |
236 | ||
237 | /* Convert the "bus.device.function" identifier into a number. | |
238 | */ | |
239 | static pci_dev_t get_pci_dev(char* name) | |
240 | { | |
241 | char cnum[12]; | |
242 | int len, i, iold, n; | |
243 | int bdfs[3] = {0,0,0}; | |
244 | ||
245 | len = strlen(name); | |
246 | if (len > 8) | |
247 | return -1; | |
248 | for (i = 0, iold = 0, n = 0; i < len; i++) { | |
249 | if (name[i] == '.') { | |
250 | memcpy(cnum, &name[iold], i - iold); | |
251 | cnum[i - iold] = '\0'; | |
252 | bdfs[n++] = simple_strtoul(cnum, NULL, 16); | |
253 | iold = i + 1; | |
254 | } | |
255 | } | |
256 | strcpy(cnum, &name[iold]); | |
257 | if (n == 0) | |
258 | n = 1; | |
259 | bdfs[n] = simple_strtoul(cnum, NULL, 16); | |
260 | return PCI_BDF(bdfs[0], bdfs[1], bdfs[2]); | |
261 | } | |
262 | ||
263 | static int pci_cfg_display(pci_dev_t bdf, ulong addr, ulong size, ulong length) | |
264 | { | |
265 | #define DISP_LINE_LEN 16 | |
266 | ulong i, nbytes, linebytes; | |
267 | int rc = 0; | |
268 | ||
269 | if (length == 0) | |
270 | length = 0x40 / size; /* Standard PCI configuration space */ | |
271 | ||
272 | /* Print the lines. | |
273 | * once, and all accesses are with the specified bus width. | |
274 | */ | |
275 | nbytes = length * size; | |
276 | do { | |
277 | uint val4; | |
278 | ushort val2; | |
279 | u_char val1; | |
280 | ||
281 | printf("%08lx:", addr); | |
282 | linebytes = (nbytes>DISP_LINE_LEN)?DISP_LINE_LEN:nbytes; | |
283 | for (i=0; i<linebytes; i+= size) { | |
284 | if (size == 4) { | |
285 | pci_read_config_dword(bdf, addr, &val4); | |
286 | printf(" %08x", val4); | |
287 | } else if (size == 2) { | |
288 | pci_read_config_word(bdf, addr, &val2); | |
289 | printf(" %04x", val2); | |
290 | } else { | |
291 | pci_read_config_byte(bdf, addr, &val1); | |
292 | printf(" %02x", val1); | |
293 | } | |
294 | addr += size; | |
295 | } | |
296 | printf("\n"); | |
297 | nbytes -= linebytes; | |
298 | if (ctrlc()) { | |
299 | rc = 1; | |
300 | break; | |
301 | } | |
302 | } while (nbytes > 0); | |
303 | ||
304 | return (rc); | |
305 | } | |
306 | ||
307 | static int pci_cfg_write (pci_dev_t bdf, ulong addr, ulong size, ulong value) | |
308 | { | |
309 | if (size == 4) { | |
310 | pci_write_config_dword(bdf, addr, value); | |
311 | } | |
312 | else if (size == 2) { | |
313 | ushort val = value & 0xffff; | |
314 | pci_write_config_word(bdf, addr, val); | |
315 | } | |
316 | else { | |
317 | u_char val = value & 0xff; | |
318 | pci_write_config_byte(bdf, addr, val); | |
319 | } | |
320 | return 0; | |
321 | } | |
322 | ||
323 | static int | |
324 | pci_cfg_modify (pci_dev_t bdf, ulong addr, ulong size, ulong value, int incrflag) | |
325 | { | |
326 | ulong i; | |
327 | int nbytes; | |
c609719b WD |
328 | uint val4; |
329 | ushort val2; | |
330 | u_char val1; | |
331 | ||
332 | /* Print the address, followed by value. Then accept input for | |
333 | * the next value. A non-converted value exits. | |
334 | */ | |
335 | do { | |
336 | printf("%08lx:", addr); | |
337 | if (size == 4) { | |
338 | pci_read_config_dword(bdf, addr, &val4); | |
339 | printf(" %08x", val4); | |
340 | } | |
341 | else if (size == 2) { | |
342 | pci_read_config_word(bdf, addr, &val2); | |
343 | printf(" %04x", val2); | |
344 | } | |
345 | else { | |
346 | pci_read_config_byte(bdf, addr, &val1); | |
347 | printf(" %02x", val1); | |
348 | } | |
349 | ||
e1bf824d | 350 | nbytes = cli_readline(" ? "); |
c609719b WD |
351 | if (nbytes == 0 || (nbytes == 1 && console_buffer[0] == '-')) { |
352 | /* <CR> pressed as only input, don't modify current | |
353 | * location and move to next. "-" pressed will go back. | |
354 | */ | |
355 | if (incrflag) | |
356 | addr += nbytes ? -size : size; | |
357 | nbytes = 1; | |
b26440f1 SG |
358 | /* good enough to not time out */ |
359 | bootretry_reset_cmd_timeout(); | |
c609719b WD |
360 | } |
361 | #ifdef CONFIG_BOOT_RETRY_TIME | |
362 | else if (nbytes == -2) { | |
363 | break; /* timed out, exit the command */ | |
364 | } | |
365 | #endif | |
366 | else { | |
367 | char *endp; | |
368 | i = simple_strtoul(console_buffer, &endp, 16); | |
369 | nbytes = endp - console_buffer; | |
370 | if (nbytes) { | |
c609719b WD |
371 | /* good enough to not time out |
372 | */ | |
b26440f1 | 373 | bootretry_reset_cmd_timeout(); |
c609719b WD |
374 | pci_cfg_write (bdf, addr, size, i); |
375 | if (incrflag) | |
376 | addr += size; | |
377 | } | |
378 | } | |
379 | } while (nbytes); | |
380 | ||
381 | return 0; | |
382 | } | |
383 | ||
384 | /* PCI Configuration Space access commands | |
385 | * | |
386 | * Syntax: | |
387 | * pci display[.b, .w, .l] bus.device.function} [addr] [len] | |
388 | * pci next[.b, .w, .l] bus.device.function [addr] | |
389 | * pci modify[.b, .w, .l] bus.device.function [addr] | |
390 | * pci write[.b, .w, .l] bus.device.function addr value | |
391 | */ | |
088f1b19 | 392 | static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
c609719b WD |
393 | { |
394 | ulong addr = 0, value = 0, size = 0; | |
395 | pci_dev_t bdf = 0; | |
396 | char cmd = 's'; | |
397 | ||
398 | if (argc > 1) | |
399 | cmd = argv[1][0]; | |
400 | ||
401 | switch (cmd) { | |
402 | case 'd': /* display */ | |
403 | case 'n': /* next */ | |
404 | case 'm': /* modify */ | |
405 | case 'w': /* write */ | |
406 | /* Check for a size specification. */ | |
407 | size = cmd_get_data_size(argv[1], 4); | |
408 | if (argc > 3) | |
409 | addr = simple_strtoul(argv[3], NULL, 16); | |
410 | if (argc > 4) | |
411 | value = simple_strtoul(argv[4], NULL, 16); | |
412 | case 'h': /* header */ | |
413 | if (argc < 3) | |
414 | goto usage; | |
415 | if ((bdf = get_pci_dev(argv[2])) == -1) | |
416 | return 1; | |
417 | break; | |
96d61603 JS |
418 | #ifdef CONFIG_CMD_PCI_ENUM |
419 | case 'e': | |
420 | break; | |
421 | #endif | |
c609719b WD |
422 | default: /* scan bus */ |
423 | value = 1; /* short listing */ | |
424 | bdf = 0; /* bus number */ | |
425 | if (argc > 1) { | |
426 | if (argv[argc-1][0] == 'l') { | |
427 | value = 0; | |
428 | argc--; | |
429 | } | |
430 | if (argc > 1) | |
431 | bdf = simple_strtoul(argv[1], NULL, 16); | |
432 | } | |
433 | pciinfo(bdf, value); | |
434 | return 0; | |
435 | } | |
436 | ||
437 | switch (argv[1][0]) { | |
438 | case 'h': /* header */ | |
439 | pci_header_show(bdf); | |
440 | return 0; | |
441 | case 'd': /* display */ | |
442 | return pci_cfg_display(bdf, addr, size, value); | |
96d61603 JS |
443 | #ifdef CONFIG_CMD_PCI_ENUM |
444 | case 'e': | |
445 | pci_init(); | |
446 | return 0; | |
447 | #endif | |
c609719b WD |
448 | case 'n': /* next */ |
449 | if (argc < 4) | |
450 | goto usage; | |
451 | return pci_cfg_modify(bdf, addr, size, value, 0); | |
452 | case 'm': /* modify */ | |
453 | if (argc < 4) | |
454 | goto usage; | |
455 | return pci_cfg_modify(bdf, addr, size, value, 1); | |
456 | case 'w': /* write */ | |
457 | if (argc < 5) | |
458 | goto usage; | |
459 | return pci_cfg_write(bdf, addr, size, value); | |
460 | } | |
461 | ||
462 | return 1; | |
463 | usage: | |
4c12eeb8 | 464 | return CMD_RET_USAGE; |
c609719b WD |
465 | } |
466 | ||
8bde7f77 WD |
467 | /***************************************************/ |
468 | ||
088f1b19 KP |
469 | #ifdef CONFIG_SYS_LONGHELP |
470 | static char pci_help_text[] = | |
8bde7f77 WD |
471 | "[bus] [long]\n" |
472 | " - short or long list of PCI devices on bus 'bus'\n" | |
96d61603 JS |
473 | #ifdef CONFIG_CMD_PCI_ENUM |
474 | "pci enum\n" | |
475 | " - re-enumerate PCI buses\n" | |
476 | #endif | |
8bde7f77 WD |
477 | "pci header b.d.f\n" |
478 | " - show header of PCI device 'bus.device.function'\n" | |
479 | "pci display[.b, .w, .l] b.d.f [address] [# of objects]\n" | |
480 | " - display PCI configuration space (CFG)\n" | |
481 | "pci next[.b, .w, .l] b.d.f address\n" | |
482 | " - modify, read and keep CFG address\n" | |
483 | "pci modify[.b, .w, .l] b.d.f address\n" | |
484 | " - modify, auto increment CFG address\n" | |
485 | "pci write[.b, .w, .l] b.d.f address value\n" | |
088f1b19 KP |
486 | " - write to CFG address"; |
487 | #endif | |
488 | ||
489 | U_BOOT_CMD( | |
490 | pci, 5, 1, do_pci, | |
491 | "list and access PCI Configuration Space", pci_help_text | |
8bde7f77 | 492 | ); |