]>
Commit | Line | Data |
---|---|---|
c609719b WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /* | |
25 | * This provides a bit-banged interface to the ethernet MII management | |
26 | * channel. | |
27 | */ | |
28 | ||
29 | #include <common.h> | |
30 | #include <miiphy.h> | |
5f184715 | 31 | #include <phy.h> |
c609719b | 32 | |
63ff004c MB |
33 | #include <asm/types.h> |
34 | #include <linux/list.h> | |
35 | #include <malloc.h> | |
36 | #include <net.h> | |
37 | ||
38 | /* local debug macro */ | |
63ff004c MB |
39 | #undef MII_DEBUG |
40 | ||
41 | #undef debug | |
42 | #ifdef MII_DEBUG | |
16a53238 | 43 | #define debug(fmt, args...) printf(fmt, ##args) |
63ff004c | 44 | #else |
16a53238 | 45 | #define debug(fmt, args...) |
63ff004c MB |
46 | #endif /* MII_DEBUG */ |
47 | ||
63ff004c MB |
48 | static struct list_head mii_devs; |
49 | static struct mii_dev *current_mii; | |
50 | ||
0daac978 MF |
51 | /* |
52 | * Lookup the mii_dev struct by the registered device name. | |
53 | */ | |
5f184715 | 54 | struct mii_dev *miiphy_get_dev_by_name(const char *devname) |
0daac978 MF |
55 | { |
56 | struct list_head *entry; | |
57 | struct mii_dev *dev; | |
58 | ||
59 | if (!devname) { | |
60 | printf("NULL device name!\n"); | |
61 | return NULL; | |
62 | } | |
63 | ||
64 | list_for_each(entry, &mii_devs) { | |
65 | dev = list_entry(entry, struct mii_dev, link); | |
66 | if (strcmp(dev->name, devname) == 0) | |
67 | return dev; | |
68 | } | |
69 | ||
0daac978 MF |
70 | return NULL; |
71 | } | |
72 | ||
d9785c14 MB |
73 | /***************************************************************************** |
74 | * | |
75 | * Initialize global data. Need to be called before any other miiphy routine. | |
76 | */ | |
5700bb63 | 77 | void miiphy_init(void) |
d9785c14 | 78 | { |
16a53238 | 79 | INIT_LIST_HEAD(&mii_devs); |
298035df | 80 | current_mii = NULL; |
d9785c14 MB |
81 | } |
82 | ||
5f184715 AF |
83 | static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg) |
84 | { | |
85 | unsigned short val; | |
86 | int ret; | |
87 | struct legacy_mii_dev *ldev = bus->priv; | |
88 | ||
89 | ret = ldev->read(bus->name, addr, reg, &val); | |
90 | ||
91 | return ret ? -1 : (int)val; | |
92 | } | |
93 | ||
94 | static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad, | |
95 | int reg, u16 val) | |
96 | { | |
97 | struct legacy_mii_dev *ldev = bus->priv; | |
98 | ||
99 | return ldev->write(bus->name, addr, reg, val); | |
100 | } | |
101 | ||
63ff004c MB |
102 | /***************************************************************************** |
103 | * | |
104 | * Register read and write MII access routines for the device <name>. | |
1cdabc4b | 105 | * This API is now deprecated. Please use mdio_alloc and mdio_register, instead. |
63ff004c | 106 | */ |
5700bb63 | 107 | void miiphy_register(const char *name, |
16a53238 | 108 | int (*read)(const char *devname, unsigned char addr, |
f915c931 | 109 | unsigned char reg, unsigned short *value), |
16a53238 | 110 | int (*write)(const char *devname, unsigned char addr, |
f915c931 | 111 | unsigned char reg, unsigned short value)) |
63ff004c | 112 | { |
63ff004c | 113 | struct mii_dev *new_dev; |
5f184715 | 114 | struct legacy_mii_dev *ldev; |
07c07635 LW |
115 | |
116 | BUG_ON(strlen(name) >= MDIO_NAME_LEN); | |
63ff004c | 117 | |
63ff004c | 118 | /* check if we have unique name */ |
5f184715 | 119 | new_dev = miiphy_get_dev_by_name(name); |
0daac978 MF |
120 | if (new_dev) { |
121 | printf("miiphy_register: non unique device name '%s'\n", name); | |
122 | return; | |
63ff004c MB |
123 | } |
124 | ||
125 | /* allocate memory */ | |
5f184715 AF |
126 | new_dev = mdio_alloc(); |
127 | ldev = malloc(sizeof(*ldev)); | |
63ff004c | 128 | |
5f184715 | 129 | if (new_dev == NULL || ldev == NULL) { |
16a53238 | 130 | printf("miiphy_register: cannot allocate memory for '%s'\n", |
298035df | 131 | name); |
63ff004c MB |
132 | return; |
133 | } | |
63ff004c MB |
134 | |
135 | /* initalize mii_dev struct fields */ | |
5f184715 AF |
136 | new_dev->read = legacy_miiphy_read; |
137 | new_dev->write = legacy_miiphy_write; | |
07c07635 LW |
138 | strncpy(new_dev->name, name, MDIO_NAME_LEN); |
139 | new_dev->name[MDIO_NAME_LEN - 1] = 0; | |
5f184715 AF |
140 | ldev->read = read; |
141 | ldev->write = write; | |
142 | new_dev->priv = ldev; | |
63ff004c | 143 | |
16a53238 | 144 | debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n", |
5f184715 | 145 | new_dev->name, ldev->read, ldev->write); |
63ff004c MB |
146 | |
147 | /* add it to the list */ | |
16a53238 | 148 | list_add_tail(&new_dev->link, &mii_devs); |
63ff004c MB |
149 | |
150 | if (!current_mii) | |
151 | current_mii = new_dev; | |
152 | } | |
153 | ||
5f184715 AF |
154 | struct mii_dev *mdio_alloc(void) |
155 | { | |
156 | struct mii_dev *bus; | |
157 | ||
158 | bus = malloc(sizeof(*bus)); | |
159 | if (!bus) | |
160 | return bus; | |
161 | ||
162 | memset(bus, 0, sizeof(*bus)); | |
163 | ||
164 | /* initalize mii_dev struct fields */ | |
165 | INIT_LIST_HEAD(&bus->link); | |
166 | ||
167 | return bus; | |
168 | } | |
169 | ||
170 | int mdio_register(struct mii_dev *bus) | |
171 | { | |
172 | if (!bus || !bus->name || !bus->read || !bus->write) | |
173 | return -1; | |
174 | ||
175 | /* check if we have unique name */ | |
176 | if (miiphy_get_dev_by_name(bus->name)) { | |
177 | printf("mdio_register: non unique device name '%s'\n", | |
178 | bus->name); | |
179 | return -1; | |
180 | } | |
181 | ||
182 | /* add it to the list */ | |
183 | list_add_tail(&bus->link, &mii_devs); | |
184 | ||
185 | if (!current_mii) | |
186 | current_mii = bus; | |
187 | ||
188 | return 0; | |
189 | } | |
190 | ||
191 | void mdio_list_devices(void) | |
192 | { | |
193 | struct list_head *entry; | |
194 | ||
195 | list_for_each(entry, &mii_devs) { | |
196 | int i; | |
197 | struct mii_dev *bus = list_entry(entry, struct mii_dev, link); | |
198 | ||
199 | printf("%s:\n", bus->name); | |
200 | ||
201 | for (i = 0; i < PHY_MAX_ADDR; i++) { | |
202 | struct phy_device *phydev = bus->phymap[i]; | |
203 | ||
204 | if (phydev) { | |
205 | printf("%d - %s", i, phydev->drv->name); | |
206 | ||
207 | if (phydev->dev) | |
208 | printf(" <--> %s\n", phydev->dev->name); | |
209 | else | |
210 | printf("\n"); | |
211 | } | |
212 | } | |
213 | } | |
214 | } | |
215 | ||
5700bb63 | 216 | int miiphy_set_current_dev(const char *devname) |
63ff004c | 217 | { |
63ff004c MB |
218 | struct mii_dev *dev; |
219 | ||
5f184715 | 220 | dev = miiphy_get_dev_by_name(devname); |
0daac978 MF |
221 | if (dev) { |
222 | current_mii = dev; | |
223 | return 0; | |
63ff004c MB |
224 | } |
225 | ||
5f184715 AF |
226 | printf("No such device: %s\n", devname); |
227 | ||
63ff004c MB |
228 | return 1; |
229 | } | |
230 | ||
5f184715 AF |
231 | struct mii_dev *mdio_get_current_dev(void) |
232 | { | |
233 | return current_mii; | |
234 | } | |
235 | ||
236 | struct phy_device *mdio_phydev_for_ethname(const char *ethname) | |
237 | { | |
238 | struct list_head *entry; | |
239 | struct mii_dev *bus; | |
240 | ||
241 | list_for_each(entry, &mii_devs) { | |
242 | int i; | |
243 | bus = list_entry(entry, struct mii_dev, link); | |
244 | ||
245 | for (i = 0; i < PHY_MAX_ADDR; i++) { | |
246 | if (!bus->phymap[i] || !bus->phymap[i]->dev) | |
247 | continue; | |
248 | ||
249 | if (strcmp(bus->phymap[i]->dev->name, ethname) == 0) | |
250 | return bus->phymap[i]; | |
251 | } | |
252 | } | |
253 | ||
254 | printf("%s is not a known ethernet\n", ethname); | |
255 | return NULL; | |
256 | } | |
257 | ||
5700bb63 | 258 | const char *miiphy_get_current_dev(void) |
63ff004c MB |
259 | { |
260 | if (current_mii) | |
261 | return current_mii->name; | |
262 | ||
263 | return NULL; | |
264 | } | |
265 | ||
ede16ea3 MF |
266 | static struct mii_dev *miiphy_get_active_dev(const char *devname) |
267 | { | |
268 | /* If the current mii is the one we want, return it */ | |
269 | if (current_mii) | |
270 | if (strcmp(current_mii->name, devname) == 0) | |
271 | return current_mii; | |
272 | ||
273 | /* Otherwise, set the active one to the one we want */ | |
274 | if (miiphy_set_current_dev(devname)) | |
275 | return NULL; | |
276 | else | |
277 | return current_mii; | |
278 | } | |
279 | ||
63ff004c MB |
280 | /***************************************************************************** |
281 | * | |
282 | * Read to variable <value> from the PHY attached to device <devname>, | |
283 | * use PHY address <addr> and register <reg>. | |
284 | * | |
1cdabc4b AF |
285 | * This API is deprecated. Use phy_read on a phy_device found via phy_connect |
286 | * | |
63ff004c MB |
287 | * Returns: |
288 | * 0 on success | |
289 | */ | |
f915c931 | 290 | int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, |
298035df | 291 | unsigned short *value) |
63ff004c | 292 | { |
5f184715 | 293 | struct mii_dev *bus; |
d67d5d52 | 294 | int ret; |
63ff004c | 295 | |
5f184715 | 296 | bus = miiphy_get_active_dev(devname); |
d67d5d52 | 297 | if (!bus) |
5f184715 | 298 | return 1; |
63ff004c | 299 | |
d67d5d52 AG |
300 | ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg); |
301 | if (ret < 0) | |
302 | return 1; | |
303 | ||
304 | *value = (unsigned short)ret; | |
305 | return 0; | |
63ff004c MB |
306 | } |
307 | ||
308 | /***************************************************************************** | |
309 | * | |
310 | * Write <value> to the PHY attached to device <devname>, | |
311 | * use PHY address <addr> and register <reg>. | |
312 | * | |
1cdabc4b AF |
313 | * This API is deprecated. Use phy_write on a phy_device found by phy_connect |
314 | * | |
63ff004c MB |
315 | * Returns: |
316 | * 0 on success | |
317 | */ | |
f915c931 | 318 | int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, |
298035df | 319 | unsigned short value) |
63ff004c | 320 | { |
5f184715 | 321 | struct mii_dev *bus; |
63ff004c | 322 | |
5f184715 AF |
323 | bus = miiphy_get_active_dev(devname); |
324 | if (bus) | |
325 | return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value); | |
63ff004c | 326 | |
0daac978 | 327 | return 1; |
63ff004c MB |
328 | } |
329 | ||
330 | /***************************************************************************** | |
331 | * | |
332 | * Print out list of registered MII capable devices. | |
333 | */ | |
16a53238 | 334 | void miiphy_listdev(void) |
63ff004c MB |
335 | { |
336 | struct list_head *entry; | |
337 | struct mii_dev *dev; | |
338 | ||
16a53238 AF |
339 | puts("MII devices: "); |
340 | list_for_each(entry, &mii_devs) { | |
341 | dev = list_entry(entry, struct mii_dev, link); | |
342 | printf("'%s' ", dev->name); | |
63ff004c | 343 | } |
16a53238 | 344 | puts("\n"); |
63ff004c MB |
345 | |
346 | if (current_mii) | |
16a53238 | 347 | printf("Current device: '%s'\n", current_mii->name); |
63ff004c MB |
348 | } |
349 | ||
c609719b WD |
350 | /***************************************************************************** |
351 | * | |
352 | * Read the OUI, manufacture's model number, and revision number. | |
353 | * | |
354 | * OUI: 22 bits (unsigned int) | |
355 | * Model: 6 bits (unsigned char) | |
356 | * Revision: 4 bits (unsigned char) | |
357 | * | |
1cdabc4b AF |
358 | * This API is deprecated. |
359 | * | |
c609719b WD |
360 | * Returns: |
361 | * 0 on success | |
362 | */ | |
5700bb63 | 363 | int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, |
c609719b WD |
364 | unsigned char *model, unsigned char *rev) |
365 | { | |
366 | unsigned int reg = 0; | |
8bf3b005 | 367 | unsigned short tmp; |
c609719b | 368 | |
16a53238 AF |
369 | if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) { |
370 | debug("PHY ID register 2 read failed\n"); | |
371 | return -1; | |
c609719b | 372 | } |
8bf3b005 | 373 | reg = tmp; |
c609719b | 374 | |
16a53238 | 375 | debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg); |
26c7bab8 | 376 | |
c609719b WD |
377 | if (reg == 0xFFFF) { |
378 | /* No physical device present at this address */ | |
16a53238 | 379 | return -1; |
c609719b WD |
380 | } |
381 | ||
16a53238 AF |
382 | if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) { |
383 | debug("PHY ID register 1 read failed\n"); | |
384 | return -1; | |
c609719b | 385 | } |
8bf3b005 | 386 | reg |= tmp << 16; |
16a53238 | 387 | debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg); |
26c7bab8 | 388 | |
298035df LJ |
389 | *oui = (reg >> 10); |
390 | *model = (unsigned char)((reg >> 4) & 0x0000003F); | |
391 | *rev = (unsigned char)(reg & 0x0000000F); | |
16a53238 | 392 | return 0; |
c609719b WD |
393 | } |
394 | ||
5f184715 | 395 | #ifndef CONFIG_PHYLIB |
c609719b WD |
396 | /***************************************************************************** |
397 | * | |
398 | * Reset the PHY. | |
1cdabc4b AF |
399 | * |
400 | * This API is deprecated. Use PHYLIB. | |
401 | * | |
c609719b WD |
402 | * Returns: |
403 | * 0 on success | |
404 | */ | |
5700bb63 | 405 | int miiphy_reset(const char *devname, unsigned char addr) |
c609719b WD |
406 | { |
407 | unsigned short reg; | |
ab5a0dcb | 408 | int timeout = 500; |
c609719b | 409 | |
16a53238 AF |
410 | if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { |
411 | debug("PHY status read failed\n"); | |
412 | return -1; | |
f89920c3 | 413 | } |
16a53238 AF |
414 | if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) { |
415 | debug("PHY reset failed\n"); | |
416 | return -1; | |
c609719b | 417 | } |
5653fc33 | 418 | #ifdef CONFIG_PHY_RESET_DELAY |
16a53238 | 419 | udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ |
5653fc33 | 420 | #endif |
c609719b WD |
421 | /* |
422 | * Poll the control register for the reset bit to go to 0 (it is | |
423 | * auto-clearing). This should happen within 0.5 seconds per the | |
424 | * IEEE spec. | |
425 | */ | |
c609719b | 426 | reg = 0x8000; |
ab5a0dcb | 427 | while (((reg & 0x8000) != 0) && timeout--) { |
8ef583a0 | 428 | if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { |
ab5a0dcb SR |
429 | debug("PHY status read failed\n"); |
430 | return -1; | |
c609719b | 431 | } |
ab5a0dcb | 432 | udelay(1000); |
c609719b WD |
433 | } |
434 | if ((reg & 0x8000) == 0) { | |
16a53238 | 435 | return 0; |
c609719b | 436 | } else { |
16a53238 AF |
437 | puts("PHY reset timed out\n"); |
438 | return -1; | |
c609719b | 439 | } |
16a53238 | 440 | return 0; |
c609719b | 441 | } |
5f184715 | 442 | #endif /* !PHYLIB */ |
c609719b | 443 | |
c609719b WD |
444 | /***************************************************************************** |
445 | * | |
71bc6e64 | 446 | * Determine the ethernet speed (10/100/1000). Return 10 on error. |
c609719b | 447 | */ |
5700bb63 | 448 | int miiphy_speed(const char *devname, unsigned char addr) |
c609719b | 449 | { |
71bc6e64 | 450 | u16 bmcr, anlpar; |
c609719b | 451 | |
6fb6af6d | 452 | #if defined(CONFIG_PHY_GIGE) |
71bc6e64 LJ |
453 | u16 btsr; |
454 | ||
455 | /* | |
456 | * Check for 1000BASE-X. If it is supported, then assume that the speed | |
457 | * is 1000. | |
458 | */ | |
16a53238 | 459 | if (miiphy_is_1000base_x(devname, addr)) |
71bc6e64 | 460 | return _1000BASET; |
16a53238 | 461 | |
71bc6e64 LJ |
462 | /* |
463 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. | |
464 | */ | |
465 | /* Check for 1000BASE-T. */ | |
16a53238 AF |
466 | if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { |
467 | printf("PHY 1000BT status"); | |
71bc6e64 LJ |
468 | goto miiphy_read_failed; |
469 | } | |
470 | if (btsr != 0xFFFF && | |
16a53238 | 471 | (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) |
71bc6e64 | 472 | return _1000BASET; |
6fb6af6d | 473 | #endif /* CONFIG_PHY_GIGE */ |
855a496f | 474 | |
a56bd922 | 475 | /* Check Basic Management Control Register first. */ |
16a53238 AF |
476 | if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { |
477 | printf("PHY speed"); | |
71bc6e64 | 478 | goto miiphy_read_failed; |
c609719b | 479 | } |
a56bd922 | 480 | /* Check if auto-negotiation is on. */ |
8ef583a0 | 481 | if (bmcr & BMCR_ANENABLE) { |
a56bd922 | 482 | /* Get auto-negotiation results. */ |
16a53238 AF |
483 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
484 | printf("PHY AN speed"); | |
71bc6e64 | 485 | goto miiphy_read_failed; |
a56bd922 | 486 | } |
8ef583a0 | 487 | return (anlpar & LPA_100) ? _100BASET : _10BASET; |
a56bd922 WD |
488 | } |
489 | /* Get speed from basic control settings. */ | |
8ef583a0 | 490 | return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET; |
a56bd922 | 491 | |
5f841959 | 492 | miiphy_read_failed: |
16a53238 | 493 | printf(" read failed, assuming 10BASE-T\n"); |
71bc6e64 | 494 | return _10BASET; |
c609719b WD |
495 | } |
496 | ||
c609719b WD |
497 | /***************************************************************************** |
498 | * | |
71bc6e64 | 499 | * Determine full/half duplex. Return half on error. |
c609719b | 500 | */ |
5700bb63 | 501 | int miiphy_duplex(const char *devname, unsigned char addr) |
c609719b | 502 | { |
71bc6e64 | 503 | u16 bmcr, anlpar; |
c609719b | 504 | |
6fb6af6d | 505 | #if defined(CONFIG_PHY_GIGE) |
71bc6e64 LJ |
506 | u16 btsr; |
507 | ||
508 | /* Check for 1000BASE-X. */ | |
16a53238 | 509 | if (miiphy_is_1000base_x(devname, addr)) { |
71bc6e64 | 510 | /* 1000BASE-X */ |
16a53238 AF |
511 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
512 | printf("1000BASE-X PHY AN duplex"); | |
71bc6e64 LJ |
513 | goto miiphy_read_failed; |
514 | } | |
515 | } | |
516 | /* | |
517 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. | |
518 | */ | |
519 | /* Check for 1000BASE-T. */ | |
16a53238 AF |
520 | if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { |
521 | printf("PHY 1000BT status"); | |
71bc6e64 LJ |
522 | goto miiphy_read_failed; |
523 | } | |
524 | if (btsr != 0xFFFF) { | |
525 | if (btsr & PHY_1000BTSR_1000FD) { | |
526 | return FULL; | |
527 | } else if (btsr & PHY_1000BTSR_1000HD) { | |
528 | return HALF; | |
855a496f WD |
529 | } |
530 | } | |
6fb6af6d | 531 | #endif /* CONFIG_PHY_GIGE */ |
855a496f | 532 | |
a56bd922 | 533 | /* Check Basic Management Control Register first. */ |
16a53238 AF |
534 | if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { |
535 | puts("PHY duplex"); | |
71bc6e64 | 536 | goto miiphy_read_failed; |
c609719b | 537 | } |
a56bd922 | 538 | /* Check if auto-negotiation is on. */ |
8ef583a0 | 539 | if (bmcr & BMCR_ANENABLE) { |
a56bd922 | 540 | /* Get auto-negotiation results. */ |
16a53238 AF |
541 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
542 | puts("PHY AN duplex"); | |
71bc6e64 | 543 | goto miiphy_read_failed; |
a56bd922 | 544 | } |
8ef583a0 | 545 | return (anlpar & (LPA_10FULL | LPA_100FULL)) ? |
71bc6e64 | 546 | FULL : HALF; |
a56bd922 WD |
547 | } |
548 | /* Get speed from basic control settings. */ | |
8ef583a0 | 549 | return (bmcr & BMCR_FULLDPLX) ? FULL : HALF; |
71bc6e64 | 550 | |
5f841959 | 551 | miiphy_read_failed: |
16a53238 | 552 | printf(" read failed, assuming half duplex\n"); |
71bc6e64 LJ |
553 | return HALF; |
554 | } | |
a56bd922 | 555 | |
71bc6e64 LJ |
556 | /***************************************************************************** |
557 | * | |
558 | * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/ | |
559 | * 1000BASE-T, or on error. | |
560 | */ | |
5700bb63 | 561 | int miiphy_is_1000base_x(const char *devname, unsigned char addr) |
71bc6e64 LJ |
562 | { |
563 | #if defined(CONFIG_PHY_GIGE) | |
564 | u16 exsr; | |
565 | ||
16a53238 AF |
566 | if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) { |
567 | printf("PHY extended status read failed, assuming no " | |
71bc6e64 LJ |
568 | "1000BASE-X\n"); |
569 | return 0; | |
570 | } | |
8ef583a0 | 571 | return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH)); |
71bc6e64 LJ |
572 | #else |
573 | return 0; | |
574 | #endif | |
c609719b WD |
575 | } |
576 | ||
6d0f6bcf | 577 | #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
fc3e2165 WD |
578 | /***************************************************************************** |
579 | * | |
580 | * Determine link status | |
581 | */ | |
5700bb63 | 582 | int miiphy_link(const char *devname, unsigned char addr) |
fc3e2165 WD |
583 | { |
584 | unsigned short reg; | |
585 | ||
a3d991bd | 586 | /* dummy read; needed to latch some phys */ |
16a53238 AF |
587 | (void)miiphy_read(devname, addr, MII_BMSR, ®); |
588 | if (miiphy_read(devname, addr, MII_BMSR, ®)) { | |
589 | puts("MII_BMSR read failed, assuming no link\n"); | |
590 | return 0; | |
fc3e2165 WD |
591 | } |
592 | ||
593 | /* Determine if a link is active */ | |
8ef583a0 | 594 | if ((reg & BMSR_LSTATUS) != 0) { |
16a53238 | 595 | return 1; |
fc3e2165 | 596 | } else { |
16a53238 | 597 | return 0; |
fc3e2165 WD |
598 | } |
599 | } | |
600 | #endif |