]>
Commit | Line | Data |
---|---|---|
c609719b WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
c609719b WD |
6 | */ |
7 | ||
8 | /* | |
9 | * This provides a bit-banged interface to the ethernet MII management | |
10 | * channel. | |
11 | */ | |
12 | ||
13 | #include <common.h> | |
14 | #include <miiphy.h> | |
5f184715 | 15 | #include <phy.h> |
c609719b | 16 | |
63ff004c MB |
17 | #include <asm/types.h> |
18 | #include <linux/list.h> | |
19 | #include <malloc.h> | |
20 | #include <net.h> | |
21 | ||
22 | /* local debug macro */ | |
63ff004c MB |
23 | #undef MII_DEBUG |
24 | ||
25 | #undef debug | |
26 | #ifdef MII_DEBUG | |
16a53238 | 27 | #define debug(fmt, args...) printf(fmt, ##args) |
63ff004c | 28 | #else |
16a53238 | 29 | #define debug(fmt, args...) |
63ff004c MB |
30 | #endif /* MII_DEBUG */ |
31 | ||
63ff004c MB |
32 | static struct list_head mii_devs; |
33 | static struct mii_dev *current_mii; | |
34 | ||
0daac978 MF |
35 | /* |
36 | * Lookup the mii_dev struct by the registered device name. | |
37 | */ | |
5f184715 | 38 | struct mii_dev *miiphy_get_dev_by_name(const char *devname) |
0daac978 MF |
39 | { |
40 | struct list_head *entry; | |
41 | struct mii_dev *dev; | |
42 | ||
43 | if (!devname) { | |
44 | printf("NULL device name!\n"); | |
45 | return NULL; | |
46 | } | |
47 | ||
48 | list_for_each(entry, &mii_devs) { | |
49 | dev = list_entry(entry, struct mii_dev, link); | |
50 | if (strcmp(dev->name, devname) == 0) | |
51 | return dev; | |
52 | } | |
53 | ||
0daac978 MF |
54 | return NULL; |
55 | } | |
56 | ||
d9785c14 MB |
57 | /***************************************************************************** |
58 | * | |
59 | * Initialize global data. Need to be called before any other miiphy routine. | |
60 | */ | |
5700bb63 | 61 | void miiphy_init(void) |
d9785c14 | 62 | { |
16a53238 | 63 | INIT_LIST_HEAD(&mii_devs); |
298035df | 64 | current_mii = NULL; |
d9785c14 MB |
65 | } |
66 | ||
5f184715 AF |
67 | static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg) |
68 | { | |
69 | unsigned short val; | |
70 | int ret; | |
71 | struct legacy_mii_dev *ldev = bus->priv; | |
72 | ||
73 | ret = ldev->read(bus->name, addr, reg, &val); | |
74 | ||
75 | return ret ? -1 : (int)val; | |
76 | } | |
77 | ||
78 | static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad, | |
79 | int reg, u16 val) | |
80 | { | |
81 | struct legacy_mii_dev *ldev = bus->priv; | |
82 | ||
83 | return ldev->write(bus->name, addr, reg, val); | |
84 | } | |
85 | ||
63ff004c MB |
86 | /***************************************************************************** |
87 | * | |
88 | * Register read and write MII access routines for the device <name>. | |
1cdabc4b | 89 | * This API is now deprecated. Please use mdio_alloc and mdio_register, instead. |
63ff004c | 90 | */ |
5700bb63 | 91 | void miiphy_register(const char *name, |
16a53238 | 92 | int (*read)(const char *devname, unsigned char addr, |
f915c931 | 93 | unsigned char reg, unsigned short *value), |
16a53238 | 94 | int (*write)(const char *devname, unsigned char addr, |
f915c931 | 95 | unsigned char reg, unsigned short value)) |
63ff004c | 96 | { |
63ff004c | 97 | struct mii_dev *new_dev; |
5f184715 | 98 | struct legacy_mii_dev *ldev; |
07c07635 LW |
99 | |
100 | BUG_ON(strlen(name) >= MDIO_NAME_LEN); | |
63ff004c | 101 | |
63ff004c | 102 | /* check if we have unique name */ |
5f184715 | 103 | new_dev = miiphy_get_dev_by_name(name); |
0daac978 MF |
104 | if (new_dev) { |
105 | printf("miiphy_register: non unique device name '%s'\n", name); | |
106 | return; | |
63ff004c MB |
107 | } |
108 | ||
109 | /* allocate memory */ | |
5f184715 AF |
110 | new_dev = mdio_alloc(); |
111 | ldev = malloc(sizeof(*ldev)); | |
63ff004c | 112 | |
5f184715 | 113 | if (new_dev == NULL || ldev == NULL) { |
16a53238 | 114 | printf("miiphy_register: cannot allocate memory for '%s'\n", |
298035df | 115 | name); |
63ff004c MB |
116 | return; |
117 | } | |
63ff004c MB |
118 | |
119 | /* initalize mii_dev struct fields */ | |
5f184715 AF |
120 | new_dev->read = legacy_miiphy_read; |
121 | new_dev->write = legacy_miiphy_write; | |
07c07635 LW |
122 | strncpy(new_dev->name, name, MDIO_NAME_LEN); |
123 | new_dev->name[MDIO_NAME_LEN - 1] = 0; | |
5f184715 AF |
124 | ldev->read = read; |
125 | ldev->write = write; | |
126 | new_dev->priv = ldev; | |
63ff004c | 127 | |
16a53238 | 128 | debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n", |
5f184715 | 129 | new_dev->name, ldev->read, ldev->write); |
63ff004c MB |
130 | |
131 | /* add it to the list */ | |
16a53238 | 132 | list_add_tail(&new_dev->link, &mii_devs); |
63ff004c MB |
133 | |
134 | if (!current_mii) | |
135 | current_mii = new_dev; | |
136 | } | |
137 | ||
5f184715 AF |
138 | struct mii_dev *mdio_alloc(void) |
139 | { | |
140 | struct mii_dev *bus; | |
141 | ||
142 | bus = malloc(sizeof(*bus)); | |
143 | if (!bus) | |
144 | return bus; | |
145 | ||
146 | memset(bus, 0, sizeof(*bus)); | |
147 | ||
148 | /* initalize mii_dev struct fields */ | |
149 | INIT_LIST_HEAD(&bus->link); | |
150 | ||
151 | return bus; | |
152 | } | |
153 | ||
154 | int mdio_register(struct mii_dev *bus) | |
155 | { | |
156 | if (!bus || !bus->name || !bus->read || !bus->write) | |
157 | return -1; | |
158 | ||
159 | /* check if we have unique name */ | |
160 | if (miiphy_get_dev_by_name(bus->name)) { | |
161 | printf("mdio_register: non unique device name '%s'\n", | |
162 | bus->name); | |
163 | return -1; | |
164 | } | |
165 | ||
166 | /* add it to the list */ | |
167 | list_add_tail(&bus->link, &mii_devs); | |
168 | ||
169 | if (!current_mii) | |
170 | current_mii = bus; | |
171 | ||
172 | return 0; | |
173 | } | |
174 | ||
175 | void mdio_list_devices(void) | |
176 | { | |
177 | struct list_head *entry; | |
178 | ||
179 | list_for_each(entry, &mii_devs) { | |
180 | int i; | |
181 | struct mii_dev *bus = list_entry(entry, struct mii_dev, link); | |
182 | ||
183 | printf("%s:\n", bus->name); | |
184 | ||
185 | for (i = 0; i < PHY_MAX_ADDR; i++) { | |
186 | struct phy_device *phydev = bus->phymap[i]; | |
187 | ||
188 | if (phydev) { | |
189 | printf("%d - %s", i, phydev->drv->name); | |
190 | ||
191 | if (phydev->dev) | |
192 | printf(" <--> %s\n", phydev->dev->name); | |
193 | else | |
194 | printf("\n"); | |
195 | } | |
196 | } | |
197 | } | |
198 | } | |
199 | ||
5700bb63 | 200 | int miiphy_set_current_dev(const char *devname) |
63ff004c | 201 | { |
63ff004c MB |
202 | struct mii_dev *dev; |
203 | ||
5f184715 | 204 | dev = miiphy_get_dev_by_name(devname); |
0daac978 MF |
205 | if (dev) { |
206 | current_mii = dev; | |
207 | return 0; | |
63ff004c MB |
208 | } |
209 | ||
5f184715 AF |
210 | printf("No such device: %s\n", devname); |
211 | ||
63ff004c MB |
212 | return 1; |
213 | } | |
214 | ||
5f184715 AF |
215 | struct mii_dev *mdio_get_current_dev(void) |
216 | { | |
217 | return current_mii; | |
218 | } | |
219 | ||
220 | struct phy_device *mdio_phydev_for_ethname(const char *ethname) | |
221 | { | |
222 | struct list_head *entry; | |
223 | struct mii_dev *bus; | |
224 | ||
225 | list_for_each(entry, &mii_devs) { | |
226 | int i; | |
227 | bus = list_entry(entry, struct mii_dev, link); | |
228 | ||
229 | for (i = 0; i < PHY_MAX_ADDR; i++) { | |
230 | if (!bus->phymap[i] || !bus->phymap[i]->dev) | |
231 | continue; | |
232 | ||
233 | if (strcmp(bus->phymap[i]->dev->name, ethname) == 0) | |
234 | return bus->phymap[i]; | |
235 | } | |
236 | } | |
237 | ||
238 | printf("%s is not a known ethernet\n", ethname); | |
239 | return NULL; | |
240 | } | |
241 | ||
5700bb63 | 242 | const char *miiphy_get_current_dev(void) |
63ff004c MB |
243 | { |
244 | if (current_mii) | |
245 | return current_mii->name; | |
246 | ||
247 | return NULL; | |
248 | } | |
249 | ||
ede16ea3 MF |
250 | static struct mii_dev *miiphy_get_active_dev(const char *devname) |
251 | { | |
252 | /* If the current mii is the one we want, return it */ | |
253 | if (current_mii) | |
254 | if (strcmp(current_mii->name, devname) == 0) | |
255 | return current_mii; | |
256 | ||
257 | /* Otherwise, set the active one to the one we want */ | |
258 | if (miiphy_set_current_dev(devname)) | |
259 | return NULL; | |
260 | else | |
261 | return current_mii; | |
262 | } | |
263 | ||
63ff004c MB |
264 | /***************************************************************************** |
265 | * | |
266 | * Read to variable <value> from the PHY attached to device <devname>, | |
267 | * use PHY address <addr> and register <reg>. | |
268 | * | |
1cdabc4b AF |
269 | * This API is deprecated. Use phy_read on a phy_device found via phy_connect |
270 | * | |
63ff004c MB |
271 | * Returns: |
272 | * 0 on success | |
273 | */ | |
f915c931 | 274 | int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, |
298035df | 275 | unsigned short *value) |
63ff004c | 276 | { |
5f184715 | 277 | struct mii_dev *bus; |
d67d5d52 | 278 | int ret; |
63ff004c | 279 | |
5f184715 | 280 | bus = miiphy_get_active_dev(devname); |
d67d5d52 | 281 | if (!bus) |
5f184715 | 282 | return 1; |
63ff004c | 283 | |
d67d5d52 AG |
284 | ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg); |
285 | if (ret < 0) | |
286 | return 1; | |
287 | ||
288 | *value = (unsigned short)ret; | |
289 | return 0; | |
63ff004c MB |
290 | } |
291 | ||
292 | /***************************************************************************** | |
293 | * | |
294 | * Write <value> to the PHY attached to device <devname>, | |
295 | * use PHY address <addr> and register <reg>. | |
296 | * | |
1cdabc4b AF |
297 | * This API is deprecated. Use phy_write on a phy_device found by phy_connect |
298 | * | |
63ff004c MB |
299 | * Returns: |
300 | * 0 on success | |
301 | */ | |
f915c931 | 302 | int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, |
298035df | 303 | unsigned short value) |
63ff004c | 304 | { |
5f184715 | 305 | struct mii_dev *bus; |
63ff004c | 306 | |
5f184715 AF |
307 | bus = miiphy_get_active_dev(devname); |
308 | if (bus) | |
309 | return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value); | |
63ff004c | 310 | |
0daac978 | 311 | return 1; |
63ff004c MB |
312 | } |
313 | ||
314 | /***************************************************************************** | |
315 | * | |
316 | * Print out list of registered MII capable devices. | |
317 | */ | |
16a53238 | 318 | void miiphy_listdev(void) |
63ff004c MB |
319 | { |
320 | struct list_head *entry; | |
321 | struct mii_dev *dev; | |
322 | ||
16a53238 AF |
323 | puts("MII devices: "); |
324 | list_for_each(entry, &mii_devs) { | |
325 | dev = list_entry(entry, struct mii_dev, link); | |
326 | printf("'%s' ", dev->name); | |
63ff004c | 327 | } |
16a53238 | 328 | puts("\n"); |
63ff004c MB |
329 | |
330 | if (current_mii) | |
16a53238 | 331 | printf("Current device: '%s'\n", current_mii->name); |
63ff004c MB |
332 | } |
333 | ||
c609719b WD |
334 | /***************************************************************************** |
335 | * | |
336 | * Read the OUI, manufacture's model number, and revision number. | |
337 | * | |
338 | * OUI: 22 bits (unsigned int) | |
339 | * Model: 6 bits (unsigned char) | |
340 | * Revision: 4 bits (unsigned char) | |
341 | * | |
1cdabc4b AF |
342 | * This API is deprecated. |
343 | * | |
c609719b WD |
344 | * Returns: |
345 | * 0 on success | |
346 | */ | |
5700bb63 | 347 | int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, |
c609719b WD |
348 | unsigned char *model, unsigned char *rev) |
349 | { | |
350 | unsigned int reg = 0; | |
8bf3b005 | 351 | unsigned short tmp; |
c609719b | 352 | |
16a53238 AF |
353 | if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) { |
354 | debug("PHY ID register 2 read failed\n"); | |
355 | return -1; | |
c609719b | 356 | } |
8bf3b005 | 357 | reg = tmp; |
c609719b | 358 | |
16a53238 | 359 | debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg); |
26c7bab8 | 360 | |
c609719b WD |
361 | if (reg == 0xFFFF) { |
362 | /* No physical device present at this address */ | |
16a53238 | 363 | return -1; |
c609719b WD |
364 | } |
365 | ||
16a53238 AF |
366 | if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) { |
367 | debug("PHY ID register 1 read failed\n"); | |
368 | return -1; | |
c609719b | 369 | } |
8bf3b005 | 370 | reg |= tmp << 16; |
16a53238 | 371 | debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg); |
26c7bab8 | 372 | |
298035df LJ |
373 | *oui = (reg >> 10); |
374 | *model = (unsigned char)((reg >> 4) & 0x0000003F); | |
375 | *rev = (unsigned char)(reg & 0x0000000F); | |
16a53238 | 376 | return 0; |
c609719b WD |
377 | } |
378 | ||
5f184715 | 379 | #ifndef CONFIG_PHYLIB |
c609719b WD |
380 | /***************************************************************************** |
381 | * | |
382 | * Reset the PHY. | |
1cdabc4b AF |
383 | * |
384 | * This API is deprecated. Use PHYLIB. | |
385 | * | |
c609719b WD |
386 | * Returns: |
387 | * 0 on success | |
388 | */ | |
5700bb63 | 389 | int miiphy_reset(const char *devname, unsigned char addr) |
c609719b WD |
390 | { |
391 | unsigned short reg; | |
ab5a0dcb | 392 | int timeout = 500; |
c609719b | 393 | |
16a53238 AF |
394 | if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { |
395 | debug("PHY status read failed\n"); | |
396 | return -1; | |
f89920c3 | 397 | } |
16a53238 AF |
398 | if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) { |
399 | debug("PHY reset failed\n"); | |
400 | return -1; | |
c609719b | 401 | } |
5653fc33 | 402 | #ifdef CONFIG_PHY_RESET_DELAY |
16a53238 | 403 | udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ |
5653fc33 | 404 | #endif |
c609719b WD |
405 | /* |
406 | * Poll the control register for the reset bit to go to 0 (it is | |
407 | * auto-clearing). This should happen within 0.5 seconds per the | |
408 | * IEEE spec. | |
409 | */ | |
c609719b | 410 | reg = 0x8000; |
ab5a0dcb | 411 | while (((reg & 0x8000) != 0) && timeout--) { |
8ef583a0 | 412 | if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { |
ab5a0dcb SR |
413 | debug("PHY status read failed\n"); |
414 | return -1; | |
c609719b | 415 | } |
ab5a0dcb | 416 | udelay(1000); |
c609719b WD |
417 | } |
418 | if ((reg & 0x8000) == 0) { | |
16a53238 | 419 | return 0; |
c609719b | 420 | } else { |
16a53238 AF |
421 | puts("PHY reset timed out\n"); |
422 | return -1; | |
c609719b | 423 | } |
16a53238 | 424 | return 0; |
c609719b | 425 | } |
5f184715 | 426 | #endif /* !PHYLIB */ |
c609719b | 427 | |
c609719b WD |
428 | /***************************************************************************** |
429 | * | |
71bc6e64 | 430 | * Determine the ethernet speed (10/100/1000). Return 10 on error. |
c609719b | 431 | */ |
5700bb63 | 432 | int miiphy_speed(const char *devname, unsigned char addr) |
c609719b | 433 | { |
71bc6e64 | 434 | u16 bmcr, anlpar; |
c609719b | 435 | |
6fb6af6d | 436 | #if defined(CONFIG_PHY_GIGE) |
71bc6e64 LJ |
437 | u16 btsr; |
438 | ||
439 | /* | |
440 | * Check for 1000BASE-X. If it is supported, then assume that the speed | |
441 | * is 1000. | |
442 | */ | |
16a53238 | 443 | if (miiphy_is_1000base_x(devname, addr)) |
71bc6e64 | 444 | return _1000BASET; |
16a53238 | 445 | |
71bc6e64 LJ |
446 | /* |
447 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. | |
448 | */ | |
449 | /* Check for 1000BASE-T. */ | |
16a53238 AF |
450 | if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { |
451 | printf("PHY 1000BT status"); | |
71bc6e64 LJ |
452 | goto miiphy_read_failed; |
453 | } | |
454 | if (btsr != 0xFFFF && | |
16a53238 | 455 | (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) |
71bc6e64 | 456 | return _1000BASET; |
6fb6af6d | 457 | #endif /* CONFIG_PHY_GIGE */ |
855a496f | 458 | |
a56bd922 | 459 | /* Check Basic Management Control Register first. */ |
16a53238 AF |
460 | if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { |
461 | printf("PHY speed"); | |
71bc6e64 | 462 | goto miiphy_read_failed; |
c609719b | 463 | } |
a56bd922 | 464 | /* Check if auto-negotiation is on. */ |
8ef583a0 | 465 | if (bmcr & BMCR_ANENABLE) { |
a56bd922 | 466 | /* Get auto-negotiation results. */ |
16a53238 AF |
467 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
468 | printf("PHY AN speed"); | |
71bc6e64 | 469 | goto miiphy_read_failed; |
a56bd922 | 470 | } |
8ef583a0 | 471 | return (anlpar & LPA_100) ? _100BASET : _10BASET; |
a56bd922 WD |
472 | } |
473 | /* Get speed from basic control settings. */ | |
8ef583a0 | 474 | return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET; |
a56bd922 | 475 | |
5f841959 | 476 | miiphy_read_failed: |
16a53238 | 477 | printf(" read failed, assuming 10BASE-T\n"); |
71bc6e64 | 478 | return _10BASET; |
c609719b WD |
479 | } |
480 | ||
c609719b WD |
481 | /***************************************************************************** |
482 | * | |
71bc6e64 | 483 | * Determine full/half duplex. Return half on error. |
c609719b | 484 | */ |
5700bb63 | 485 | int miiphy_duplex(const char *devname, unsigned char addr) |
c609719b | 486 | { |
71bc6e64 | 487 | u16 bmcr, anlpar; |
c609719b | 488 | |
6fb6af6d | 489 | #if defined(CONFIG_PHY_GIGE) |
71bc6e64 LJ |
490 | u16 btsr; |
491 | ||
492 | /* Check for 1000BASE-X. */ | |
16a53238 | 493 | if (miiphy_is_1000base_x(devname, addr)) { |
71bc6e64 | 494 | /* 1000BASE-X */ |
16a53238 AF |
495 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
496 | printf("1000BASE-X PHY AN duplex"); | |
71bc6e64 LJ |
497 | goto miiphy_read_failed; |
498 | } | |
499 | } | |
500 | /* | |
501 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. | |
502 | */ | |
503 | /* Check for 1000BASE-T. */ | |
16a53238 AF |
504 | if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { |
505 | printf("PHY 1000BT status"); | |
71bc6e64 LJ |
506 | goto miiphy_read_failed; |
507 | } | |
508 | if (btsr != 0xFFFF) { | |
509 | if (btsr & PHY_1000BTSR_1000FD) { | |
510 | return FULL; | |
511 | } else if (btsr & PHY_1000BTSR_1000HD) { | |
512 | return HALF; | |
855a496f WD |
513 | } |
514 | } | |
6fb6af6d | 515 | #endif /* CONFIG_PHY_GIGE */ |
855a496f | 516 | |
a56bd922 | 517 | /* Check Basic Management Control Register first. */ |
16a53238 AF |
518 | if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { |
519 | puts("PHY duplex"); | |
71bc6e64 | 520 | goto miiphy_read_failed; |
c609719b | 521 | } |
a56bd922 | 522 | /* Check if auto-negotiation is on. */ |
8ef583a0 | 523 | if (bmcr & BMCR_ANENABLE) { |
a56bd922 | 524 | /* Get auto-negotiation results. */ |
16a53238 AF |
525 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
526 | puts("PHY AN duplex"); | |
71bc6e64 | 527 | goto miiphy_read_failed; |
a56bd922 | 528 | } |
8ef583a0 | 529 | return (anlpar & (LPA_10FULL | LPA_100FULL)) ? |
71bc6e64 | 530 | FULL : HALF; |
a56bd922 WD |
531 | } |
532 | /* Get speed from basic control settings. */ | |
8ef583a0 | 533 | return (bmcr & BMCR_FULLDPLX) ? FULL : HALF; |
71bc6e64 | 534 | |
5f841959 | 535 | miiphy_read_failed: |
16a53238 | 536 | printf(" read failed, assuming half duplex\n"); |
71bc6e64 LJ |
537 | return HALF; |
538 | } | |
a56bd922 | 539 | |
71bc6e64 LJ |
540 | /***************************************************************************** |
541 | * | |
542 | * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/ | |
543 | * 1000BASE-T, or on error. | |
544 | */ | |
5700bb63 | 545 | int miiphy_is_1000base_x(const char *devname, unsigned char addr) |
71bc6e64 LJ |
546 | { |
547 | #if defined(CONFIG_PHY_GIGE) | |
548 | u16 exsr; | |
549 | ||
16a53238 AF |
550 | if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) { |
551 | printf("PHY extended status read failed, assuming no " | |
71bc6e64 LJ |
552 | "1000BASE-X\n"); |
553 | return 0; | |
554 | } | |
8ef583a0 | 555 | return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH)); |
71bc6e64 LJ |
556 | #else |
557 | return 0; | |
558 | #endif | |
c609719b WD |
559 | } |
560 | ||
6d0f6bcf | 561 | #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
fc3e2165 WD |
562 | /***************************************************************************** |
563 | * | |
564 | * Determine link status | |
565 | */ | |
5700bb63 | 566 | int miiphy_link(const char *devname, unsigned char addr) |
fc3e2165 WD |
567 | { |
568 | unsigned short reg; | |
569 | ||
a3d991bd | 570 | /* dummy read; needed to latch some phys */ |
16a53238 AF |
571 | (void)miiphy_read(devname, addr, MII_BMSR, ®); |
572 | if (miiphy_read(devname, addr, MII_BMSR, ®)) { | |
573 | puts("MII_BMSR read failed, assuming no link\n"); | |
574 | return 0; | |
fc3e2165 WD |
575 | } |
576 | ||
577 | /* Determine if a link is active */ | |
8ef583a0 | 578 | if ((reg & BMSR_LSTATUS) != 0) { |
16a53238 | 579 | return 1; |
fc3e2165 | 580 | } else { |
16a53238 | 581 | return 0; |
fc3e2165 WD |
582 | } |
583 | } | |
584 | #endif |