]>
Commit | Line | Data |
---|---|---|
c609719b WD |
1 | /* |
2 | * (C) Copyright 2001, 2002 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | * | |
23 | * This has been changed substantially by Gerald Van Baren, Custom IDEAS, | |
24 | * vanbaren@cideas.com. It was heavily influenced by LiMon, written by | |
25 | * Neil Russell. | |
26 | */ | |
27 | ||
28 | #include <common.h> | |
29 | #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */ | |
30 | #include <ioports.h> | |
31 | #endif | |
9d5028c2 WD |
32 | #ifdef CONFIG_AT91RM9200DK /* need this for the at91rm9200dk */ |
33 | #include <asm/io.h> | |
34 | #include <asm/arch/hardware.h> | |
35 | #endif | |
c609719b WD |
36 | #include <i2c.h> |
37 | ||
38 | #if defined(CONFIG_SOFT_I2C) | |
39 | ||
40 | /* #define DEBUG_I2C */ | |
41 | ||
42 | ||
43 | /*----------------------------------------------------------------------- | |
44 | * Definitions | |
45 | */ | |
46 | ||
47 | #define RETRIES 0 | |
48 | ||
49 | ||
50 | #define I2C_ACK 0 /* PD_SDA level to ack a byte */ | |
51 | #define I2C_NOACK 1 /* PD_SDA level to noack a byte */ | |
52 | ||
53 | ||
54 | #ifdef DEBUG_I2C | |
55 | #define PRINTD(fmt,args...) do { \ | |
56 | DECLARE_GLOBAL_DATA_PTR; \ | |
57 | if (gd->have_console) \ | |
58 | printf (fmt ,##args); \ | |
59 | } while (0) | |
60 | #else | |
61 | #define PRINTD(fmt,args...) | |
62 | #endif | |
63 | ||
64 | /*----------------------------------------------------------------------- | |
65 | * Local functions | |
66 | */ | |
67 | static void send_reset (void); | |
68 | static void send_start (void); | |
69 | static void send_stop (void); | |
70 | static void send_ack (int); | |
71 | static int write_byte (uchar byte); | |
72 | static uchar read_byte (int); | |
73 | ||
74 | ||
75 | /*----------------------------------------------------------------------- | |
76 | * Send a reset sequence consisting of 9 clocks with the data signal high | |
77 | * to clock any confused device back into an idle state. Also send a | |
78 | * <stop> at the end of the sequence for belts & suspenders. | |
79 | */ | |
80 | static void send_reset(void) | |
81 | { | |
82 | #ifdef CONFIG_MPC8260 | |
83 | volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT); | |
84 | #endif | |
85 | #ifdef CONFIG_8xx | |
86 | volatile immap_t *immr = (immap_t *)CFG_IMMR; | |
87 | #endif | |
88 | int j; | |
89 | ||
60fbe254 | 90 | I2C_SCL(1); |
c609719b | 91 | I2C_SDA(1); |
60fbe254 WD |
92 | #ifdef I2C_INIT |
93 | I2C_INIT; | |
94 | #endif | |
95 | I2C_TRISTATE; | |
c609719b WD |
96 | for(j = 0; j < 9; j++) { |
97 | I2C_SCL(0); | |
98 | I2C_DELAY; | |
99 | I2C_DELAY; | |
100 | I2C_SCL(1); | |
101 | I2C_DELAY; | |
102 | I2C_DELAY; | |
103 | } | |
104 | send_stop(); | |
105 | I2C_TRISTATE; | |
106 | } | |
107 | ||
108 | /*----------------------------------------------------------------------- | |
109 | * START: High -> Low on SDA while SCL is High | |
110 | */ | |
111 | static void send_start(void) | |
112 | { | |
113 | #ifdef CONFIG_MPC8260 | |
114 | volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT); | |
115 | #endif | |
116 | #ifdef CONFIG_8xx | |
117 | volatile immap_t *immr = (immap_t *)CFG_IMMR; | |
118 | #endif | |
119 | ||
120 | I2C_DELAY; | |
121 | I2C_SDA(1); | |
122 | I2C_ACTIVE; | |
123 | I2C_DELAY; | |
124 | I2C_SCL(1); | |
125 | I2C_DELAY; | |
126 | I2C_SDA(0); | |
127 | I2C_DELAY; | |
128 | } | |
129 | ||
130 | /*----------------------------------------------------------------------- | |
131 | * STOP: Low -> High on SDA while SCL is High | |
132 | */ | |
133 | static void send_stop(void) | |
134 | { | |
135 | #ifdef CONFIG_MPC8260 | |
136 | volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT); | |
137 | #endif | |
138 | #ifdef CONFIG_8xx | |
139 | volatile immap_t *immr = (immap_t *)CFG_IMMR; | |
140 | #endif | |
141 | ||
142 | I2C_SCL(0); | |
143 | I2C_DELAY; | |
144 | I2C_SDA(0); | |
145 | I2C_ACTIVE; | |
146 | I2C_DELAY; | |
147 | I2C_SCL(1); | |
148 | I2C_DELAY; | |
149 | I2C_SDA(1); | |
150 | I2C_DELAY; | |
151 | I2C_TRISTATE; | |
152 | } | |
153 | ||
154 | ||
155 | /*----------------------------------------------------------------------- | |
156 | * ack should be I2C_ACK or I2C_NOACK | |
157 | */ | |
158 | static void send_ack(int ack) | |
159 | { | |
160 | #ifdef CONFIG_MPC8260 | |
161 | volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT); | |
162 | #endif | |
163 | #ifdef CONFIG_8xx | |
164 | volatile immap_t *immr = (immap_t *)CFG_IMMR; | |
165 | #endif | |
166 | ||
167 | I2C_ACTIVE; | |
168 | I2C_SCL(0); | |
169 | I2C_DELAY; | |
170 | ||
171 | I2C_SDA(ack); | |
172 | ||
173 | I2C_ACTIVE; | |
174 | I2C_DELAY; | |
175 | I2C_SCL(1); | |
176 | I2C_DELAY; | |
177 | I2C_DELAY; | |
178 | I2C_SCL(0); | |
179 | I2C_DELAY; | |
180 | } | |
181 | ||
182 | ||
183 | /*----------------------------------------------------------------------- | |
184 | * Send 8 bits and look for an acknowledgement. | |
185 | */ | |
186 | static int write_byte(uchar data) | |
187 | { | |
188 | #ifdef CONFIG_MPC8260 | |
189 | volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT); | |
190 | #endif | |
191 | #ifdef CONFIG_8xx | |
192 | volatile immap_t *immr = (immap_t *)CFG_IMMR; | |
193 | #endif | |
194 | int j; | |
195 | int nack; | |
196 | ||
197 | I2C_ACTIVE; | |
198 | for(j = 0; j < 8; j++) { | |
199 | I2C_SCL(0); | |
200 | I2C_DELAY; | |
201 | I2C_SDA(data & 0x80); | |
202 | I2C_DELAY; | |
203 | I2C_SCL(1); | |
204 | I2C_DELAY; | |
205 | I2C_DELAY; | |
206 | ||
207 | data <<= 1; | |
208 | } | |
209 | ||
210 | /* | |
211 | * Look for an <ACK>(negative logic) and return it. | |
212 | */ | |
213 | I2C_SCL(0); | |
214 | I2C_DELAY; | |
215 | I2C_SDA(1); | |
216 | I2C_TRISTATE; | |
217 | I2C_DELAY; | |
218 | I2C_SCL(1); | |
219 | I2C_DELAY; | |
220 | I2C_DELAY; | |
221 | nack = I2C_READ; | |
222 | I2C_SCL(0); | |
223 | I2C_DELAY; | |
224 | I2C_ACTIVE; | |
225 | ||
226 | return(nack); /* not a nack is an ack */ | |
227 | } | |
228 | ||
229 | ||
230 | /*----------------------------------------------------------------------- | |
231 | * if ack == I2C_ACK, ACK the byte so can continue reading, else | |
232 | * send I2C_NOACK to end the read. | |
233 | */ | |
234 | static uchar read_byte(int ack) | |
235 | { | |
236 | #ifdef CONFIG_MPC8260 | |
237 | volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT); | |
238 | #endif | |
239 | #ifdef CONFIG_8xx | |
240 | volatile immap_t *immr = (immap_t *)CFG_IMMR; | |
241 | #endif | |
242 | int data; | |
243 | int j; | |
244 | ||
245 | /* | |
246 | * Read 8 bits, MSB first. | |
247 | */ | |
248 | I2C_TRISTATE; | |
249 | data = 0; | |
250 | for(j = 0; j < 8; j++) { | |
251 | I2C_SCL(0); | |
252 | I2C_DELAY; | |
253 | I2C_SCL(1); | |
254 | I2C_DELAY; | |
255 | data <<= 1; | |
256 | data |= I2C_READ; | |
257 | I2C_DELAY; | |
258 | } | |
259 | send_ack(ack); | |
260 | ||
261 | return(data); | |
262 | } | |
263 | ||
264 | /*=====================================================================*/ | |
265 | /* Public Functions */ | |
266 | /*=====================================================================*/ | |
267 | ||
268 | /*----------------------------------------------------------------------- | |
269 | * Initialization | |
270 | */ | |
271 | void i2c_init (int speed, int slaveaddr) | |
272 | { | |
c609719b | 273 | /* |
8bde7f77 WD |
274 | * WARNING: Do NOT save speed in a static variable: if the |
275 | * I2C routines are called before RAM is initialized (to read | |
276 | * the DIMM SPD, for instance), RAM won't be usable and your | |
277 | * system will crash. | |
c609719b WD |
278 | */ |
279 | send_reset (); | |
280 | } | |
281 | ||
282 | /*----------------------------------------------------------------------- | |
283 | * Probe to see if a chip is present. Also good for checking for the | |
284 | * completion of EEPROM writes since the chip stops responding until | |
285 | * the write completes (typically 10mSec). | |
286 | */ | |
287 | int i2c_probe(uchar addr) | |
288 | { | |
289 | int rc; | |
290 | ||
82d716fd | 291 | /* |
8e7b703a | 292 | * perform 1 byte write transaction with just address byte |
82d716fd WD |
293 | * (fake write) |
294 | */ | |
c609719b | 295 | send_start(); |
6aff3115 | 296 | rc = write_byte ((addr << 1) | 0); |
c609719b WD |
297 | send_stop(); |
298 | ||
299 | return (rc ? 1 : 0); | |
300 | } | |
301 | ||
302 | /*----------------------------------------------------------------------- | |
303 | * Read bytes | |
304 | */ | |
305 | int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) | |
306 | { | |
307 | int shift; | |
308 | PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n", | |
309 | chip, addr, alen, buffer, len); | |
310 | ||
311 | #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW | |
312 | /* | |
313 | * EEPROM chips that implement "address overflow" are ones | |
314 | * like Catalyst 24WC04/08/16 which has 9/10/11 bits of | |
315 | * address and the extra bits end up in the "chip address" | |
316 | * bit slots. This makes a 24WC08 (1Kbyte) chip look like | |
317 | * four 256 byte chips. | |
318 | * | |
319 | * Note that we consider the length of the address field to | |
320 | * still be one byte because the extra address bits are | |
321 | * hidden in the chip address. | |
322 | */ | |
323 | chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); | |
324 | ||
325 | PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n", | |
326 | chip, addr); | |
327 | #endif | |
328 | ||
329 | /* | |
330 | * Do the addressing portion of a write cycle to set the | |
331 | * chip's address pointer. If the address length is zero, | |
332 | * don't do the normal write cycle to set the address pointer, | |
333 | * there is no address pointer in this chip. | |
334 | */ | |
335 | send_start(); | |
336 | if(alen > 0) { | |
337 | if(write_byte(chip << 1)) { /* write cycle */ | |
338 | send_stop(); | |
339 | PRINTD("i2c_read, no chip responded %02X\n", chip); | |
340 | return(1); | |
341 | } | |
342 | shift = (alen-1) * 8; | |
343 | while(alen-- > 0) { | |
344 | if(write_byte(addr >> shift)) { | |
345 | PRINTD("i2c_read, address not <ACK>ed\n"); | |
346 | return(1); | |
347 | } | |
348 | shift -= 8; | |
349 | } | |
350 | send_stop(); /* reportedly some chips need a full stop */ | |
351 | send_start(); | |
352 | } | |
353 | /* | |
354 | * Send the chip address again, this time for a read cycle. | |
355 | * Then read the data. On the last byte, we do a NACK instead | |
356 | * of an ACK(len == 0) to terminate the read. | |
357 | */ | |
358 | write_byte((chip << 1) | 1); /* read cycle */ | |
359 | while(len-- > 0) { | |
360 | *buffer++ = read_byte(len == 0); | |
361 | } | |
362 | send_stop(); | |
363 | return(0); | |
364 | } | |
365 | ||
366 | /*----------------------------------------------------------------------- | |
367 | * Write bytes | |
368 | */ | |
369 | int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) | |
370 | { | |
371 | int shift, failures = 0; | |
372 | ||
373 | PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n", | |
374 | chip, addr, alen, buffer, len); | |
375 | ||
376 | send_start(); | |
377 | if(write_byte(chip << 1)) { /* write cycle */ | |
378 | send_stop(); | |
379 | PRINTD("i2c_write, no chip responded %02X\n", chip); | |
380 | return(1); | |
381 | } | |
382 | shift = (alen-1) * 8; | |
383 | while(alen-- > 0) { | |
384 | if(write_byte(addr >> shift)) { | |
385 | PRINTD("i2c_write, address not <ACK>ed\n"); | |
386 | return(1); | |
387 | } | |
388 | shift -= 8; | |
389 | } | |
390 | ||
391 | while(len-- > 0) { | |
392 | if(write_byte(*buffer++)) { | |
393 | failures++; | |
394 | } | |
395 | } | |
396 | send_stop(); | |
397 | return(failures); | |
398 | } | |
399 | ||
400 | /*----------------------------------------------------------------------- | |
401 | * Read a register | |
402 | */ | |
403 | uchar i2c_reg_read(uchar i2c_addr, uchar reg) | |
404 | { | |
77ddac94 | 405 | uchar buf; |
c609719b WD |
406 | |
407 | i2c_read(i2c_addr, reg, 1, &buf, 1); | |
408 | ||
409 | return(buf); | |
410 | } | |
411 | ||
412 | /*----------------------------------------------------------------------- | |
413 | * Write a register | |
414 | */ | |
415 | void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) | |
416 | { | |
417 | i2c_write(i2c_addr, reg, 1, &val, 1); | |
418 | } | |
419 | ||
420 | ||
421 | #endif /* CONFIG_SOFT_I2C */ |