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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
32b11273 CR |
2 | /* |
3 | * Copyright (C) 2011 OMICRON electronics GmbH | |
4 | * | |
a430fa06 | 5 | * based on drivers/mtd/nand/raw/nand_spl_load.c |
32b11273 CR |
6 | * |
7 | * Copyright (C) 2011 | |
8 | * Heiko Schocher, DENX Software Engineering, hs@denx.de. | |
32b11273 CR |
9 | */ |
10 | ||
11 | #include <common.h> | |
ff0960f9 | 12 | #include <spi.h> |
32b11273 | 13 | #include <spi_flash.h> |
36afd451 | 14 | #include <errno.h> |
a4cc1c48 | 15 | #include <spl.h> |
32b11273 | 16 | |
2bac55bc PT |
17 | DECLARE_GLOBAL_DATA_PTR; |
18 | ||
fa1a73fa TR |
19 | #ifdef CONFIG_SPL_OS_BOOT |
20 | /* | |
21 | * Load the kernel, check for a valid header we can parse, and if found load | |
22 | * the kernel and then device tree. | |
23 | */ | |
2a2ee2ac SG |
24 | static int spi_load_image_os(struct spl_image_info *spl_image, |
25 | struct spi_flash *flash, | |
fa1a73fa TR |
26 | struct image_header *header) |
27 | { | |
7e0f2267 MV |
28 | int err; |
29 | ||
fa1a73fa | 30 | /* Read for a header, parse or error out. */ |
51c12319 | 31 | spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, sizeof(*header), |
fa1a73fa TR |
32 | (void *)header); |
33 | ||
34 | if (image_get_magic(header) != IH_MAGIC) | |
35 | return -1; | |
36 | ||
2a2ee2ac | 37 | err = spl_parse_image_header(spl_image, header); |
7e0f2267 MV |
38 | if (err) |
39 | return err; | |
fa1a73fa TR |
40 | |
41 | spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, | |
2a2ee2ac | 42 | spl_image->size, (void *)spl_image->load_addr); |
fa1a73fa TR |
43 | |
44 | /* Read device tree. */ | |
45 | spi_flash_read(flash, CONFIG_SYS_SPI_ARGS_OFFS, | |
46 | CONFIG_SYS_SPI_ARGS_SIZE, | |
47 | (void *)CONFIG_SYS_SPL_ARGS_ADDR); | |
48 | ||
49 | return 0; | |
50 | } | |
51 | #endif | |
52 | ||
00d55956 LV |
53 | static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector, |
54 | ulong count, void *buf) | |
55 | { | |
56 | struct spi_flash *flash = load->dev; | |
57 | ulong ret; | |
58 | ||
59 | ret = spi_flash_read(flash, sector, count, buf); | |
60 | if (!ret) | |
61 | return count; | |
62 | else | |
63 | return 0; | |
64 | } | |
32b11273 CR |
65 | /* |
66 | * The main entry for SPI booting. It's necessary that SDRAM is already | |
67 | * configured and available since this code loads the main U-Boot image | |
68 | * from SPI into SDRAM and starts it from there. | |
69 | */ | |
2a2ee2ac SG |
70 | static int spl_spi_load_image(struct spl_image_info *spl_image, |
71 | struct spl_boot_device *bootdev) | |
32b11273 | 72 | { |
36afd451 | 73 | int err = 0; |
2bac55bc | 74 | unsigned payload_offs = CONFIG_SYS_SPI_U_BOOT_OFFS; |
32b11273 | 75 | struct spi_flash *flash; |
a4cc1c48 | 76 | struct image_header *header; |
32b11273 CR |
77 | |
78 | /* | |
79 | * Load U-Boot image from SPI flash into RAM | |
b0cc1b84 PD |
80 | * In DM mode: defaults speed and mode will be |
81 | * taken from DT when available | |
32b11273 CR |
82 | */ |
83 | ||
88e34e5f NK |
84 | flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, |
85 | CONFIG_SF_DEFAULT_CS, | |
86 | CONFIG_SF_DEFAULT_SPEED, | |
87 | CONFIG_SF_DEFAULT_MODE); | |
32b11273 | 88 | if (!flash) { |
a4cc1c48 | 89 | puts("SPI probe failed.\n"); |
36afd451 | 90 | return -ENODEV; |
32b11273 CR |
91 | } |
92 | ||
51c12319 | 93 | header = spl_get_load_buffer(-sizeof(*header), sizeof(*header)); |
32b11273 | 94 | |
2bac55bc PT |
95 | #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) |
96 | payload_offs = fdtdec_get_config_int(gd->fdt_blob, | |
97 | "u-boot,spl-payload-offset", | |
98 | payload_offs); | |
99 | #endif | |
100 | ||
fa1a73fa | 101 | #ifdef CONFIG_SPL_OS_BOOT |
2a2ee2ac | 102 | if (spl_start_uboot() || spi_load_image_os(spl_image, flash, header)) |
fa1a73fa TR |
103 | #endif |
104 | { | |
105 | /* Load u-boot, mkimage header is 64 bytes. */ | |
51c12319 | 106 | err = spi_flash_read(flash, payload_offs, sizeof(*header), |
36afd451 | 107 | (void *)header); |
a7044900 SG |
108 | if (err) { |
109 | debug("%s: Failed to read from SPI flash (err=%d)\n", | |
110 | __func__, err); | |
36afd451 | 111 | return err; |
a7044900 | 112 | } |
36afd451 | 113 | |
26ad648f MV |
114 | if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL) && |
115 | image_get_magic(header) == FDT_MAGIC) { | |
116 | err = spi_flash_read(flash, payload_offs, | |
117 | roundup(fdt_totalsize(header), 4), | |
118 | (void *)CONFIG_SYS_LOAD_ADDR); | |
119 | if (err) | |
120 | return err; | |
121 | err = spl_parse_image_header(spl_image, | |
122 | (struct image_header *)CONFIG_SYS_LOAD_ADDR); | |
123 | } else if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) && | |
124 | image_get_magic(header) == FDT_MAGIC) { | |
00d55956 LV |
125 | struct spl_load_info load; |
126 | ||
127 | debug("Found FIT\n"); | |
128 | load.dev = flash; | |
129 | load.priv = NULL; | |
130 | load.filename = NULL; | |
131 | load.bl_len = 1; | |
132 | load.read = spl_spi_fit_read; | |
f4d7d859 | 133 | err = spl_load_simple_fit(spl_image, &load, |
2bac55bc | 134 | payload_offs, |
00d55956 LV |
135 | header); |
136 | } else { | |
2a2ee2ac | 137 | err = spl_parse_image_header(spl_image, header); |
00d55956 LV |
138 | if (err) |
139 | return err; | |
2bac55bc | 140 | err = spi_flash_read(flash, payload_offs, |
2a2ee2ac SG |
141 | spl_image->size, |
142 | (void *)spl_image->load_addr); | |
00d55956 | 143 | } |
fa1a73fa | 144 | } |
36afd451 NK |
145 | |
146 | return err; | |
32b11273 | 147 | } |
139db7af | 148 | /* Use priorty 1 so that boards can override this */ |
ebc4ef61 | 149 | SPL_LOAD_IMAGE_METHOD("SPI", 1, BOOT_DEVICE_SPI, spl_spi_load_image); |