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Commit | Line | Data |
---|---|---|
dd84058d | 1 | CONFIG_PPC=y |
dd2986ac | 2 | CONFIG_SYS_IMMR=0xE0000000 |
278b90ce | 3 | CONFIG_SYS_TEXT_BASE=0xFFF80000 |
9802154a | 4 | CONFIG_SYS_MALLOC_LEN=0x100000 |
a09fea1d TR |
5 | CONFIG_ENV_SIZE=0x2000 |
6 | CONFIG_ENV_SECT_SIZE=0x20000 | |
f7d0ae9c | 7 | CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds_36b" |
d46e86d2 | 8 | CONFIG_ENV_ADDR=0xFFF60000 |
dd84058d | 9 | CONFIG_MPC85xx=y |
230ecd71 | 10 | # CONFIG_CMD_ERRATA is not set |
dd84058d | 11 | CONFIG_TARGET_MPC8548CDS=y |
665c35a7 | 12 | CONFIG_MPC85XX_HAVE_RESET_VECTOR=y |
bb6b142f | 13 | CONFIG_PHYS_64BIT=y |
73223f0e SG |
14 | CONFIG_OF_BOARD_SETUP=y |
15 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
2f8a6db5 | 16 | CONFIG_DYNAMIC_SYS_CLK_FREQ=y |
bb597c0e | 17 | CONFIG_BOOTDELAY=10 |
970bf860 TR |
18 | CONFIG_USE_BOOTCOMMAND=y |
19 | CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" | |
8ccf98b1 | 20 | # CONFIG_MISC_INIT_R is not set |
d7d40f61 | 21 | CONFIG_ID_EEPROM=y |
adad96e6 | 22 | CONFIG_HUSH_PARSER=y |
ad12dc18 | 23 | CONFIG_CMD_IMLS=y |
88cd7d0e | 24 | CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 |
78d1e1d0 | 25 | CONFIG_CMD_I2C=y |
6500ec7a | 26 | CONFIG_CMD_PCI=y |
fb82fe38 | 27 | CONFIG_CMD_DHCP=y |
a542e430 | 28 | CONFIG_BOOTP_BOOTFILESIZE=y |
89cb2b5f | 29 | CONFIG_CMD_MII=y |
78d1e1d0 | 30 | CONFIG_CMD_PING=y |
551c3934 | 31 | # CONFIG_CMD_HASH is not set |
665c35a7 | 32 | CONFIG_OF_CONTROL=y |
e91907a1 | 33 | CONFIG_ENV_OVERWRITE=y |
fdfb17b1 TR |
34 | CONFIG_USE_BOOTFILE=y |
35 | CONFIG_BOOTFILE="8548cds/uImage.uboot" | |
0e14cdfa TR |
36 | CONFIG_USE_ETHPRIME=y |
37 | CONFIG_ETHPRIME="eTSEC0" | |
665c35a7 | 38 | CONFIG_DM=y |
f9147d63 | 39 | CONFIG_CHIP_SELECTS_PER_CTRL=2 |
95372165 TR |
40 | CONFIG_DDR_ECC=y |
41 | CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y | |
c7fad78e TR |
42 | CONFIG_SYS_BR0_PRELIM_BOOL=y |
43 | CONFIG_SYS_BR0_PRELIM=0xFF807001 | |
44 | CONFIG_SYS_OR0_PRELIM=0xFF806E65 | |
45 | CONFIG_SYS_BR1_PRELIM_BOOL=y | |
46 | CONFIG_SYS_BR1_PRELIM=0xFF007001 | |
47 | CONFIG_SYS_OR1_PRELIM=0xFF806E65 | |
48 | CONFIG_SYS_BR2_PRELIM_BOOL=y | |
49 | CONFIG_SYS_BR2_PRELIM=0xF0007861 | |
50 | CONFIG_SYS_OR2_PRELIM=0xFC006901 | |
51 | CONFIG_SYS_BR3_PRELIM_BOOL=y | |
52 | CONFIG_SYS_BR3_PRELIM=0xF8006801 | |
53 | CONFIG_SYS_OR3_PRELIM=0xFFF00FF7 | |
b11dc33e | 54 | CONFIG_DM_I2C=y |
fc8d3b9a | 55 | CONFIG_I2C_SET_DEFAULT_BUS_NUM=y |
6d5d0c95 | 56 | CONFIG_SYS_I2C_FSL=y |
88cd7d0e | 57 | CONFIG_SYS_I2C_EEPROM_ADDR=0x57 |
8728c97e | 58 | # CONFIG_MMC is not set |
e856bdcf | 59 | CONFIG_MTD_NOR_FLASH=y |
2fe88d45 AF |
60 | CONFIG_FLASH_CFI_DRIVER=y |
61 | CONFIG_SYS_FLASH_CFI=y | |
0f9595b9 | 62 | CONFIG_SYS_MAX_FLASH_BANKS=2 |
306881a0 TR |
63 | CONFIG_PHY_ATHEROS=y |
64 | CONFIG_PHY_BROADCOM=y | |
65 | CONFIG_PHY_DAVICOM=y | |
66 | CONFIG_PHY_LXT=y | |
a8ca5c8a | 67 | CONFIG_PHY_MARVELL=y |
306881a0 TR |
68 | CONFIG_PHY_NATSEMI=y |
69 | CONFIG_PHY_REALTEK=y | |
70 | CONFIG_PHY_SMSC=y | |
71 | CONFIG_PHY_VITESSE=y | |
1989374b | 72 | CONFIG_PHY_GIGE=y |
a77fda1f | 73 | CONFIG_E1000=y |
665c35a7 TR |
74 | CONFIG_MII=y |
75 | CONFIG_TSEC_ENET=y | |
43e881e3 HZ |
76 | CONFIG_DM_PCI_COMPAT=y |
77 | CONFIG_PCIE_FSL=y | |
6f6b7cfa | 78 | CONFIG_CONS_INDEX=2 |
9e39003e | 79 | CONFIG_SYS_NS16550=y |
69be8fd1 | 80 | CONFIG_ADDR_MAP=y |