projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 252ed872 | 1 | CONFIG_PPC=y |
| 278b90ce | 2 | CONFIG_SYS_TEXT_BASE=0x00201000 |
| 77d2f7f5 | 3 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| cc4288ef | 4 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| a09fea1d TR |
5 | CONFIG_ENV_SIZE=0x2000 |
| 6 | CONFIG_ENV_OFFSET=0x140000 | |
| 2bba7807 | 7 | CONFIG_DEFAULT_DEVICE_TREE="t2080qds" |
| c5a6e9f8 | 8 | CONFIG_SPL_TEXT_BASE=0xFFFD8000 |
| df59b7d2 | 9 | CONFIG_FSL_USE_PCA9547_MUX=y |
| d06e4b7e TR |
10 | CONFIG_VID=y |
| 11 | CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" | |
| 12 | CONFIG_VOL_MONITOR_IR36021_READ=y | |
| 13 | CONFIG_VOL_MONITOR_IR36021_SET=y | |
| d43cd486 TR |
14 | CONFIG_FSL_QIXIS=y |
| 15 | # CONFIG_QIXIS_I2C_ACCESS is not set | |
| 2a736066 | 16 | CONFIG_SPL_SERIAL=y |
| 9ca00684 | 17 | CONFIG_SPL_DRIVERS_MISC=y |
| c9542eae | 18 | CONFIG_SPL=y |
| 252ed872 | 19 | CONFIG_MPC85xx=y |
| 638d5be0 | 20 | CONFIG_TARGET_T2080QDS=y |
| 54c5c2b8 | 21 | CONFIG_MP=y |
| 73223f0e SG |
22 | CONFIG_FIT=y |
| 23 | CONFIG_FIT_VERBOSE=y | |
| 24 | CONFIG_OF_BOARD_SETUP=y | |
| 25 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
| 2f8a6db5 | 26 | CONFIG_DYNAMIC_SYS_CLK_FREQ=y |
| d8ef01e9 TR |
27 | CONFIG_RAMBOOT_PBL=y |
| 28 | CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg" | |
| 29 | CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_nand_rcw.cfg" | |
| bb597c0e | 30 | CONFIG_BOOTDELAY=10 |
| 970bf860 TR |
31 | CONFIG_USE_BOOTCOMMAND=y |
| 32 | CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" | |
| 42a2d90c | 33 | CONFIG_ARCH_MISC_INIT=y |
| 02ddc147 | 34 | CONFIG_BOARD_EARLY_INIT_R=y |
| 75670c81 | 35 | # CONFIG_SPL_FRAMEWORK is not set |
| db4080d5 TR |
36 | CONFIG_SPL_NAND_BOOT=y |
| 37 | CONFIG_SPL_FSL_PBL=y | |
| 8728c97e | 38 | CONFIG_SPL_ENV_SUPPORT=y |
| 975e7cf3 | 39 | CONFIG_SPL_I2C=y |
| 6f004ada | 40 | CONFIG_SPL_MPC8XXX_INIT_DDR=y |
| 358b6a20 | 41 | CONFIG_SPL_NAND_SUPPORT=y |
| adad96e6 | 42 | CONFIG_HUSH_PARSER=y |
| ad12dc18 | 43 | CONFIG_CMD_IMLS=y |
| 89cb2b5f | 44 | CONFIG_CMD_GREPENV=y |
| 88663126 | 45 | CONFIG_CMD_I2C=y |
| 89cb2b5f | 46 | CONFIG_CMD_MMC=y |
| 78d1e1d0 TR |
47 | CONFIG_CMD_USB=y |
| 48 | CONFIG_CMD_DHCP=y | |
| 89cb2b5f | 49 | CONFIG_CMD_MII=y |
| 78d1e1d0 | 50 | CONFIG_CMD_PING=y |
| 89cb2b5f TR |
51 | CONFIG_CMD_EXT2=y |
| 52 | CONFIG_CMD_FAT=y | |
| d56b4b19 | 53 | CONFIG_CMD_MTDPARTS=y |
| 43ede0bc TR |
54 | CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" |
| 55 | CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" | |
| 432054b9 | 56 | CONFIG_OF_CONTROL=y |
| e91907a1 | 57 | CONFIG_ENV_OVERWRITE=y |
| 5dc4dfd2 | 58 | CONFIG_ENV_IS_IN_NAND=y |
| fdfb17b1 TR |
59 | CONFIG_USE_BOOTFILE=y |
| 60 | CONFIG_BOOTFILE="uImage" | |
| 0e14cdfa TR |
61 | CONFIG_USE_ETHPRIME=y |
| 62 | CONFIG_ETHPRIME="FM1@DTSEC3" | |
| 02dc1599 | 63 | CONFIG_DM=y |
| edca8cf7 | 64 | CONFIG_SYS_SATA_MAX_DEVICE=2 |
| 28522678 | 65 | CONFIG_FSL_CAAM=y |
| efb5dab7 | 66 | CONFIG_DYNAMIC_DDR_CLK_FREQ=y |
| 388de0fa | 67 | CONFIG_DIMM_SLOTS_PER_CTLR=2 |
| 95372165 TR |
68 | CONFIG_DDR_ECC=y |
| 69 | CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y | |
| b11dc33e | 70 | CONFIG_DM_I2C=y |
| 55dabcc8 | 71 | CONFIG_SPL_SYS_I2C_LEGACY=y |
| 6d5d0c95 TR |
72 | CONFIG_SYS_I2C_FSL=y |
| 73 | CONFIG_SYS_FSL_I2C_OFFSET=0x118000 | |
| 74 | CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y | |
| 75 | CONFIG_SYS_FSL_I2C2_OFFSET=0x118100 | |
| 76 | CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y | |
| 77 | CONFIG_SYS_FSL_I2C3_OFFSET=0x119000 | |
| 78 | CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y | |
| 79 | CONFIG_SYS_FSL_I2C4_OFFSET=0x119100 | |
| 88cd7d0e | 80 | CONFIG_SYS_I2C_EEPROM_ADDR=0x57 |
| 07dea2e7 | 81 | CONFIG_FSL_ESDHC=y |
| 0cfccb54 | 82 | CONFIG_MTD=y |
| 2fe88d45 AF |
83 | CONFIG_MTD_NOR_FLASH=y |
| 84 | CONFIG_FLASH_CFI_DRIVER=y | |
| 85 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y | |
| 86 | CONFIG_FLASH_CFI_MTD=y | |
| 87 | CONFIG_SYS_FLASH_CFI=y | |
| 0f9595b9 | 88 | CONFIG_SYS_MAX_FLASH_BANKS=2 |
| 88718be3 | 89 | CONFIG_MTD_RAW_NAND=y |
| 53f06134 | 90 | CONFIG_NAND_FSL_IFC=y |
| c0ad62c5 | 91 | CONFIG_SYS_NAND_ONFI_DETECTION=y |
| 9ec4df33 TR |
92 | CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y |
| 93 | CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000 | |
| b24550ac | 94 | CONFIG_DM_SPI_FLASH=y |
| 14453fbf | 95 | CONFIG_SF_DEFAULT_SPEED=10000000 |
| 68d53420 BM |
96 | CONFIG_SPI_FLASH_EON=y |
| 97 | CONFIG_SPI_FLASH_STMICRO=y | |
| 98 | CONFIG_SPI_FLASH_SST=y | |
| 3146f0c0 | 99 | CONFIG_PHYLIB=y |
| 1c650108 | 100 | CONFIG_PHY_AQUANTIA=y |
| 306881a0 TR |
101 | CONFIG_PHY_REALTEK=y |
| 102 | CONFIG_PHY_TERANETICS=y | |
| 103 | CONFIG_PHY_VITESSE=y | |
| a77fda1f | 104 | CONFIG_E1000=y |
| cc1e98b5 | 105 | CONFIG_FMAN_ENET=y |
| a97a071d | 106 | CONFIG_SYS_FMAN_FW_ADDR=0x160000 |
| d7869b21 | 107 | CONFIG_MII=y |
| 70833d53 HZ |
108 | CONFIG_DM_PCI_COMPAT=y |
| 109 | CONFIG_PCIE_FSL=y | |
| 344a0e43 | 110 | CONFIG_SYS_QE_FMAN_FW_IN_NAND=y |
| 9e39003e | 111 | CONFIG_SYS_NS16550=y |
| f1b1f770 | 112 | CONFIG_SPI=y |
| b24550ac | 113 | CONFIG_DM_SPI=y |
| e5d5d447 | 114 | CONFIG_FSL_ESPI=y |
| 645176d1 | 115 | CONFIG_USB=y |
| f76750d1 | 116 | CONFIG_USB_EHCI_FSL=y |
| 645176d1 | 117 | CONFIG_USB_STORAGE=y |
| 69be8fd1 MS |
118 | CONFIG_ADDR_MAP=y |
| 119 | CONFIG_SYS_NUM_ADDR_MAP=64 |