]> git.ipfire.org Git - u-boot.git/blame - configs/chromebit_mickey_defconfig
disk: convert CONFIG_MAC_PARTITION to Kconfig
[u-boot.git] / configs / chromebit_mickey_defconfig
CommitLineData
e70408c0
SG
1CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
3CONFIG_SYS_MALLOC_F_LEN=0x2000
4# CONFIG_SPL_MMC_SUPPORT is not set
5CONFIG_ROCKCHIP_RK3288=y
6CONFIG_TARGET_CHROMEBIT_MICKEY=y
7CONFIG_SPL_SPI_FLASH_SUPPORT=y
8CONFIG_SPL_SPI_SUPPORT=y
9CONFIG_SPL_STACK_R_ADDR=0x80000
e70408c0
SG
10CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey"
11# CONFIG_DISPLAY_CPUINFO is not set
12CONFIG_SPL_STACK_R=y
13CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
e70408c0
SG
14# CONFIG_CMD_IMLS is not set
15CONFIG_CMD_MMC=y
16CONFIG_CMD_SF=y
17CONFIG_CMD_SPI=y
18CONFIG_CMD_I2C=y
19CONFIG_CMD_GPIO=y
20# CONFIG_CMD_SETEXPR is not set
e70408c0
SG
21CONFIG_CMD_CACHE=y
22CONFIG_CMD_TIME=y
23CONFIG_CMD_PMIC=y
24CONFIG_CMD_REGULATOR=y
e70408c0
SG
25CONFIG_SPL_OF_CONTROL=y
26CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
18780951 27CONFIG_SPL_OF_PLATDATA=y
e70408c0
SG
28CONFIG_REGMAP=y
29CONFIG_SPL_REGMAP=y
30CONFIG_SYSCON=y
31CONFIG_SPL_SYSCON=y
32# CONFIG_SPL_SIMPLE_BUS is not set
33CONFIG_CLK=y
34CONFIG_SPL_CLK=y
35CONFIG_ROCKCHIP_GPIO=y
36CONFIG_I2C_CROS_EC_TUNNEL=y
37CONFIG_SYS_I2C_ROCKCHIP=y
38CONFIG_I2C_MUX=y
18780951 39CONFIG_DM_KEYBOARD=y
e70408c0 40CONFIG_CROS_EC_KEYB=y
e70408c0
SG
41CONFIG_CROS_EC=y
42CONFIG_CROS_EC_SPI=y
43CONFIG_PWRSEQ=y
55ed3b46 44CONFIG_MMC_DW=y
fed44087 45CONFIG_MMC_DW_ROCKCHIP=y
e70408c0
SG
46CONFIG_PINCTRL=y
47CONFIG_SPL_PINCTRL=y
48# CONFIG_SPL_PINCTRL_FULL is not set
49CONFIG_ROCKCHIP_RK3288_PINCTRL=y
50CONFIG_DM_PMIC=y
51# CONFIG_SPL_PMIC_CHILDREN is not set
52CONFIG_PMIC_RK808=y
e70408c0
SG
53CONFIG_SPL_DM_REGULATOR=y
54CONFIG_DM_REGULATOR_FIXED=y
55CONFIG_REGULATOR_RK808=y
e70408c0
SG
56CONFIG_PWM_ROCKCHIP=y
57CONFIG_RAM=y
58CONFIG_SPL_RAM=y
59CONFIG_DEBUG_UART=y
60CONFIG_DEBUG_UART_BASE=0xff690000
61CONFIG_DEBUG_UART_CLOCK=24000000
62CONFIG_DEBUG_UART_SHIFT=2
63CONFIG_SYS_NS16550=y
64CONFIG_ROCKCHIP_SERIAL=y
65CONFIG_ROCKCHIP_SPI=y
66CONFIG_SYSRESET=y
67CONFIG_DM_VIDEO=y
68CONFIG_DISPLAY=y
69CONFIG_VIDEO_ROCKCHIP=y
70CONFIG_USE_TINY_PRINTF=y
71CONFIG_CMD_DHRYSTONE=y
72CONFIG_ERRNO_STR=y
e70408c0 73# CONFIG_SPL_OF_LIBFDT is not set