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Commit | Line | Data |
---|---|---|
4aae15d3 AF |
1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_IMX8M=y | |
3 | CONFIG_TEXT_BASE=0x40200000 | |
4 | CONFIG_SYS_MALLOC_LEN=0x2000000 | |
5 | CONFIG_SPL_GPIO=y | |
6 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | |
7 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
8 | CONFIG_NR_DRAM_BANKS=1 | |
c960c0fd | 9 | CONFIG_SF_DEFAULT_SPEED=40000000 |
4aae15d3 AF |
10 | CONFIG_ENV_SIZE=0x2000 |
11 | CONFIG_ENV_OFFSET=0xFFFFDE00 | |
12 | CONFIG_DM_GPIO=y | |
13 | CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit" | |
14 | CONFIG_SPL_TEXT_BASE=0x912000 | |
15 | CONFIG_TARGET_IMX8MN_BEACON=y | |
16 | CONFIG_SYS_PROMPT="u-boot=> " | |
c960c0fd | 17 | CONFIG_OF_LIBFDT_OVERLAY=y |
fcb5117d | 18 | CONFIG_DM_RESET=y |
c90e1893 | 19 | CONFIG_SYS_MONITOR_LEN=524288 |
4aae15d3 AF |
20 | CONFIG_SPL_SERIAL=y |
21 | CONFIG_SPL_DRIVERS_MISC=y | |
fcb5117d | 22 | CONFIG_SPL_STACK=0x980000 |
4aae15d3 AF |
23 | CONFIG_SPL=y |
24 | CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 | |
25 | CONFIG_SYS_LOAD_ADDR=0x42000000 | |
26 | CONFIG_SYS_MEMTEST_START=0x40000000 | |
27 | CONFIG_SYS_MEMTEST_END=0x44000000 | |
28 | CONFIG_LTO=y | |
29 | CONFIG_REMAKE_ELF=y | |
4aae15d3 AF |
30 | CONFIG_FIT=y |
31 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | |
32 | CONFIG_SPL_LOAD_FIT=y | |
4aae15d3 AF |
33 | CONFIG_OF_SYSTEM_SETUP=y |
34 | CONFIG_USE_BOOTCOMMAND=y | |
35 | CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" | |
36 | CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" | |
4aae15d3 AF |
37 | CONFIG_SPL_MAX_SIZE=0x25000 |
38 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y | |
39 | CONFIG_SPL_BSS_START_ADDR=0x950000 | |
40 | CONFIG_SPL_BSS_MAX_SIZE=0x2000 | |
41 | CONFIG_SPL_BOARD_INIT=y | |
42 | CONFIG_SPL_BOOTROM_SUPPORT=y | |
43 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set | |
4aae15d3 AF |
44 | CONFIG_SYS_SPL_MALLOC=y |
45 | CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y | |
46 | CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 | |
47 | CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 | |
48 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y | |
49 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 | |
50 | CONFIG_SPL_I2C=y | |
51 | CONFIG_SPL_POWER=y | |
52 | CONFIG_SPL_WATCHDOG=y | |
53 | CONFIG_HUSH_PARSER=y | |
54 | CONFIG_SYS_MAXARGS=64 | |
55 | CONFIG_SYS_CBSIZE=2048 | |
56 | CONFIG_SYS_PBSIZE=2074 | |
57 | # CONFIG_BOOTM_NETBSD is not set | |
58 | CONFIG_SYS_BOOTM_LEN=0x800000 | |
59 | # CONFIG_CMD_EXPORTENV is not set | |
60 | # CONFIG_CMD_IMPORTENV is not set | |
61 | CONFIG_CMD_ERASEENV=y | |
62 | # CONFIG_CMD_CRC32 is not set | |
63 | CONFIG_CMD_MEMTEST=y | |
64 | CONFIG_CMD_CLK=y | |
65 | CONFIG_CMD_FUSE=y | |
66 | CONFIG_CMD_GPIO=y | |
67 | CONFIG_CMD_I2C=y | |
68 | CONFIG_CMD_MMC=y | |
69 | CONFIG_CMD_PART=y | |
70 | CONFIG_CMD_SPI=y | |
71 | CONFIG_CMD_DHCP=y | |
72 | CONFIG_CMD_MII=y | |
73 | CONFIG_CMD_PING=y | |
74 | CONFIG_CMD_CACHE=y | |
75 | CONFIG_CMD_REGULATOR=y | |
76 | CONFIG_CMD_EXT2=y | |
77 | CONFIG_CMD_EXT4=y | |
78 | CONFIG_CMD_EXT4_WRITE=y | |
79 | CONFIG_CMD_FAT=y | |
80 | CONFIG_OF_CONTROL=y | |
81 | CONFIG_SPL_OF_CONTROL=y | |
82 | CONFIG_ENV_OVERWRITE=y | |
83 | CONFIG_ENV_IS_NOWHERE=y | |
84 | CONFIG_ENV_IS_IN_MMC=y | |
85 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | |
86 | CONFIG_SYS_MMC_ENV_DEV=2 | |
87 | CONFIG_SYS_MMC_ENV_PART=2 | |
88 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | |
89 | CONFIG_USE_ETHPRIME=y | |
90 | CONFIG_ETHPRIME="FEC" | |
91 | CONFIG_NET_RANDOM_ETHADDR=y | |
92 | CONFIG_SPL_DM=y | |
93 | CONFIG_REGMAP=y | |
94 | CONFIG_SYSCON=y | |
95 | CONFIG_SPL_CLK_IMX8MN=y | |
96 | CONFIG_CLK_IMX8MN=y | |
97 | CONFIG_USB_FUNCTION_FASTBOOT=y | |
98 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 | |
99 | CONFIG_FASTBOOT_BUF_SIZE=0x40000000 | |
100 | CONFIG_FASTBOOT_FLASH=y | |
101 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | |
102 | CONFIG_MXC_GPIO=y | |
103 | CONFIG_DM_PCA953X=y | |
104 | CONFIG_DM_I2C=y | |
105 | CONFIG_SUPPORT_EMMC_BOOT=y | |
106 | CONFIG_MMC_IO_VOLTAGE=y | |
107 | CONFIG_MMC_UHS_SUPPORT=y | |
108 | CONFIG_MMC_HS400_ES_SUPPORT=y | |
109 | CONFIG_MMC_HS400_SUPPORT=y | |
110 | CONFIG_FSL_USDHC=y | |
111 | CONFIG_MTD=y | |
112 | CONFIG_DM_MTD=y | |
113 | CONFIG_DM_SPI_FLASH=y | |
4aae15d3 AF |
114 | CONFIG_SPI_FLASH_BAR=y |
115 | CONFIG_SPI_FLASH_STMICRO=y | |
116 | CONFIG_SPI_FLASH_MTD=y | |
117 | CONFIG_PHYLIB=y | |
118 | CONFIG_PHY_ATHEROS=y | |
119 | CONFIG_PHY_GIGE=y | |
120 | CONFIG_FEC_MXC=y | |
121 | CONFIG_MII=y | |
122 | CONFIG_PINCTRL=y | |
123 | CONFIG_SPL_PINCTRL=y | |
124 | CONFIG_PINCTRL_IMX8M=y | |
125 | CONFIG_DM_PMIC=y | |
126 | # CONFIG_SPL_PMIC_CHILDREN is not set | |
127 | CONFIG_DM_PMIC_BD71837=y | |
128 | CONFIG_SPL_DM_PMIC_BD71837=y | |
129 | CONFIG_DM_REGULATOR=y | |
130 | CONFIG_DM_REGULATOR_BD71837=y | |
131 | CONFIG_DM_REGULATOR_FIXED=y | |
132 | CONFIG_DM_REGULATOR_GPIO=y | |
4aae15d3 AF |
133 | CONFIG_DM_SERIAL=y |
134 | CONFIG_MXC_UART=y | |
135 | CONFIG_SPI=y | |
136 | CONFIG_DM_SPI=y | |
137 | CONFIG_NXP_FSPI=y | |
138 | CONFIG_SYSRESET=y | |
139 | CONFIG_SPL_SYSRESET=y | |
140 | CONFIG_SYSRESET_PSCI=y | |
141 | CONFIG_SYSRESET_WATCHDOG=y | |
142 | CONFIG_DM_THERMAL=y | |
143 | CONFIG_USB=y | |
144 | # CONFIG_SPL_DM_USB is not set | |
145 | CONFIG_USB_EHCI_HCD=y | |
146 | CONFIG_USB_GADGET=y | |
147 | CONFIG_USB_GADGET_MANUFACTURER="FSL" | |
148 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 | |
149 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 | |
150 | CONFIG_CI_UDC=y | |
151 | CONFIG_SDP_LOADADDR=0x0 | |
152 | CONFIG_IMX_WATCHDOG=y | |
4aae15d3 AF |
153 | CONFIG_FSPI_CONF_HEADER=y |
154 | CONFIG_FSPI_CONF_FILE="fspi_header.bin" |