projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| dd84058d | 1 | CONFIG_PPC=y |
| 278b90ce | 2 | CONFIG_SYS_TEXT_BASE=0xF0000000 |
| ff3bb0c4 | 3 | CONFIG_SYS_CLK_FREQ=66000000 |
| dd84058d | 4 | CONFIG_MPC83xx=y |
| 30915ab9 | 5 | CONFIG_HIGH_BATS=y |
| 009c87a2 | 6 | CONFIG_TARGET_KMETER1=y |
| 21c1502a MS |
7 | CONFIG_DDR_MC_CLOCK_MODE_1_1=y |
| 8 | CONFIG_SYSTEM_PLL_VCO_DIV_4=y | |
| 9 | CONFIG_SYSTEM_PLL_FACTOR_4_1=y | |
| 10 | CONFIG_CORE_PLL_RATIO_2_1=y | |
| 11 | CONFIG_QUICC_MULT_FACTOR_6=y | |
| 12 | CONFIG_BOOT_MEMORY_SPACE_LOW=y | |
| 13 | CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y | |
| 14 | CONFIG_LALE_TIMING_EARLIER=y | |
| 15 | CONFIG_LDP_PIN_MUX_STATE_0=y | |
| 30915ab9 MS |
16 | CONFIG_BAT0=y |
| 17 | CONFIG_BAT0_NAME="SDRAM" | |
| 18 | CONFIG_BAT0_BASE=0x00000000 | |
| 19 | CONFIG_BAT0_LENGTH_256_MBYTES=y | |
| 20 | CONFIG_BAT0_ACCESS_RW=y | |
| 21 | CONFIG_BAT0_ICACHE_INHIBITED=y | |
| 22 | CONFIG_BAT0_ICACHE_GUARDED=y | |
| 23 | CONFIG_BAT0_DCACHE_INHIBITED=y | |
| 24 | CONFIG_BAT0_DCACHE_GUARDED=y | |
| 25 | CONFIG_BAT0_USER_MODE_VALID=y | |
| 26 | CONFIG_BAT0_SUPERVISOR_MODE_VALID=y | |
| 27 | CONFIG_BAT1=y | |
| 28 | CONFIG_BAT1_NAME="IMMR" | |
| 29 | CONFIG_BAT1_BASE=0xE0000000 | |
| 30 | CONFIG_BAT1_LENGTH_4_MBYTES=y | |
| 31 | CONFIG_BAT1_ACCESS_RW=y | |
| 32 | CONFIG_BAT1_ICACHE_INHIBITED=y | |
| 33 | CONFIG_BAT1_ICACHE_GUARDED=y | |
| 34 | CONFIG_BAT1_DCACHE_INHIBITED=y | |
| 35 | CONFIG_BAT1_DCACHE_GUARDED=y | |
| 36 | CONFIG_BAT1_USER_MODE_VALID=y | |
| 37 | CONFIG_BAT1_SUPERVISOR_MODE_VALID=y | |
| 38 | CONFIG_BAT2=y | |
| 39 | CONFIG_BAT2_NAME="KMBEC_FPGA" | |
| 40 | CONFIG_BAT2_BASE=0xE8000000 | |
| 41 | CONFIG_BAT2_LENGTH_128_MBYTES=y | |
| 42 | CONFIG_BAT2_ACCESS_RW=y | |
| 43 | CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y | |
| 44 | CONFIG_BAT2_DCACHE_INHIBITED=y | |
| 45 | CONFIG_BAT2_DCACHE_GUARDED=y | |
| 46 | CONFIG_BAT2_USER_MODE_VALID=y | |
| 47 | CONFIG_BAT2_SUPERVISOR_MODE_VALID=y | |
| 48 | CONFIG_BAT3=y | |
| 49 | CONFIG_BAT3_NAME="FLASH" | |
| 50 | CONFIG_BAT3_BASE=0xF0000000 | |
| 51 | CONFIG_BAT3_LENGTH_256_MBYTES=y | |
| 52 | CONFIG_BAT3_ACCESS_RW=y | |
| 53 | CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y | |
| 54 | CONFIG_BAT3_DCACHE_INHIBITED=y | |
| 55 | CONFIG_BAT3_DCACHE_GUARDED=y | |
| 56 | CONFIG_BAT3_USER_MODE_VALID=y | |
| 57 | CONFIG_BAT3_SUPERVISOR_MODE_VALID=y | |
| 58 | CONFIG_BAT5=y | |
| 59 | CONFIG_BAT5_NAME="PAXE" | |
| 60 | CONFIG_BAT5_BASE=0xA0000000 | |
| 61 | CONFIG_BAT5_LENGTH_256_MBYTES=y | |
| 62 | CONFIG_BAT5_ACCESS_RW=y | |
| 63 | CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y | |
| 64 | CONFIG_BAT5_DCACHE_INHIBITED=y | |
| 65 | CONFIG_BAT5_DCACHE_GUARDED=y | |
| 66 | CONFIG_BAT5_USER_MODE_VALID=y | |
| 67 | CONFIG_BAT5_SUPERVISOR_MODE_VALID=y | |
| 9c5df7a2 MS |
68 | CONFIG_LBLAW0=y |
| 69 | CONFIG_LBLAW0_BASE=0xF0000000 | |
| 70 | CONFIG_LBLAW0_NAME="FLASH" | |
| 71 | CONFIG_LBLAW0_LENGTH_256_MBYTES=y | |
| 72 | CONFIG_LBLAW1=y | |
| 73 | CONFIG_LBLAW1_BASE=0xE8000000 | |
| 74 | CONFIG_LBLAW1_NAME="KMBEC_FPGA" | |
| 75 | CONFIG_LBLAW1_LENGTH_128_MBYTES=y | |
| 76 | CONFIG_LBLAW3=y | |
| 77 | CONFIG_LBLAW3_BASE=0xA0000000 | |
| 78 | CONFIG_LBLAW3_NAME="PAXE" | |
| 79 | CONFIG_LBLAW3_LENGTH_512_MBYTES=y | |
| 73223f0e SG |
80 | CONFIG_OF_BOARD_SETUP=y |
| 81 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
| 8ccf98b1 | 82 | CONFIG_MISC_INIT_R=y |
| 9dd1d0aa | 83 | CONFIG_VERSION_VARIABLE=y |
| 02ddc147 | 84 | CONFIG_BOARD_EARLY_INIT_R=y |
| 2aeb22d9 | 85 | CONFIG_LAST_STAGE_INIT=y |
| adad96e6 | 86 | CONFIG_HUSH_PARSER=y |
| 78d1e1d0 TR |
87 | CONFIG_AUTOBOOT_KEYED=y |
| 88 | CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" | |
| 89 | CONFIG_AUTOBOOT_STOP_STR=" " | |
| ad12dc18 | 90 | CONFIG_CMD_IMLS=y |
| 89cb2b5f TR |
91 | CONFIG_CMD_ASKENV=y |
| 92 | CONFIG_CMD_GREPENV=y | |
| a1dc980d | 93 | CONFIG_CMD_EEPROM=y |
| 78d1e1d0 TR |
94 | CONFIG_CMD_I2C=y |
| 95 | CONFIG_CMD_DHCP=y | |
| 89cb2b5f | 96 | CONFIG_CMD_MII=y |
| 78d1e1d0 | 97 | CONFIG_CMD_PING=y |
| b8682a7f | 98 | CONFIG_CMD_JFFS2=y |
| cbabe7f8 | 99 | CONFIG_CMD_MTDPARTS=y |
| 43ede0bc TR |
100 | CONFIG_MTDIDS_DEFAULT="nor0=boot" |
| 101 | CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);" | |
| 8f2fe0c8 | 102 | CONFIG_CMD_UBI=y |
| d56b4b19 | 103 | # CONFIG_CMD_UBIFS is not set |
| d1ec9461 | 104 | CONFIG_BOOTCOUNT_LIMIT=y |
| ca0d535e | 105 | CONFIG_BOOTCOUNT_BOOTLIMIT=3 |
| 39bcbb77 | 106 | CONFIG_SYS_BOOTCOUNT_ADDR=0xE011BFF8 |
| 8728c97e | 107 | # CONFIG_MMC is not set |
| e856bdcf | 108 | CONFIG_MTD_NOR_FLASH=y |
| 9c5b0097 | 109 | CONFIG_MTD_DEVICE=y |
| 2fe88d45 AF |
110 | CONFIG_FLASH_CFI_DRIVER=y |
| 111 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y | |
| 112 | CONFIG_FLASH_CFI_MTD=y | |
| 113 | CONFIG_SYS_FLASH_PROTECTION=y | |
| 114 | CONFIG_SYS_FLASH_CFI=y | |
| af27382e | 115 | # CONFIG_PCI is not set |
| 9e39003e | 116 | CONFIG_SYS_NS16550=y |
| 69e173eb | 117 | CONFIG_OF_LIBFDT=y |
| fe7d654d MS |
118 | CONFIG_ELBC_BR0_OR0=y |
| 119 | CONFIG_BR0_OR0_NAME="FLASH" | |
| 120 | CONFIG_BR0_OR0_BASE=0xF0000000 | |
| 121 | CONFIG_BR0_MACHINE_GPCM=y | |
| 122 | CONFIG_BR0_PORTSIZE_16BIT=y | |
| 123 | CONFIG_OR0_AM_256_MBYTES=y | |
| 124 | CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y | |
| 125 | CONFIG_OR0_CSNT_EARLIER=y | |
| 126 | CONFIG_OR0_EAD_EXTRA=y | |
| 127 | CONFIG_OR0_SCY_5=y | |
| 128 | CONFIG_OR0_TRLX_RELAXED=y | |
| 129 | CONFIG_ELBC_BR1_OR1=y | |
| 130 | CONFIG_BR1_OR1_NAME="KMBEC_FPGA" | |
| 131 | CONFIG_BR1_OR1_BASE=0xE8000000 | |
| 132 | CONFIG_BR1_MACHINE_GPCM=y | |
| 133 | CONFIG_BR1_PORTSIZE_8BIT=y | |
| 134 | CONFIG_OR1_AM_64_MBYTES=y | |
| 135 | CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y | |
| 136 | CONFIG_OR1_CSNT_EARLIER=y | |
| 137 | CONFIG_OR1_EAD_EXTRA=y | |
| 138 | CONFIG_OR1_SCY_2=y | |
| 139 | CONFIG_OR1_TRLX_RELAXED=y | |
| 140 | CONFIG_ELBC_BR3_OR3=y | |
| 141 | CONFIG_BR3_OR3_NAME="PAXE" | |
| 142 | CONFIG_BR3_OR3_BASE=0xA0000000 | |
| 143 | CONFIG_BR3_PORTSIZE_8BIT=y | |
| 144 | CONFIG_OR3_AM_256_MBYTES=y | |
| 145 | CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y | |
| 146 | CONFIG_OR3_CSNT_EARLIER=y | |
| 147 | CONFIG_OR3_EAD_EXTRA=y | |
| 148 | CONFIG_OR3_SCY_2=y | |
| 149 | CONFIG_OR3_TRLX_RELAXED=y |