projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| ff78aa2b PK |
1 | CONFIG_ARM=y |
| 2 | CONFIG_TARGET_LS1012AFRDM=y | |
| 278b90ce | 3 | CONFIG_SYS_TEXT_BASE=0x40100000 |
| a09fea1d TR |
4 | CONFIG_ENV_SIZE=0x40000 |
| 5 | CONFIG_ENV_OFFSET=0x300000 | |
| 556fd590 | 6 | CONFIG_ENV_SECT_SIZE=0x40000 |
| 4244429f | 7 | CONFIG_DM_GPIO=y |
| 052170c6 TR |
8 | CONFIG_FSL_LS_PPA=y |
| 9 | CONFIG_QSPI_AHB_INIT=y | |
| 86cf1c82 | 10 | CONFIG_NR_DRAM_BANKS=2 |
| d168bcb6 | 11 | CONFIG_DISTRO_DEFAULTS=y |
| aca5cd27 | 12 | # CONFIG_SYS_MALLOC_F is not set |
| ff78aa2b PK |
13 | CONFIG_FIT_VERBOSE=y |
| 14 | CONFIG_OF_BOARD_SETUP=y | |
| 15 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
| 16 | CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" | |
| 6f0aea39 | 17 | CONFIG_QSPI_BOOT=y |
| bb597c0e | 18 | CONFIG_BOOTDELAY=10 |
| 5abc1a45 SP |
19 | CONFIG_USE_BOOTARGS=y |
| 20 | CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" | |
| 84351792 | 21 | # CONFIG_DISPLAY_BOARDINFO is not set |
| 78eba69d | 22 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| ff78aa2b | 23 | CONFIG_CMD_GREPENV=y |
| e89f8aae | 24 | CONFIG_CMD_MEMTEST=y |
| 702de89c ARS |
25 | CONFIG_SYS_MEMTEST_START=0x80000000 |
| 26 | CONFIG_SYS_MEMTEST_END=0x9fffffff | |
| b331cd62 | 27 | CONFIG_CMD_GPT=y |
| ff78aa2b PK |
28 | CONFIG_CMD_I2C=y |
| 29 | CONFIG_CMD_USB=y | |
| 30 | # CONFIG_CMD_SETEXPR is not set | |
| ff78aa2b | 31 | CONFIG_CMD_CACHE=y |
| ff78aa2b | 32 | CONFIG_OF_CONTROL=y |
| 8c5cad05 | 33 | CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" |
| 5dc4dfd2 | 34 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| 8d8ee47e | 35 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| ff78aa2b PK |
36 | CONFIG_NET_RANDOM_ETHADDR=y |
| 37 | CONFIG_DM=y | |
| 556fd590 | 38 | CONFIG_BLK=y |
| 4244429f | 39 | CONFIG_DM_I2C=y |
| b331cd62 | 40 | # CONFIG_MMC is not set |
| 63ea3172 | 41 | CONFIG_MTD=y |
| 0cfccb54 | 42 | CONFIG_DM_SPI_FLASH=y |
| 74942327 | 43 | # CONFIG_SPI_FLASH_BAR is not set |
| e90cc475 | 44 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |
| c9542eae | 45 | CONFIG_FSL_PFE=y |
| a802d1e2 | 46 | CONFIG_DM_ETH=y |
| 41873d15 | 47 | CONFIG_E1000=y |
| b331cd62 PD |
48 | CONFIG_PCI=y |
| 49 | CONFIG_DM_PCI=y | |
| 50 | CONFIG_DM_PCI_COMPAT=y | |
| 51 | CONFIG_PCIE_LAYERSCAPE=y | |
| 4244429f | 52 | CONFIG_DM_RTC=y |
| ff78aa2b | 53 | CONFIG_SYS_NS16550=y |
| f1b1f770 | 54 | CONFIG_SPI=y |
| aca5cd27 | 55 | CONFIG_DM_SPI=y |
| 74942327 | 56 | CONFIG_FSL_QSPI=y |
| ffd85997 | 57 | CONFIG_USB=y |
| 57dfe200 | 58 | CONFIG_DM_USB=y |
| ffd85997 TR |
59 | CONFIG_USB_XHCI_HCD=y |
| 60 | CONFIG_USB_XHCI_DWC3=y |