spl: socfpga: Implement fpga bitstream loading with socfpga loadfs

[thirdparty/u-boot.git] / configs / ls1046ardb_qspi_SECURE_BOOT_defconfig

CONFIG_ARM=y
CONFIG_TARGET_LS1046ARDB=y
CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_SECURE_BOOT=y
CONFIG_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_MISC_INIT_R=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
CONFIG_MP=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y