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Commit | Line | Data |
---|---|---|
c661c511 TR |
1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_IMX8M=y | |
3 | CONFIG_SYS_TEXT_BASE=0x40200000 | |
83061dbd | 4 | CONFIG_SPL_GPIO=y |
c661c511 TR |
5 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
6 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
7 | CONFIG_SYS_MALLOC_F_LEN=0x10000 | |
8 | CONFIG_ENV_SIZE=0x10000 | |
9 | CONFIG_ENV_OFFSET=0x3C0000 | |
10 | CONFIG_SYS_I2C_MXC_I2C1=y | |
7cfbba36 | 11 | CONFIG_SYS_MALLOC_LEN=0x2000000 |
c661c511 | 12 | CONFIG_DM_GPIO=y |
2bba7807 | 13 | CONFIG_DEFAULT_DEVICE_TREE="imx8mp-phyboard-pollux-rdk" |
c661c511 TR |
14 | CONFIG_SPL_TEXT_BASE=0x920000 |
15 | CONFIG_TARGET_PHYCORE_IMX8MP=y | |
103c5f18 | 16 | CONFIG_SPL_MMC=y |
c661c511 | 17 | CONFIG_SPL_SERIAL_SUPPORT=y |
9ca00684 | 18 | CONFIG_SPL_DRIVERS_MISC=y |
c661c511 TR |
19 | CONFIG_SPL=y |
20 | CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 | |
49c8ef0e | 21 | CONFIG_SYS_LOAD_ADDR=0x40480000 |
c661c511 TR |
22 | CONFIG_FIT=y |
23 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | |
24 | CONFIG_SPL_LOAD_FIT=y | |
bbf04b28 | 25 | # CONFIG_USE_SPL_FIT_GENERATOR is not set |
c661c511 | 26 | CONFIG_OF_SYSTEM_SETUP=y |
c661c511 TR |
27 | CONFIG_DEFAULT_FDT_FILE="oftree" |
28 | CONFIG_BOARD_LATE_INIT=y | |
0f166b85 | 29 | CONFIG_SPL_BOARD_INIT=y |
c661c511 TR |
30 | CONFIG_SPL_BOOTROM_SUPPORT=y |
31 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y | |
32 | CONFIG_SPL_SEPARATE_BSS=y | |
975e7cf3 | 33 | CONFIG_SPL_I2C=y |
933b2f09 | 34 | CONFIG_SPL_POWER=y |
078111b9 | 35 | CONFIG_SPL_WATCHDOG=y |
c661c511 TR |
36 | CONFIG_HUSH_PARSER=y |
37 | CONFIG_SYS_PROMPT="u-boot=> " | |
38 | # CONFIG_CMD_EXPORTENV is not set | |
39 | # CONFIG_CMD_IMPORTENV is not set | |
40 | # CONFIG_CMD_CRC32 is not set | |
41 | CONFIG_CMD_EEPROM=y | |
88cd7d0e TR |
42 | CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 |
43 | CONFIG_SYS_EEPROM_SIZE=4096 | |
44 | CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5 | |
45 | CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 | |
c661c511 TR |
46 | CONFIG_CMD_CLK=y |
47 | CONFIG_CMD_FUSE=y | |
48 | CONFIG_CMD_GPIO=y | |
49 | CONFIG_CMD_I2C=y | |
50 | CONFIG_CMD_MMC=y | |
51 | CONFIG_CMD_DHCP=y | |
52 | CONFIG_CMD_MII=y | |
53 | CONFIG_CMD_PING=y | |
54 | CONFIG_CMD_CACHE=y | |
55 | CONFIG_CMD_REGULATOR=y | |
56 | CONFIG_CMD_EXT2=y | |
57 | CONFIG_CMD_EXT4=y | |
58 | CONFIG_CMD_EXT4_WRITE=y | |
59 | CONFIG_CMD_FAT=y | |
60 | CONFIG_OF_CONTROL=y | |
61 | CONFIG_SPL_OF_CONTROL=y | |
62 | CONFIG_ENV_OVERWRITE=y | |
63 | CONFIG_ENV_IS_IN_MMC=y | |
64 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | |
65 | CONFIG_SYS_MMC_ENV_DEV=2 | |
66 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y | |
60f64bec | 67 | CONFIG_NET_RANDOM_ETHADDR=y |
c661c511 TR |
68 | CONFIG_SPL_DM=y |
69 | CONFIG_CLK_COMPOSITE_CCF=y | |
70 | CONFIG_CLK_IMX8MP=y | |
71 | CONFIG_MXC_GPIO=y | |
72 | CONFIG_DM_I2C=y | |
a907dce8 | 73 | # CONFIG_SPL_DM_I2C is not set |
55dabcc8 | 74 | CONFIG_SPL_SYS_I2C_LEGACY=y |
c661c511 TR |
75 | CONFIG_MISC=y |
76 | CONFIG_I2C_EEPROM=y | |
77 | CONFIG_SYS_I2C_EEPROM_ADDR=0x51 | |
c661c511 | 78 | CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 |
c661c511 TR |
79 | CONFIG_SUPPORT_EMMC_BOOT=y |
80 | CONFIG_MMC_IO_VOLTAGE=y | |
81 | CONFIG_MMC_UHS_SUPPORT=y | |
82 | CONFIG_MMC_HS400_ES_SUPPORT=y | |
83 | CONFIG_MMC_HS400_SUPPORT=y | |
84 | CONFIG_FSL_ESDHC_IMX=y | |
60f64bec TR |
85 | CONFIG_PHYLIB=y |
86 | CONFIG_PHY_TI_DP83867=y | |
c661c511 | 87 | CONFIG_DM_ETH=y |
60f64bec TR |
88 | CONFIG_DM_ETH_PHY=y |
89 | CONFIG_FEC_MXC=y | |
90 | CONFIG_RGMII=y | |
91 | CONFIG_MII=y | |
c661c511 TR |
92 | CONFIG_PINCTRL=y |
93 | CONFIG_SPL_PINCTRL=y | |
94 | CONFIG_PINCTRL_IMX8M=y | |
95 | CONFIG_DM_REGULATOR=y | |
96 | CONFIG_DM_REGULATOR_FIXED=y | |
97 | CONFIG_DM_REGULATOR_GPIO=y | |
98 | CONFIG_MXC_UART=y | |
99 | CONFIG_SYSRESET=y | |
100 | CONFIG_SPL_SYSRESET=y | |
101 | CONFIG_SYSRESET_PSCI=y | |
102 | CONFIG_SYSRESET_WATCHDOG=y | |
103 | CONFIG_DM_THERMAL=y | |
104 | CONFIG_IMX_WATCHDOG=y |