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Commit | Line | Data |
---|---|---|
47197682 HS |
1 | CONFIG_ARM=y |
2 | # CONFIG_SPL_USE_ARCH_MEMCPY is not set | |
3 | # CONFIG_SPL_USE_ARCH_MEMSET is not set | |
4 | CONFIG_ARCH_ROCKCHIP=y | |
5 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | |
6 | CONFIG_ROCKCHIP_RK3188=y | |
ee14d29d | 7 | CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y |
47197682 HS |
8 | CONFIG_TARGET_ROCK=y |
9 | CONFIG_SPL_STACK_R_ADDR=0x60080000 | |
10 | CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock" | |
fb82fe38 | 11 | CONFIG_DEBUG_UART=y |
47197682 HS |
12 | # CONFIG_DISPLAY_CPUINFO is not set |
13 | CONFIG_SPL_STACK_R=y | |
14 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 | |
47738acc | 15 | CONFIG_RANDOM_UUID=y |
88663126 | 16 | CONFIG_CMD_I2C=y |
47197682 HS |
17 | CONFIG_CMD_MMC=y |
18 | CONFIG_CMD_SF=y | |
19 | CONFIG_CMD_SPI=y | |
47197682 HS |
20 | # CONFIG_CMD_SETEXPR is not set |
21 | CONFIG_CMD_CACHE=y | |
22 | CONFIG_CMD_TIME=y | |
23 | CONFIG_CMD_REGULATOR=y | |
24 | CONFIG_SPL_OF_CONTROL=y | |
25 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" | |
26 | CONFIG_SPL_OF_PLATDATA=y | |
5dc4dfd2 | 27 | CONFIG_ENV_IS_IN_MMC=y |
47197682 HS |
28 | CONFIG_REGMAP=y |
29 | CONFIG_SYSCON=y | |
30 | # CONFIG_SPL_SIMPLE_BUS is not set | |
31 | CONFIG_CLK=y | |
32 | CONFIG_ROCKCHIP_GPIO=y | |
33 | CONFIG_SYS_I2C_ROCKCHIP=y | |
34 | CONFIG_LED=y | |
35 | CONFIG_MMC_DW=y | |
36 | CONFIG_MMC_DW_ROCKCHIP=y | |
37 | CONFIG_PINCTRL=y | |
51c7f348 | 38 | CONFIG_PINCTRL_ROCKCHIP_RK3188=y |
47197682 HS |
39 | CONFIG_DM_PMIC=y |
40 | # CONFIG_SPL_PMIC_CHILDREN is not set | |
41 | CONFIG_PMIC_ACT8846=y | |
42 | CONFIG_REGULATOR_ACT8846=y | |
43 | CONFIG_DM_REGULATOR_FIXED=y | |
44 | CONFIG_RAM=y | |
47197682 HS |
45 | CONFIG_DEBUG_UART_BASE=0x20064000 |
46 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
47 | CONFIG_DEBUG_UART_SHIFT=2 | |
48 | CONFIG_SYS_NS16550=y | |
49 | CONFIG_SYSRESET=y | |
6574864d AF |
50 | CONFIG_USB=y |
51 | CONFIG_ROCKCHIP_USB2_PHY=y | |
47197682 | 52 | CONFIG_SPL_TINY_MEMSET=y |
96b9082c | 53 | CONFIG_TPL_TINY_MEMSET=y |
47197682 HS |
54 | CONFIG_CMD_DHRYSTONE=y |
55 | CONFIG_ERRNO_STR=y |