projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 001d6745 | 1 | CONFIG_ARM=y |
| a2ac2b96 | 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
| abf8d963 | 3 | CONFIG_COUNTER_FREQUENCY=24000000 |
| 001d6745 JT |
4 | CONFIG_ARCH_ROCKCHIP=y |
| 5 | CONFIG_SYS_TEXT_BASE=0x00200000 | |
| 554e5514 | 6 | CONFIG_NR_DRAM_BANKS=1 |
| 34f7e14d | 7 | CONFIG_ENV_SIZE=0x8000 |
| a09fea1d | 8 | CONFIG_ENV_OFFSET=0x3F8000 |
| 2bba7807 | 9 | CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64" |
| 052170c6 | 10 | CONFIG_ROCKCHIP_RK3399=y |
| 32a238df | 11 | CONFIG_TARGET_ROCKPRO64_RK3399=y |
| 001d6745 JT |
12 | CONFIG_DEBUG_UART_BASE=0xFF1A0000 |
| 13 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
| b587acc6 | 14 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
| ea2ca7e1 | 15 | CONFIG_SPL_SPI=y |
| 49c8ef0e | 16 | CONFIG_SYS_LOAD_ADDR=0x800800 |
| d46e86d2 | 17 | CONFIG_DEBUG_UART=y |
| f81f9f0e | 18 | CONFIG_USE_PREBOOT=y |
| 001d6745 | 19 | CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" |
| 001d6745 | 20 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 0817daa7 | 21 | CONFIG_MISC_INIT_R=y |
| ca8a329a TR |
22 | CONFIG_SPL_MAX_SIZE=0x2e000 |
| 23 | CONFIG_SPL_PAD_TO=0x7f8000 | |
| 58ec0aa3 | 24 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
| 001d6745 JT |
25 | CONFIG_SPL_STACK_R=y |
| 26 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 | |
| b587acc6 | 27 | CONFIG_SPL_SPI_LOAD=y |
| f5128514 | 28 | CONFIG_TPL=y |
| 001d6745 JT |
29 | CONFIG_CMD_BOOTZ=y |
| 30 | CONFIG_CMD_GPT=y | |
| 31 | CONFIG_CMD_MMC=y | |
| f85cb3d9 | 32 | CONFIG_CMD_PCI=y |
| f191f3a1 | 33 | CONFIG_CMD_USB=y |
| 001d6745 JT |
34 | # CONFIG_CMD_SETEXPR is not set |
| 35 | CONFIG_CMD_TIME=y | |
| 36 | CONFIG_SPL_OF_CONTROL=y | |
| 001d6745 | 37 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| 34f7e14d | 38 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| 8d8ee47e | 39 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| c180e293 | 40 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| 22bfaa1f TR |
41 | CONFIG_SATA=y |
| 42 | CONFIG_SCSI_AHCI=y | |
| 43 | CONFIG_AHCI_PCI=y | |
| 44 | CONFIG_SATA_SIL=y | |
| 001d6745 JT |
45 | CONFIG_ROCKCHIP_GPIO=y |
| 46 | CONFIG_SYS_I2C_ROCKCHIP=y | |
| fc925fd1 HCB |
47 | CONFIG_MISC=y |
| 48 | CONFIG_ROCKCHIP_EFUSE=y | |
| 001d6745 JT |
49 | CONFIG_MMC_DW=y |
| 50 | CONFIG_MMC_DW_ROCKCHIP=y | |
| 51 | CONFIG_MMC_SDHCI=y | |
| 52 | CONFIG_MMC_SDHCI_ROCKCHIP=y | |
| c180e293 | 53 | CONFIG_SF_DEFAULT_BUS=1 |
| 4244429f | 54 | CONFIG_SPI_FLASH_GIGADEVICE=y |
| 001d6745 JT |
55 | CONFIG_DM_ETH=y |
| 56 | CONFIG_ETH_DESIGNWARE=y | |
| 57 | CONFIG_GMAC_ROCKCHIP=y | |
| 045474be | 58 | CONFIG_NVME_PCI=y |
| f85cb3d9 | 59 | CONFIG_PCI=y |
| 3ae64582 JT |
60 | CONFIG_PHY_ROCKCHIP_INNO_USB2=y |
| 61 | CONFIG_PHY_ROCKCHIP_TYPEC=y | |
| 001d6745 JT |
62 | CONFIG_PMIC_RK8XX=y |
| 63 | CONFIG_REGULATOR_PWM=y | |
| 64 | CONFIG_REGULATOR_RK8XX=y | |
| 65 | CONFIG_PWM_ROCKCHIP=y | |
| df33f864 | 66 | CONFIG_RAM_RK3399_LPDDR4=y |
| f191f3a1 | 67 | CONFIG_DM_RESET=y |
| 472a716b TR |
68 | CONFIG_DM_RNG=y |
| 69 | CONFIG_RNG_ROCKCHIP=y | |
| 22bfaa1f TR |
70 | CONFIG_SCSI=y |
| 71 | CONFIG_DM_SCSI=y | |
| 001d6745 JT |
72 | CONFIG_BAUDRATE=1500000 |
| 73 | CONFIG_DEBUG_UART_SHIFT=2 | |
| 1c37f60c | 74 | CONFIG_ROCKCHIP_SPI=y |
| 4244429f | 75 | CONFIG_SYSRESET=y |
| 001d6745 JT |
76 | CONFIG_USB=y |
| 77 | CONFIG_USB_XHCI_HCD=y | |
| 78 | CONFIG_USB_XHCI_DWC3=y | |
| 79 | CONFIG_USB_EHCI_HCD=y | |
| 80 | CONFIG_USB_EHCI_GENERIC=y | |
| dbd9d6cd MJ |
81 | CONFIG_USB_OHCI_HCD=y |
| 82 | CONFIG_USB_OHCI_GENERIC=y | |
| 3ae64582 JT |
83 | CONFIG_USB_DWC3=y |
| 84 | CONFIG_USB_DWC3_GENERIC=y | |
| 32a8f800 | 85 | CONFIG_USB_KEYBOARD=y |
| 001d6745 JT |
86 | CONFIG_USB_HOST_ETHER=y |
| 87 | CONFIG_USB_ETHER_ASIX=y | |
| 88 | CONFIG_USB_ETHER_ASIX88179=y | |
| 89 | CONFIG_USB_ETHER_MCS7830=y | |
| 90 | CONFIG_USB_ETHER_RTL8152=y | |
| 91 | CONFIG_USB_ETHER_SMSC95XX=y | |
| 1266ef10 | 92 | CONFIG_DM_VIDEO=y |
| 1266ef10 AŠ |
93 | CONFIG_DISPLAY=y |
| 94 | CONFIG_VIDEO_ROCKCHIP=y | |
| 95 | CONFIG_DISPLAY_ROCKCHIP_HDMI=y | |
| 32a8f800 TR |
96 | CONFIG_SPL_TINY_MEMSET=y |
| 97 | CONFIG_ERRNO_STR=y |