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Commit | Line | Data |
---|---|---|
252ed872 | 1 | CONFIG_ARM=y |
7865f4b0 | 2 | CONFIG_ARCH_SOCFPGA=y |
252ed872 | 3 | CONFIG_TARGET_SOCFPGA_ARRIA5=y |
cd9b7317 | 4 | CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y |
bb333031 | 5 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" |
bd328eb3 | 6 | CONFIG_SPL=y |
ef0f2f57 JH |
7 | # CONFIG_CMD_IMLS is not set |
8 | # CONFIG_CMD_FLASH is not set | |
bd328eb3 | 9 | CONFIG_OF_CONTROL=y |
dffb86e4 | 10 | CONFIG_SPL_OF_CONTROL=y |
c9bb942e | 11 | CONFIG_SPI_FLASH=y |
1bd57ff5 MV |
12 | CONFIG_DM_GPIO=y |
13 | CONFIG_DWAPB_GPIO=y | |
d3f34e75 MV |
14 | CONFIG_SPL_DM=y |
15 | CONFIG_SPL_MMC_SUPPORT=y | |
346d6f56 MV |
16 | CONFIG_DM_SEQ_ALIAS=y |
17 | CONFIG_SPL_SIMPLE_BUS=y | |
18 | CONFIG_DM_SPI=y | |
19 | CONFIG_DM_SPI_FLASH=y | |
20 | CONFIG_SPL_SPI_SUPPORT=y | |
7599b53d MV |
21 | CONFIG_SPL_STACK_R=y |
22 | CONFIG_SPL_STACK_R_ADDR=0x00800000 | |
23 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |