]> git.ipfire.org Git - thirdparty/u-boot.git/blame - configs/socfpga_sr1500_defconfig
Merge git://git.denx.de/u-boot-ubi
[thirdparty/u-boot.git] / configs / socfpga_sr1500_defconfig
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ae9996c8
SR
1CONFIG_ARM=y
2CONFIG_ARCH_SOCFPGA=y
278b90ce 3CONFIG_SYS_TEXT_BASE=0x01000040
9b1b6d42 4CONFIG_SYS_MALLOC_F_LEN=0x2000
ae9996c8 5CONFIG_TARGET_SOCFPGA_SR1500=y
c9542eae 6CONFIG_SPL=y
4edb9458 7CONFIG_SPL_STACK_R_ADDR=0x00800000
ae9996c8 8CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
fa2c1467 9CONFIG_DISTRO_DEFAULTS=y
c2ae7d82 10CONFIG_FIT=y
fa2c1467 11# CONFIG_USE_BOOTCOMMAND is not set
ef26d603 12CONFIG_SYS_CONSOLE_IS_IN_ENV=y
84f2a5d0 13CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
3505bc55 14CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
f3f3efff 15CONFIG_SYS_CONSOLE_INFO_QUIET=y
2681e78a 16CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb"
c2ae7d82 17CONFIG_VERSION_VARIABLE=y
84351792 18# CONFIG_DISPLAY_BOARDINFO is not set
78eba69d 19CONFIG_DISPLAY_BOARDINFO_LATE=y
a5d67547 20CONFIG_BOARD_EARLY_INIT_F=y
aca5cd27 21CONFIG_SPL_SYS_MALLOC_SIMPLE=y
ae9996c8 22CONFIG_SPL_STACK_R=y
89cb2b5f
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23CONFIG_CMD_ASKENV=y
24CONFIG_CMD_GREPENV=y
78d1e1d0 25CONFIG_CMD_MEMTEST=y
ae9996c8 26# CONFIG_CMD_FLASH is not set
88663126
TR
27CONFIG_CMD_GPIO=y
28CONFIG_CMD_I2C=y
89cb2b5f 29CONFIG_CMD_MMC=y
78d1e1d0
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30CONFIG_CMD_SF=y
31CONFIG_CMD_SPI=y
89cb2b5f 32CONFIG_CMD_CACHE=y
78d1e1d0 33CONFIG_CMD_TIME=y
89cb2b5f 34CONFIG_CMD_EXT4_WRITE=y
43ede0bc
TR
35CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
36CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
8f2fe0c8 37CONFIG_CMD_UBI=y
5dc4dfd2 38CONFIG_ENV_IS_IN_SPI_FLASH=y
aca5cd27 39CONFIG_SPL_DM=y
4edb9458 40CONFIG_SPL_DM_SEQ_ALIAS=y
d1ec9461 41CONFIG_BOOTCOUNT_LIMIT=y
39bcbb77 42CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
fa23ba1a 43CONFIG_FPGA_SOCFPGA=y
aca5cd27 44CONFIG_DM_GPIO=y
ae9996c8 45CONFIG_DWAPB_GPIO=y
4d5e9b39 46CONFIG_SYS_I2C_DW=y
4edb9458 47CONFIG_DM_MMC=y
55ed3b46 48CONFIG_MMC_DW=y
ae9996c8 49CONFIG_SPI_FLASH=y
adad96e6 50CONFIG_SPI_FLASH_BAR=y
93d9fc26 51CONFIG_SPI_FLASH_STMICRO=y
4edb9458 52# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
ae9996c8 53CONFIG_DM_ETH=y
1989374b 54CONFIG_PHY_GIGE=y
ae9996c8
SR
55CONFIG_ETH_DESIGNWARE=y
56CONFIG_SYS_NS16550=y
93d9fc26 57CONFIG_CADENCE_QSPI=y
bb597c0e 58CONFIG_USE_TINY_PRINTF=y