projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| ae9996c8 SR |
1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_SOCFPGA=y | |
| 278b90ce | 3 | CONFIG_SYS_TEXT_BASE=0x01000040 |
| 9b1b6d42 | 4 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| ae9996c8 | 5 | CONFIG_TARGET_SOCFPGA_SR1500=y |
| c9542eae | 6 | CONFIG_SPL=y |
| 4edb9458 | 7 | CONFIG_SPL_STACK_R_ADDR=0x00800000 |
| ae9996c8 | 8 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" |
| fa2c1467 | 9 | CONFIG_DISTRO_DEFAULTS=y |
| c2ae7d82 | 10 | CONFIG_FIT=y |
| fa2c1467 | 11 | # CONFIG_USE_BOOTCOMMAND is not set |
| ef26d603 | 12 | CONFIG_SYS_CONSOLE_IS_IN_ENV=y |
| 84f2a5d0 | 13 | CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y |
| 3505bc55 | 14 | CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y |
| f3f3efff | 15 | CONFIG_SYS_CONSOLE_INFO_QUIET=y |
| 2681e78a | 16 | CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb" |
| c2ae7d82 | 17 | CONFIG_VERSION_VARIABLE=y |
| 84351792 | 18 | # CONFIG_DISPLAY_BOARDINFO is not set |
| 78eba69d | 19 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| a5d67547 | 20 | CONFIG_BOARD_EARLY_INIT_F=y |
| aca5cd27 | 21 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
| ae9996c8 | 22 | CONFIG_SPL_STACK_R=y |
| 55500438 | 23 | CONFIG_SPL_SPI_LOAD=y |
| 89cb2b5f TR |
24 | CONFIG_CMD_ASKENV=y |
| 25 | CONFIG_CMD_GREPENV=y | |
| 78d1e1d0 | 26 | CONFIG_CMD_MEMTEST=y |
| ae9996c8 | 27 | # CONFIG_CMD_FLASH is not set |
| f369e156 DN |
28 | # CONFIG_ISO_PARTITION is not set |
| 29 | # CONFIG_EFI_PARTITION is not set | |
| 88663126 TR |
30 | CONFIG_CMD_GPIO=y |
| 31 | CONFIG_CMD_I2C=y | |
| 89cb2b5f | 32 | CONFIG_CMD_MMC=y |
| 78d1e1d0 TR |
33 | CONFIG_CMD_SF=y |
| 34 | CONFIG_CMD_SPI=y | |
| 89cb2b5f | 35 | CONFIG_CMD_CACHE=y |
| 78d1e1d0 | 36 | CONFIG_CMD_TIME=y |
| 89cb2b5f | 37 | CONFIG_CMD_EXT4_WRITE=y |
| 43ede0bc TR |
38 | CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" |
| 39 | CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0" | |
| 8f2fe0c8 | 40 | CONFIG_CMD_UBI=y |
| 5dc4dfd2 | 41 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| aca5cd27 | 42 | CONFIG_SPL_DM=y |
| 4edb9458 | 43 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| d1ec9461 | 44 | CONFIG_BOOTCOUNT_LIMIT=y |
| 39bcbb77 | 45 | CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 |
| fa23ba1a | 46 | CONFIG_FPGA_SOCFPGA=y |
| aca5cd27 | 47 | CONFIG_DM_GPIO=y |
| ae9996c8 | 48 | CONFIG_DWAPB_GPIO=y |
| 2878942a | 49 | CONFIG_DM_I2C=y |
| 4d5e9b39 | 50 | CONFIG_SYS_I2C_DW=y |
| 4edb9458 | 51 | CONFIG_DM_MMC=y |
| 55ed3b46 | 52 | CONFIG_MMC_DW=y |
| ae9996c8 | 53 | CONFIG_SPI_FLASH=y |
| adad96e6 | 54 | CONFIG_SPI_FLASH_BAR=y |
| 93d9fc26 | 55 | CONFIG_SPI_FLASH_STMICRO=y |
| 4edb9458 | 56 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |
| ae9996c8 | 57 | CONFIG_DM_ETH=y |
| 1989374b | 58 | CONFIG_PHY_GIGE=y |
| ae9996c8 | 59 | CONFIG_ETH_DESIGNWARE=y |
| a8c2dcf0 | 60 | CONFIG_DM_RESET=y |
| ae9996c8 | 61 | CONFIG_SYS_NS16550=y |
| f1b1f770 | 62 | CONFIG_SPI=y |
| 93d9fc26 | 63 | CONFIG_CADENCE_QSPI=y |
| bb597c0e | 64 | CONFIG_USE_TINY_PRINTF=y |