]>
Commit | Line | Data |
---|---|---|
ae9996c8 SR |
1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_SOCFPGA=y | |
3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | |
4 | CONFIG_SPL_DM=y | |
5 | CONFIG_DM_GPIO=y | |
6 | CONFIG_TARGET_SOCFPGA_SR1500=y | |
4edb9458 | 7 | CONFIG_SPL_STACK_R_ADDR=0x00800000 |
ae9996c8 SR |
8 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" |
9 | CONFIG_SPL=y | |
10 | CONFIG_SPL_STACK_R=y | |
73223f0e | 11 | CONFIG_FIT=y |
adad96e6 | 12 | CONFIG_HUSH_PARSER=y |
89cb2b5f | 13 | CONFIG_CMD_BOOTZ=y |
ae9996c8 | 14 | # CONFIG_CMD_IMLS is not set |
89cb2b5f TR |
15 | CONFIG_CMD_ASKENV=y |
16 | CONFIG_CMD_GREPENV=y | |
78d1e1d0 | 17 | CONFIG_CMD_MEMTEST=y |
ae9996c8 | 18 | # CONFIG_CMD_FLASH is not set |
89cb2b5f | 19 | CONFIG_CMD_MMC=y |
78d1e1d0 TR |
20 | CONFIG_CMD_SF=y |
21 | CONFIG_CMD_SPI=y | |
22 | CONFIG_CMD_I2C=y | |
23 | CONFIG_CMD_GPIO=y | |
24 | CONFIG_CMD_DHCP=y | |
89cb2b5f | 25 | CONFIG_CMD_MII=y |
78d1e1d0 | 26 | CONFIG_CMD_PING=y |
89cb2b5f | 27 | CONFIG_CMD_CACHE=y |
78d1e1d0 | 28 | CONFIG_CMD_TIME=y |
89cb2b5f TR |
29 | CONFIG_CMD_EXT4=y |
30 | CONFIG_CMD_EXT4_WRITE=y | |
31 | CONFIG_CMD_FAT=y | |
32 | CONFIG_CMD_FS_GENERIC=y | |
4edb9458 | 33 | CONFIG_SPL_DM_SEQ_ALIAS=y |
ae9996c8 | 34 | CONFIG_DWAPB_GPIO=y |
4edb9458 | 35 | CONFIG_DM_MMC=y |
ae9996c8 | 36 | CONFIG_SPI_FLASH=y |
adad96e6 | 37 | CONFIG_SPI_FLASH_BAR=y |
93d9fc26 | 38 | CONFIG_SPI_FLASH_STMICRO=y |
4edb9458 | 39 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |
ae9996c8 SR |
40 | CONFIG_DM_ETH=y |
41 | CONFIG_ETH_DESIGNWARE=y | |
42 | CONFIG_SYS_NS16550=y | |
93d9fc26 | 43 | CONFIG_CADENCE_QSPI=y |