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Commit | Line | Data |
---|---|---|
08ac386b | 1 | CONFIG_ARM=y |
08ac386b | 2 | CONFIG_ARCH_ZYNQMP=y |
59e88056 | 3 | CONFIG_SYS_MALLOC_F_LEN=0x8000 |
a4d88920 | 4 | CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm018 dc4" |
08ac386b MS |
5 | CONFIG_SYS_TEXT_BASE=0x8000000 |
6 | CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4" | |
3337e3af | 7 | CONFIG_DISTRO_DEFAULTS=y |
08ac386b MS |
8 | CONFIG_FIT=y |
9 | CONFIG_FIT_VERBOSE=y | |
0c1b02a7 | 10 | CONFIG_SPL_LOAD_FIT=y |
19a97475 | 11 | # CONFIG_DISPLAY_CPUINFO is not set |
84351792 | 12 | # CONFIG_DISPLAY_BOARDINFO is not set |
c2ae7d82 SG |
13 | CONFIG_SPL=y |
14 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y | |
c20ae2ff | 15 | CONFIG_SPL_OS_BOOT=y |
08ac386b MS |
16 | CONFIG_SYS_PROMPT="ZynqMP> " |
17 | # CONFIG_CMD_IMLS is not set | |
18 | CONFIG_CMD_MEMTEST=y | |
e9d33e73 | 19 | CONFIG_CMD_UNZIP=y |
08ac386b MS |
20 | # CONFIG_CMD_FLASH is not set |
21 | CONFIG_CMD_MMC=y | |
22 | CONFIG_CMD_I2C=y | |
23 | CONFIG_CMD_TFTPPUT=y | |
08ac386b MS |
24 | CONFIG_CMD_TIME=y |
25 | CONFIG_CMD_TIMER=y | |
08ac386b | 26 | CONFIG_CMD_EXT4_WRITE=y |
1acc0087 | 27 | # CONFIG_SPL_ISO_PARTITION is not set |
f3d1cc2f | 28 | CONFIG_SPL_OF_CONTROL=y |
08ac386b MS |
29 | CONFIG_OF_EMBED=y |
30 | CONFIG_NET_RANDOM_ETHADDR=y | |
3c70349f | 31 | CONFIG_SPL_DM=y |
f3d1cc2f | 32 | CONFIG_SPL_DM_SEQ_ALIAS=y |
6b245014 SDPP |
33 | CONFIG_FPGA_XILINX=y |
34 | CONFIG_FPGA_ZYNQMPPL=y | |
aca5cd27 | 35 | CONFIG_DM_GPIO=y |
3c70349f | 36 | CONFIG_DM_I2C=y |
08ac386b MS |
37 | CONFIG_SYS_I2C_CADENCE=y |
38 | CONFIG_DM_MMC=y | |
08aa0334 | 39 | CONFIG_MMC_SDHCI_ZYNQ=y |
e1ce61fb | 40 | CONFIG_MMC_SDHCI=y |
08ac386b MS |
41 | CONFIG_DM_ETH=y |
42 | CONFIG_ZYNQ_GEM=y | |
43 | CONFIG_DEBUG_UART=y | |
44 | CONFIG_DEBUG_UART_ZYNQ=y | |
45 | CONFIG_DEBUG_UART_BASE=0xff000000 | |
46 | CONFIG_DEBUG_UART_CLOCK=100000000 | |
47 | CONFIG_DEBUG_UART_ANNOUNCE=y |