]>
Commit | Line | Data |
---|---|---|
252ed872 | 1 | CONFIG_ARM=y |
5ca269a4 | 2 | CONFIG_ARCH_ZYNQ=y |
6ebf8a4a | 3 | CONFIG_SYS_TEXT_BASE=0x4000000 |
734bf172 | 4 | CONFIG_SPL=y |
dcd8a102 MS |
5 | CONFIG_DEBUG_UART_BASE=0xe0001000 |
6 | CONFIG_DEBUG_UART_CLOCK=50000000 | |
0732d7cd | 7 | CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM010" |
52b36fd1 | 8 | CONFIG_SPL_STACK_R_ADDR=0x200000 |
4c82ab9d | 9 | CONFIG_DEBUG_UART=y |
a587051f | 10 | CONFIG_DISTRO_DEFAULTS=y |
11a9662b | 11 | CONFIG_FIT=y |
11a9662b | 12 | CONFIG_FIT_SIGNATURE=y |
3788b451 | 13 | CONFIG_FIT_VERBOSE=y |
002c3234 | 14 | CONFIG_IMAGE_FORMAT_LEGACY=y |
52b36fd1 | 15 | CONFIG_SPL_STACK_R=y |
c20ae2ff | 16 | CONFIG_SPL_OS_BOOT=y |
55500438 | 17 | CONFIG_SPL_SPI_LOAD=y |
c5ca2db6 | 18 | CONFIG_SYS_PROMPT="Zynq> " |
ef0f2f57 | 19 | # CONFIG_CMD_FLASH is not set |
fe7604a3 SG |
20 | CONFIG_CMD_FPGA_LOADBP=y |
21 | CONFIG_CMD_FPGA_LOADFS=y | |
22 | CONFIG_CMD_FPGA_LOADMK=y | |
23 | CONFIG_CMD_FPGA_LOADP=y | |
e4aa8edb | 24 | CONFIG_CMD_GPIO=y |
88663126 TR |
25 | CONFIG_CMD_MMC=y |
26 | CONFIG_CMD_SF=y | |
ef0f2f57 | 27 | # CONFIG_CMD_SETEXPR is not set |
78d1e1d0 | 28 | CONFIG_CMD_TFTPPUT=y |
89cb2b5f | 29 | CONFIG_CMD_CACHE=y |
89cb2b5f | 30 | CONFIG_CMD_EXT4_WRITE=y |
fa2c1467 | 31 | # CONFIG_SPL_DOS_PARTITION is not set |
fa2c1467 | 32 | # CONFIG_SPL_EFI_PARTITION is not set |
8c5cad05 | 33 | CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm010" |
5dc4dfd2 | 34 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
739968f2 | 35 | CONFIG_NET_RANDOM_ETHADDR=y |
5c9b1d73 | 36 | CONFIG_SPL_DM_SEQ_ALIAS=y |
7fad6125 | 37 | CONFIG_FPGA_XILINX=y |
3990c9d6 | 38 | CONFIG_FPGA_ZYNQPL=y |
93561a32 | 39 | CONFIG_DM_GPIO=y |
e1ce61fb | 40 | CONFIG_MMC_SDHCI=y |
2e0583b6 | 41 | CONFIG_MMC_SDHCI_ZYNQ=y |
c9bb942e | 42 | CONFIG_SPI_FLASH=y |
13f451bf | 43 | CONFIG_SPI_FLASH_ISSI=y |
b2ff7fb6 | 44 | CONFIG_SPI_FLASH_MACRONIX=y |
68d53420 BM |
45 | CONFIG_SPI_FLASH_SPANSION=y |
46 | CONFIG_SPI_FLASH_STMICRO=y | |
47 | CONFIG_SPI_FLASH_SST=y | |
48 | CONFIG_SPI_FLASH_WINBOND=y | |
77217c4b VK |
49 | CONFIG_PHY_MARVELL=y |
50 | CONFIG_PHY_REALTEK=y | |
51 | CONFIG_PHY_XILINX=y | |
d7869b21 | 52 | CONFIG_MII=y |
596e5782 | 53 | CONFIG_ZYNQ_GEM=y |
4c82ab9d | 54 | CONFIG_DEBUG_UART_ZYNQ=y |
809704eb | 55 | CONFIG_ZYNQ_SERIAL=y |
e5d5d447 | 56 | CONFIG_ZYNQ_SPI=y |
38a41675 | 57 | CONFIG_ZYNQ_QSPI=y |