projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| c98b47ad SH |
1 | /* |
| 2 | * (C) Copyright 2007 | |
| 3 | * Sascha Hauer, Pengutronix | |
| 4 | * | |
| 5 | * See file CREDITS for list of people who contributed to this | |
| 6 | * project. | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or | |
| 9 | * modify it under the terms of the GNU General Public License as | |
| 10 | * published by the Free Software Foundation; either version 2 of | |
| 11 | * the License, or (at your option) any later version. | |
| 12 | * | |
| 13 | * This program is distributed in the hope that it will be useful, | |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | * GNU General Public License for more details. | |
| 17 | * | |
| 18 | * You should have received a copy of the GNU General Public License | |
| 19 | * along with this program; if not, write to the Free Software | |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 21 | * MA 02111-1307 USA | |
| 22 | */ | |
| 23 | ||
| 24 | #include <common.h> | |
| 25 | #include <asm/arch/mx31-regs.h> | |
| 26 | ||
| 27 | #define TIMER_BASE 0x53f90000 /* General purpose timer 1 */ | |
| 28 | ||
| 29 | /* General purpose timers registers */ | |
| 30 | #define GPTCR __REG(TIMER_BASE) /* Control register */ | |
| 31 | #define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */ | |
| 32 | #define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */ | |
| 33 | #define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */ | |
| 34 | ||
| 35 | /* General purpose timers bitfields */ | |
| 36 | #define GPTCR_SWR (1<<15) /* Software reset */ | |
| 37 | #define GPTCR_FRR (1<<9) /* Freerun / restart */ | |
| 38 | #define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */ | |
| 39 | #define GPTCR_TEN (1) /* Timer enable */ | |
| 40 | ||
| 41 | /* | |
| 42 | * nothing really to do with interrupts, just starts up a counter. | |
| 43 | */ | |
| 44 | int interrupt_init(void) | |
| 45 | { | |
| 46 | int i; | |
| 47 | ||
| 48 | /* setup GP Timer 1 */ | |
| 49 | GPTCR = GPTCR_SWR; | |
| 50 | for (i = 0; i < 100; i++) GPTCR = 0; /* We have no udelay by now */ | |
| 51 | GPTPR = 0; /* 32Khz */ | |
| 52 | /* Freerun Mode, PERCLK1 input */ | |
| 53 | GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN; | |
| 54 | ||
| 55 | return 0; | |
| 56 | } | |
| 57 | ||
| 58 | void reset_timer_masked(void) | |
| 59 | { | |
| 60 | GPTCR = 0; | |
| 61 | /* Freerun Mode, PERCLK1 input*/ | |
| 62 | GPTCR = GPTCR_CLKSOURCE_32 | GPTCR_TEN; | |
| 63 | } | |
| 64 | ||
| 65 | ulong get_timer_masked(void) | |
| 66 | { | |
| 67 | ulong val = GPTCNT; | |
| 68 | return val; | |
| 69 | } | |
| 70 | ||
| 71 | ulong get_timer(ulong base) | |
| 72 | { | |
| 73 | return get_timer_masked() - base; | |
| 74 | } | |
| 75 | ||
| 76 | void set_timer(ulong t) | |
| 77 | { | |
| 78 | } | |
| 79 | ||
| 80 | /* delay x useconds AND perserve advance timstamp value */ | |
| 81 | void udelay(unsigned long usec) | |
| 82 | { | |
| 83 | ulong tmo, tmp; | |
| 84 | ||
| 85 | if (usec >= 1000) { | |
| 86 | /* "big" number, spread normalization to seconds */ | |
| 87 | /* start to normalize for usec to ticks per sec */ | |
| 88 | tmo = usec / 1000; | |
| 89 | /* find number of "ticks" to wait to achieve target */ | |
| 90 | tmo *= CFG_HZ; | |
| 91 | tmo /= 1000; /* finish normalize. */ | |
| 92 | } else { | |
| 93 | /* else small number, don't kill it prior to HZ multiply */ | |
| 94 | tmo = usec * CFG_HZ; | |
| 95 | tmo /= (1000*1000); | |
| 96 | } | |
| 97 | ||
| 98 | tmp = get_timer(0); /* get current timestamp */ | |
| 99 | if ((tmo + tmp + 1) < tmp) | |
| 100 | /* setting this forward will roll time stamp */ | |
| 101 | /* reset "advancing" timestamp to 0, set lastinc value */ | |
| 102 | reset_timer_masked(); | |
| 103 | else | |
| 104 | /* else, set advancing stamp wake up time */ | |
| 105 | tmo += tmp; | |
| 106 | while (get_timer_masked() < tmo)/* loop till event */ | |
| 107 | /*NOP*/; | |
| 108 | } | |
| 109 | ||
| 110 | void reset_cpu(ulong addr) | |
| 111 | { | |
| 112 | __REG16(WDOG_BASE) = 4; | |
| 113 | } |