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bf9e3b38 WD |
1 | /* |
2 | * (C) Copyright 2003 | |
3 | * Josef Baumgartner <josef.baumgartner@telex.de> | |
4 | * | |
9acb626f HS |
5 | * MCF5282 additionals |
6 | * (C) Copyright 2005 | |
7 | * BuS Elektronik GmbH & Co. KG <esw@bus-elektronik.de> | |
8 | * | |
bf9e3b38 WD |
9 | * See file CREDITS for list of people who contributed to this |
10 | * project. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License as | |
14 | * published by the Free Software Foundation; either version 2 of | |
15 | * the License, or (at your option) any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
25 | * MA 02111-1307 USA | |
26 | */ | |
27 | ||
28 | #include <common.h> | |
29 | #include <watchdog.h> | |
30 | #include <command.h> | |
31 | ||
32 | #ifdef CONFIG_M5272 | |
33 | #include <asm/immap_5272.h> | |
34 | #include <asm/m5272.h> | |
35 | #endif | |
36 | ||
37 | #ifdef CONFIG_M5282 | |
9acb626f HS |
38 | #include <asm/m5282.h> |
39 | #include <asm/immap_5282.h> | |
bf9e3b38 WD |
40 | #endif |
41 | ||
8c725b93 SR |
42 | #ifdef CONFIG_M5249 |
43 | #include <asm/m5249.h> | |
44 | #endif | |
45 | ||
bf9e3b38 WD |
46 | |
47 | #ifdef CONFIG_M5272 | |
48 | int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) { | |
49 | volatile wdog_t * wdp = (wdog_t *)(CFG_MBAR + MCFSIM_WRRR); | |
50 | ||
51 | wdp->wdog_wrrr = 0; | |
52 | udelay (1000); | |
53 | ||
54 | /* enable watchdog, set timeout to 0 and wait */ | |
55 | wdp->wdog_wrrr = 1; | |
56 | while (1); | |
57 | ||
58 | /* we don't return! */ | |
59 | return 0; | |
60 | }; | |
61 | ||
62 | int checkcpu(void) { | |
63 | ulong *dirp = (ulong *)(CFG_MBAR + MCFSIM_DIR); | |
64 | uchar msk; | |
65 | char *suf; | |
66 | ||
67 | puts ("CPU: "); | |
68 | msk = (*dirp > 28) & 0xf; | |
69 | switch (msk) { | |
70 | case 0x2: suf = "1K75N"; break; | |
71 | case 0x4: suf = "3K75N"; break; | |
72 | default: | |
73 | suf = NULL; | |
74 | printf ("MOTOROLA MCF5272 (Mask:%01x)\n", msk); | |
75 | break; | |
76 | } | |
77 | ||
78 | if (suf) | |
79 | printf ("MOTOROLA MCF5272 %s\n", suf); | |
80 | return 0; | |
81 | }; | |
82 | ||
bf9e3b38 WD |
83 | #if defined(CONFIG_WATCHDOG) |
84 | /* Called by macro WATCHDOG_RESET */ | |
85 | void watchdog_reset (void) | |
86 | { | |
87 | volatile immap_t * regp = (volatile immap_t *)CFG_MBAR; | |
88 | regp->wdog_reg.wdog_wcr = 0; | |
89 | } | |
90 | ||
91 | int watchdog_disable (void) | |
92 | { | |
93 | volatile immap_t *regp = (volatile immap_t *)CFG_MBAR; | |
94 | ||
95 | regp->wdog_reg.wdog_wcr = 0; /* reset watchdog counter */ | |
96 | regp->wdog_reg.wdog_wirr = 0; /* disable watchdog interrupt */ | |
97 | regp->wdog_reg.wdog_wrrr = 0; /* disable watchdog timer */ | |
98 | ||
99 | puts ("WATCHDOG:disabled\n"); | |
100 | return (0); | |
101 | } | |
102 | ||
103 | int watchdog_init (void) | |
104 | { | |
105 | volatile immap_t *regp = (volatile immap_t *)CFG_MBAR; | |
106 | ||
107 | regp->wdog_reg.wdog_wirr = 0; /* disable watchdog interrupt */ | |
108 | ||
109 | /* set timeout and enable watchdog */ | |
110 | regp->wdog_reg.wdog_wrrr = ((CONFIG_WATCHDOG_TIMEOUT * CFG_HZ) / (32768 * 1000)) - 1; | |
111 | regp->wdog_reg.wdog_wcr = 0; /* reset watchdog counter */ | |
112 | ||
113 | puts ("WATCHDOG:enabled\n"); | |
114 | return (0); | |
115 | } | |
116 | #endif /* #ifdef CONFIG_WATCHDOG */ | |
117 | ||
118 | #endif /* #ifdef CONFIG_M5272 */ | |
119 | ||
120 | ||
121 | #ifdef CONFIG_M5282 | |
122 | int checkcpu (void) | |
123 | { | |
9acb626f HS |
124 | unsigned char resetsource; |
125 | ||
126 | printf ("CPU: MOTOROLA Coldfire MCF5282 (PIN: %2.2x REV: %2.2x)\n", | |
127 | MCFCCM_CIR>>8,MCFCCM_CIR & MCFCCM_CIR_PRN_MASK); | |
128 | puts ("Reset: "); | |
129 | resetsource = MCFRESET_RSR; | |
130 | if (resetsource & MCFRESET_RSR_LOL) puts("Lose-of-lock "); | |
131 | if (resetsource & MCFRESET_RSR_LOC) puts("Lose-of-clock "); | |
132 | if (resetsource & MCFRESET_RSR_EXT) puts("external "); | |
133 | if (resetsource & MCFRESET_RSR_POR) puts("Power-on "); | |
134 | if (resetsource & MCFRESET_RSR_WDR) puts("Watchdog "); | |
135 | if (resetsource & MCFRESET_RSR_SOFT) puts("Software "); | |
136 | if (resetsource & MCFRESET_RSR_LVD) puts("Low-voltage "); | |
137 | puts("\n"); | |
bf9e3b38 WD |
138 | return 0; |
139 | } | |
140 | ||
9acb626f HS |
141 | int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) |
142 | { | |
143 | MCFRESET_RCR = MCFRESET_RCR_SOFTRST; | |
bf9e3b38 WD |
144 | return 0; |
145 | }; | |
146 | #endif | |
8c725b93 SR |
147 | |
148 | #ifdef CONFIG_M5249 /* test-only: todo... */ | |
149 | int checkcpu (void) | |
150 | { | |
151 | char buf[32]; | |
152 | ||
153 | printf ("CPU: MOTOROLA Coldfire MCF5249 at %s MHz\n", strmhz(buf, CFG_CLK)); | |
154 | return 0; | |
155 | } | |
156 | ||
157 | int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) { | |
158 | /* enable watchdog, set timeout to 0 and wait */ | |
159 | mbar_writeByte(MCFSIM_SYPCR, 0xc0); | |
160 | while (1); | |
161 | ||
162 | /* we don't return! */ | |
163 | return 0; | |
164 | }; | |
165 | #endif |