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945af8d7 WD |
1 | /* |
2 | * (C) Copyright 2000-2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /* | |
25 | * CPU specific code for the MPC5xxx CPUs | |
26 | */ | |
27 | ||
28 | #include <common.h> | |
29 | #include <watchdog.h> | |
30 | #include <command.h> | |
31 | #include <mpc5xxx.h> | |
32 | #include <asm/processor.h> | |
33 | ||
e59581c5 SR |
34 | #if defined(CONFIG_OF_FLAT_TREE) |
35 | #include <ft_build.h> | |
36 | #endif | |
37 | ||
d87080b7 WD |
38 | DECLARE_GLOBAL_DATA_PTR; |
39 | ||
945af8d7 WD |
40 | int checkcpu (void) |
41 | { | |
945af8d7 WD |
42 | ulong clock = gd->cpu_clk; |
43 | char buf[32]; | |
36c72877 | 44 | #ifndef CONFIG_MGT5100 |
b66a9383 | 45 | uint svr, pvr; |
36c72877 | 46 | #endif |
945af8d7 WD |
47 | |
48 | puts ("CPU: "); | |
49 | ||
36c72877 WD |
50 | #ifdef CONFIG_MGT5100 |
51 | puts (CPU_ID_STR); | |
945af8d7 | 52 | printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID); |
36c72877 | 53 | #else |
b66a9383 RJ |
54 | svr = get_svr(); |
55 | pvr = get_pvr(); | |
864aa6a6 GW |
56 | |
57 | switch (pvr) { | |
58 | case PVR_5200: | |
59 | printf("MPC5200"); | |
60 | break; | |
61 | case PVR_5200B: | |
62 | printf("MPC5200B"); | |
36c72877 WD |
63 | break; |
64 | default: | |
864aa6a6 | 65 | printf("Unknown MPC5xxx"); |
36c72877 WD |
66 | break; |
67 | } | |
68 | ||
cf48eb9a | 69 | printf (" v%d.%d, Core v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr), |
b66a9383 | 70 | PVR_MAJ(pvr), PVR_MIN(pvr)); |
36c72877 | 71 | #endif |
945af8d7 | 72 | printf (" at %s MHz\n", strmhz (buf, clock)); |
945af8d7 WD |
73 | return 0; |
74 | } | |
75 | ||
76 | /* ------------------------------------------------------------------------- */ | |
77 | ||
78 | int | |
79 | do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) | |
80 | { | |
d94f92cb | 81 | ulong msr; |
945af8d7 WD |
82 | /* Interrupts and MMU off */ |
83 | __asm__ __volatile__ ("mfmsr %0":"=r" (msr):); | |
84 | ||
85 | msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR); | |
86 | __asm__ __volatile__ ("mtmsr %0"::"r" (msr)); | |
87 | ||
d94f92cb | 88 | /* Charge the watchdog timer */ |
2d5b561e | 89 | *(vu_long *)(MPC5XXX_GPT0_COUNTER) = 0x0001000f; |
d94f92cb | 90 | *(vu_long *)(MPC5XXX_GPT0_ENABLE) = 0x9004; /* wden|ce|timer_ms */ |
2d5b561e | 91 | while(1); |
d94f92cb | 92 | |
945af8d7 WD |
93 | return 1; |
94 | ||
95 | } | |
96 | ||
97 | /* ------------------------------------------------------------------------- */ | |
98 | ||
99 | /* | |
100 | * Get timebase clock frequency (like cpu_clk in Hz) | |
101 | * | |
102 | */ | |
103 | unsigned long get_tbclk (void) | |
104 | { | |
945af8d7 WD |
105 | ulong tbclk; |
106 | ||
107 | tbclk = (gd->bus_clk + 3L) / 4L; | |
108 | ||
109 | return (tbclk); | |
110 | } | |
111 | ||
112 | /* ------------------------------------------------------------------------- */ | |
e59581c5 SR |
113 | |
114 | #ifdef CONFIG_OF_FLAT_TREE | |
115 | void | |
116 | ft_cpu_setup(void *blob, bd_t *bd) | |
117 | { | |
118 | u32 *p; | |
e59581c5 SR |
119 | int len; |
120 | ||
726e90aa | 121 | /* Core XLB bus frequency */ |
e59581c5 SR |
122 | p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len); |
123 | if (p != NULL) | |
726e90aa | 124 | *p = cpu_to_be32(bd->bi_busfreq); |
e59581c5 | 125 | |
726e90aa | 126 | /* SOC peripherals use the IPB bus frequency */ |
e59581c5 SR |
127 | p = ft_get_prop(blob, "/" OF_SOC "/bus-frequency", &len); |
128 | if (p != NULL) | |
726e90aa | 129 | *p = cpu_to_be32(bd->bi_ipbfreq); |
e59581c5 SR |
130 | |
131 | p = ft_get_prop(blob, "/" OF_SOC "/ethernet@3000/mac-address", &len); | |
132 | if (p != NULL) | |
133 | memcpy(p, bd->bi_enetaddr, 6); | |
2f550ab9 TT |
134 | |
135 | p = ft_get_prop(blob, "/" OF_SOC "/ethernet@3000/local-mac-address", &len); | |
136 | if (p != NULL) | |
137 | memcpy(p, bd->bi_enetaddr, 6); | |
e59581c5 SR |
138 | } |
139 | #endif |