]> git.ipfire.org Git - people/ms/u-boot.git/blame - cpu/mpc5xxx/usb_ohci.c
projects / people / ms / u-boot.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
* Fix SDRAM timings for LITE5200 / IceCube board
[people/ms/u-boot.git] / cpu / mpc5xxx / usb_ohci.c
CommitLineData
80885a9d
WD		 1/*
2 * URB OHCI HCD (Host Controller Driver) for USB on the MPC5200.
3 *
4 * (C) Copyright 2003-2004
5 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
6 *
7 * (C) Copyright 2004
8 * Pierre Aubert, Staubli Faverges <p.aubert@staubli.com>
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 *
28 * Note: Part of this code has been derived from linux
29 *
30 */
31/*
32 * IMPORTANT NOTES
33 * 1 - this driver is intended for use with USB Mass Storage Devices
34 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
35 */
36
37#include <common.h>
38
39#ifdef CONFIG_USB_OHCI
40
41#include <malloc.h>
42#include <usb.h>
43#include "usb_ohci.h"
44
45#include <mpc5xxx.h>
46
47#define OHCI_USE_NPS /* force NoPowerSwitching mode */
48#undef OHCI_VERBOSE_DEBUG /* not always helpful */
49#undef DEBUG
50#undef SHOW_INFO
51#undef OHCI_FILL_TRACE
52
53/* For initializing controller (mask in an HCFS mode too) */
54#define OHCI_CONTROL_INIT \
55 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
56
57#define readl(a) (*((vu_long *)(a)))
58#define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
59
60#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
61
62#ifdef DEBUG
63#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
64#else
65#define dbg(format, arg...) do {} while(0)
66#endif /* DEBUG */
67#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
68#ifdef SHOW_INFO
69#define info(format, arg...) printf("INFO: " format "\n", ## arg)
70#else
71#define info(format, arg...) do {} while(0)
72#endif
73
74#define m16_swap(x) swap_16(x)
75#define m32_swap(x) swap_32(x)
76
77#ifdef CONFIG_MPC5200
78#define ohci_cpu_to_le16(x) (x)
79#define ohci_cpu_to_le32(x) (x)
80#else
81#define ohci_cpu_to_le16(x) swap_16(x)
82#define ohci_cpu_to_le32(x) swap_32(x)
83#endif
84
85/* global ohci_t */
86static ohci_t gohci;
87/* this must be aligned to a 256 byte boundary */
88struct ohci_hcca ghcca[1];
89/* a pointer to the aligned storage */
90struct ohci_hcca *phcca;
91/* this allocates EDs for all possible endpoints */
92struct ohci_device ohci_dev;
93/* urb_priv */
94urb_priv_t urb_priv;
95/* RHSC flag */
96int got_rhsc;
97/* device which was disconnected */
98struct usb_device *devgone;
99
100/*-------------------------------------------------------------------------*/
101
102/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
103 * The erratum (#4) description is incorrect. AMD's workaround waits
104 * till some bits (mostly reserved) are clear; ok for all revs.
105 */
106#define OHCI_QUIRK_AMD756 0xabcd
107#define read_roothub(hc, register, mask) ({ \
108 u32 temp = readl (&hc->regs->roothub.register); \
109 if (hc->flags & OHCI_QUIRK_AMD756) \
110 while (temp & mask) \
111 temp = readl (&hc->regs->roothub.register); \
112 temp; })
113
114static u32 roothub_a (struct ohci *hc)
115 { return read_roothub (hc, a, 0xfc0fe000); }
116static inline u32 roothub_b (struct ohci *hc)
117 { return readl (&hc->regs->roothub.b); }
118static inline u32 roothub_status (struct ohci *hc)
119 { return readl (&hc->regs->roothub.status); }
120static u32 roothub_portstatus (struct ohci *hc, int i)
121 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
122
123
124/* forward declaration */
125static int hc_interrupt (void);
126static void
127td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
128 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
129
130/*-------------------------------------------------------------------------*
131 * URB support functions
132 *-------------------------------------------------------------------------*/
133
134/* free HCD-private data associated with this URB */
135
136static void urb_free_priv (urb_priv_t * urb)
137{
138 int i;
139 int last;
140 struct td * td;
141
142 last = urb->length - 1;
143 if (last >= 0) {
144 for (i = 0; i <= last; i++) {
145 td = urb->td[i];
146 if (td) {
147 td->usb_dev = NULL;
148 urb->td[i] = NULL;
149 }
150 }
151 }
152}
153
154/*-------------------------------------------------------------------------*/
155
156#ifdef DEBUG
157static int sohci_get_current_frame_number (struct usb_device * dev);
158
159/* debug| print the main components of an URB
160 * small: 0) header + data packets 1) just header */
161
162static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
163 int transfer_len, struct devrequest * setup, char * str, int small)
164{
165 urb_priv_t * purb = &urb_priv;
166
167 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
168 str,
169 sohci_get_current_frame_number (dev),
170 usb_pipedevice (pipe),
171 usb_pipeendpoint (pipe),
172 usb_pipeout (pipe)? 'O': 'I',
173 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
174 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
175 purb->actual_length,
176 transfer_len, dev->status);
177#ifdef OHCI_VERBOSE_DEBUG
178 if (!small) {
179 int i, len;
180
181 if (usb_pipecontrol (pipe)) {
182 printf (__FILE__ ": cmd(8):");
183 for (i = 0; i < 8 ; i++)
184 printf (" %02x", ((__u8 *) setup) [i]);
185 printf ("\n");
186 }
187 if (transfer_len > 0 && buffer) {
188 printf (__FILE__ ": data(%d/%d):",
189 purb->actual_length,
190 transfer_len);
191 len = usb_pipeout (pipe)?
192 transfer_len: purb->actual_length;
193 for (i = 0; i < 16 && i < len; i++)
194 printf (" %02x", ((__u8 *) buffer) [i]);
195 printf ("%s\n", i < len? "...": "");
196 }
197 }
198#endif
199}
200
201/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
202void ep_print_int_eds (ohci_t *ohci, char * str) {
203 int i, j;
204 __u32 * ed_p;
205 for (i= 0; i < 32; i++) {
206 j = 5;
207 ed_p = &(ohci->hcca->int_table [i]);
208 if (*ed_p == 0)
209 continue;
210 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
211 while (*ed_p != 0 && j--) {
212 ed_t *ed = (ed_t *)ohci_cpu_to_le32(ed_p);
213 printf (" ed: %4x;", ed->hwINFO);
214 ed_p = &ed->hwNextED;
215 }
216 printf ("\n");
217 }
218}
219
220static void ohci_dump_intr_mask (char *label, __u32 mask)
221{
222 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
223 label,
224 mask,
225 (mask & OHCI_INTR_MIE) ? " MIE" : "",
226 (mask & OHCI_INTR_OC) ? " OC" : "",
227 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
228 (mask & OHCI_INTR_FNO) ? " FNO" : "",
229 (mask & OHCI_INTR_UE) ? " UE" : "",
230 (mask & OHCI_INTR_RD) ? " RD" : "",
231 (mask & OHCI_INTR_SF) ? " SF" : "",
232 (mask & OHCI_INTR_WDH) ? " WDH" : "",
233 (mask & OHCI_INTR_SO) ? " SO" : ""
234 );
235}
236
237static void maybe_print_eds (char *label, __u32 value)
238{
239 ed_t *edp = (ed_t *)value;
240
241 if (value) {
242 dbg ("%s %08x", label, value);
243 dbg ("%08x", edp->hwINFO);
244 dbg ("%08x", edp->hwTailP);
245 dbg ("%08x", edp->hwHeadP);
246 dbg ("%08x", edp->hwNextED);
247 }
248}
249
250static char * hcfs2string (int state)
251{
252 switch (state) {
253 case OHCI_USB_RESET: return "reset";
254 case OHCI_USB_RESUME: return "resume";
255 case OHCI_USB_OPER: return "operational";
256 case OHCI_USB_SUSPEND: return "suspend";
257 }
258 return "?";
259}
260
261/* dump control and status registers */
262static void ohci_dump_status (ohci_t *controller)
263{
264 struct ohci_regs *regs = controller->regs;
265 __u32 temp;
266
267 temp = readl (&regs->revision) & 0xff;
268 if (temp != 0x10)
269 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
270
271 temp = readl (&regs->control);
272 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
273 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
274 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
275 (temp & OHCI_CTRL_IR) ? " IR" : "",
276 hcfs2string (temp & OHCI_CTRL_HCFS),
277 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
278 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
279 (temp & OHCI_CTRL_IE) ? " IE" : "",
280 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
281 temp & OHCI_CTRL_CBSR
282 );
283
284 temp = readl (&regs->cmdstatus);
285 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
286 (temp & OHCI_SOC) >> 16,
287 (temp & OHCI_OCR) ? " OCR" : "",
288 (temp & OHCI_BLF) ? " BLF" : "",
289 (temp & OHCI_CLF) ? " CLF" : "",
290 (temp & OHCI_HCR) ? " HCR" : ""
291 );
292
293 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
294 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
295
296 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
297
298 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
299 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
300
301 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
302 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
303
304 maybe_print_eds ("donehead", readl (&regs->donehead));
305}
306
307static void ohci_dump_roothub (ohci_t *controller, int verbose)
308{
309 __u32 temp, ndp, i;
310
311 temp = roothub_a (controller);
312 ndp = (temp & RH_A_NDP);
313
314 if (verbose) {
315 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
316 ((temp & RH_A_POTPGT) >> 24) & 0xff,
317 (temp & RH_A_NOCP) ? " NOCP" : "",
318 (temp & RH_A_OCPM) ? " OCPM" : "",
319 (temp & RH_A_DT) ? " DT" : "",
320 (temp & RH_A_NPS) ? " NPS" : "",
321 (temp & RH_A_PSM) ? " PSM" : "",
322 ndp
323 );
324 temp = roothub_b (controller);
325 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
326 temp,
327 (temp & RH_B_PPCM) >> 16,
328 (temp & RH_B_DR)
329 );
330 temp = roothub_status (controller);
331 dbg ("roothub.status: %08x%s%s%s%s%s%s",
332 temp,
333 (temp & RH_HS_CRWE) ? " CRWE" : "",
334 (temp & RH_HS_OCIC) ? " OCIC" : "",
335 (temp & RH_HS_LPSC) ? " LPSC" : "",
336 (temp & RH_HS_DRWE) ? " DRWE" : "",
337 (temp & RH_HS_OCI) ? " OCI" : "",
338 (temp & RH_HS_LPS) ? " LPS" : ""
339 );
340 }
341
342 for (i = 0; i < ndp; i++) {
343 temp = roothub_portstatus (controller, i);
344 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
345 i,
346 temp,
347 (temp & RH_PS_PRSC) ? " PRSC" : "",
348 (temp & RH_PS_OCIC) ? " OCIC" : "",
349 (temp & RH_PS_PSSC) ? " PSSC" : "",
350 (temp & RH_PS_PESC) ? " PESC" : "",
351 (temp & RH_PS_CSC) ? " CSC" : "",
352
353 (temp & RH_PS_LSDA) ? " LSDA" : "",
354 (temp & RH_PS_PPS) ? " PPS" : "",
355 (temp & RH_PS_PRS) ? " PRS" : "",
356 (temp & RH_PS_POCI) ? " POCI" : "",
357 (temp & RH_PS_PSS) ? " PSS" : "",
358
359 (temp & RH_PS_PES) ? " PES" : "",
360 (temp & RH_PS_CCS) ? " CCS" : ""
361 );
362 }
363}
364
365static void ohci_dump (ohci_t *controller, int verbose)
366{
367 dbg ("OHCI controller usb-%s state", controller->slot_name);
368
369 /* dumps some of the state we know about */
370 ohci_dump_status (controller);
371 if (verbose)
372 ep_print_int_eds (controller, "hcca");
373 dbg ("hcca frame #%04x", controller->hcca->frame_no);
374 ohci_dump_roothub (controller, 1);
375}
376
377
378#endif /* DEBUG */
379
380/*-------------------------------------------------------------------------*
381 * Interface functions (URB)
382 *-------------------------------------------------------------------------*/
383
384/* get a transfer request */
385
386int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
387 int transfer_len, struct devrequest *setup, int interval)
388{
389 ohci_t *ohci;
390 ed_t * ed;
391 urb_priv_t *purb_priv;
392 int i, size = 0;
393
394 ohci = &gohci;
395
396 /* when controller's hung, permit only roothub cleanup attempts
397 * such as powering down ports */
398 if (ohci->disabled) {
399 err("sohci_submit_job: EPIPE");
400 return -1;
401 }
402
403 /* every endpoint has a ed, locate and fill it */
404 if (!(ed = ep_add_ed (dev, pipe))) {
405 err("sohci_submit_job: ENOMEM");
406 return -1;
407 }
408
409 /* for the private part of the URB we need the number of TDs (size) */
410 switch (usb_pipetype (pipe)) {
411 case PIPE_BULK: /* one TD for every 4096 Byte */
412 size = (transfer_len - 1) / 4096 + 1;
413 break;
414 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
415 size = (transfer_len == 0)? 2:
416 (transfer_len - 1) / 4096 + 3;
417 break;
418 }
419
420 if (size >= (N_URB_TD - 1)) {
421 err("need %d TDs, only have %d", size, N_URB_TD);
422 return -1;
423 }
424 purb_priv = &urb_priv;
425 purb_priv->pipe = pipe;
426
427 /* fill the private part of the URB */
428 purb_priv->length = size;
429 purb_priv->ed = ed;
430 purb_priv->actual_length = 0;
431
432 /* allocate the TDs */
433 /* note that td[0] was allocated in ep_add_ed */
434 for (i = 0; i < size; i++) {
435 purb_priv->td[i] = td_alloc (dev);
436 if (!purb_priv->td[i]) {
437 purb_priv->length = i;
438 urb_free_priv (purb_priv);
439 err("sohci_submit_job: ENOMEM");
440 return -1;
441 }
442 }
443
444 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
445 urb_free_priv (purb_priv);
446 err("sohci_submit_job: EINVAL");
447 return -1;
448 }
449
450 /* link the ed into a chain if is not already */
451 if (ed->state != ED_OPER)
452 ep_link (ohci, ed);
453
454 /* fill the TDs and link it to the ed */
455 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
456
457 return 0;
458}
459
460/*-------------------------------------------------------------------------*/
461
462#ifdef DEBUG
463/* tell us the current USB frame number */
464
465static int sohci_get_current_frame_number (struct usb_device *usb_dev)
466{
467 ohci_t *ohci = &gohci;
468
469 return ohci_cpu_to_le16 (ohci->hcca->frame_no);
470}
471#endif
472
473/*-------------------------------------------------------------------------*
474 * ED handling functions
475 *-------------------------------------------------------------------------*/
476
477/* link an ed into one of the HC chains */
478
479static int ep_link (ohci_t *ohci, ed_t *edi)
480{
481 volatile ed_t *ed = edi;
482
483 ed->state = ED_OPER;
484
485 switch (ed->type) {
486 case PIPE_CONTROL:
487 ed->hwNextED = 0;
488 if (ohci->ed_controltail == NULL) {
489 writel (ed, &ohci->regs->ed_controlhead);
490 } else {
491 ohci->ed_controltail->hwNextED = ohci_cpu_to_le32 (ed);
492 }
493 ed->ed_prev = ohci->ed_controltail;
494 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
495 !ohci->ed_rm_list[1] && !ohci->sleeping) {
496 ohci->hc_control |= OHCI_CTRL_CLE;
497 writel (ohci->hc_control, &ohci->regs->control);
498 }
499 ohci->ed_controltail = edi;
500 break;
501
502 case PIPE_BULK:
503 ed->hwNextED = 0;
504 if (ohci->ed_bulktail == NULL) {
505 writel (ed, &ohci->regs->ed_bulkhead);
506 } else {
507 ohci->ed_bulktail->hwNextED = ohci_cpu_to_le32 (ed);
508 }
509 ed->ed_prev = ohci->ed_bulktail;
510 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
511 !ohci->ed_rm_list[1] && !ohci->sleeping) {
512 ohci->hc_control |= OHCI_CTRL_BLE;
513 writel (ohci->hc_control, &ohci->regs->control);
514 }
515 ohci->ed_bulktail = edi;
516 break;
517 }
518 return 0;
519}
520
521/*-------------------------------------------------------------------------*/
522
523/* unlink an ed from one of the HC chains.
524 * just the link to the ed is unlinked.
525 * the link from the ed still points to another operational ed or 0
526 * so the HC can eventually finish the processing of the unlinked ed */
527
528static int ep_unlink (ohci_t *ohci, ed_t *edi)
529{
530 volatile ed_t *ed = edi;
531
532 ed->hwINFO |= ohci_cpu_to_le32 (OHCI_ED_SKIP);
533
534 switch (ed->type) {
535 case PIPE_CONTROL:
536 if (ed->ed_prev == NULL) {
537 if (!ed->hwNextED) {
538 ohci->hc_control &= ~OHCI_CTRL_CLE;
539 writel (ohci->hc_control, &ohci->regs->control);
540 }
541 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
542 } else {
543 ed->ed_prev->hwNextED = ed->hwNextED;
544 }
545 if (ohci->ed_controltail == ed) {
546 ohci->ed_controltail = ed->ed_prev;
547 } else {
548 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
549 }
550 break;
551
552 case PIPE_BULK:
553 if (ed->ed_prev == NULL) {
554 if (!ed->hwNextED) {
555 ohci->hc_control &= ~OHCI_CTRL_BLE;
556 writel (ohci->hc_control, &ohci->regs->control);
557 }
558 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
559 } else {
560 ed->ed_prev->hwNextED = ed->hwNextED;
561 }
562 if (ohci->ed_bulktail == ed) {
563 ohci->ed_bulktail = ed->ed_prev;
564 } else {
565 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
566 }
567 break;
568 }
569 ed->state = ED_UNLINK;
570 return 0;
571}
572
573
574/*-------------------------------------------------------------------------*/
575
576/* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
577 * but the USB stack is a little bit stateless so we do it at every transaction
578 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
579 * in all other cases the state is left unchanged
580 * the ed info fields are setted anyway even though most of them should not change */
581
582static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
583{
584 td_t *td;
585 ed_t *ed_ret;
586 volatile ed_t *ed;
587
588 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
589 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
590
591 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
592 err("ep_add_ed: pending delete");
593 /* pending delete request */
594 return NULL;
595 }
596
597 if (ed->state == ED_NEW) {
598 ed->hwINFO = ohci_cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
599 /* dummy td; end of td list for ed */
600 td = td_alloc (usb_dev);
601 ed->hwTailP = ohci_cpu_to_le32 (td);
602 ed->hwHeadP = ed->hwTailP;
603 ed->state = ED_UNLINK;
604 ed->type = usb_pipetype (pipe);
605 ohci_dev.ed_cnt++;
606 }
607
608 ed->hwINFO = ohci_cpu_to_le32 (usb_pipedevice (pipe)
609 | usb_pipeendpoint (pipe) << 7
610 | (usb_pipeisoc (pipe)? 0x8000: 0)
611 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
612 | usb_pipeslow (pipe) << 13
613 | usb_maxpacket (usb_dev, pipe) << 16);
614
615 return ed_ret;
616}
617
618/*-------------------------------------------------------------------------*
619 * TD handling functions
620 *-------------------------------------------------------------------------*/
621
622/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
623
624static void td_fill (ohci_t *ohci, unsigned int info,
625 void *data, int len,
626 struct usb_device *dev, int index, urb_priv_t *urb_priv)
627{
628 volatile td_t *td, *td_pt;
629#ifdef OHCI_FILL_TRACE
630 int i;
631#endif
632
633 if (index > urb_priv->length) {
634 err("index > length");
635 return;
636 }
637 /* use this td as the next dummy */
638 td_pt = urb_priv->td [index];
639 td_pt->hwNextTD = 0;
640
641 /* fill the old dummy TD */
642 td = urb_priv->td [index] = (td_t *)(ohci_cpu_to_le32 (urb_priv->ed->hwTailP) & ~0xf);
643
644 td->ed = urb_priv->ed;
645 td->next_dl_td = NULL;
646 td->index = index;
647 td->data = (__u32)data;
648#ifdef OHCI_FILL_TRACE
649 if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
650 for (i = 0; i < len; i++)
651 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
652 printf("\n");
653 }
654#endif
655 if (!len)
656 data = 0;
657
658 td->hwINFO = ohci_cpu_to_le32 (info);
659 td->hwCBP = ohci_cpu_to_le32 (data);
660 if (data)
661 td->hwBE = ohci_cpu_to_le32 (data + len - 1);
662 else
663 td->hwBE = 0;
664 td->hwNextTD = ohci_cpu_to_le32 (td_pt);
665 td->hwPSW [0] = ohci_cpu_to_le16 (((__u32)data & 0x0FFF) | 0xE000);
666
667 /* append to queue */
668 td->ed->hwTailP = td->hwNextTD;
669}
670
671/*-------------------------------------------------------------------------*/
672
673/* prepare all TDs of a transfer */
674
675static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
676 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
677{
678 ohci_t *ohci = &gohci;
679 int data_len = transfer_len;
680 void *data;
681 int cnt = 0;
682 __u32 info = 0;
683 unsigned int toggle = 0;
684
685 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
686 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
687 toggle = TD_T_TOGGLE;
688 } else {
689 toggle = TD_T_DATA0;
690 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
691 }
692 urb->td_cnt = 0;
693 if (data_len)
694 data = buffer;
695 else
696 data = 0;
697
698 switch (usb_pipetype (pipe)) {
699 case PIPE_BULK:
700 info = usb_pipeout (pipe)?
701 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
702 while(data_len > 4096) {
703 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
704 data += 4096; data_len -= 4096; cnt++;
705 }
706 info = usb_pipeout (pipe)?
707 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
708 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
709 cnt++;
710
711 if (!ohci->sleeping)
712 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
713 break;
714
715 case PIPE_CONTROL:
716 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
717 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
718 if (data_len > 0) {
719 info = usb_pipeout (pipe)?
720 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
721 /* NOTE: mishandles transfers >8K, some >4K */
722 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
723 }
724 info = usb_pipeout (pipe)?
725 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
726 td_fill (ohci, info, data, 0, dev, cnt++, urb);
727 if (!ohci->sleeping)
728 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
729 break;
730 }
731 if (urb->length != cnt)
732 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
733}
734
735/*-------------------------------------------------------------------------*
736 * Done List handling functions
737 *-------------------------------------------------------------------------*/
738
739
740/* calculate the transfer length and update the urb */
741
742static void dl_transfer_length(td_t * td)
743{
744 __u32 tdINFO, tdBE, tdCBP;
745 urb_priv_t *lurb_priv = &urb_priv;
746
747 tdINFO = ohci_cpu_to_le32 (td->hwINFO);
748 tdBE = ohci_cpu_to_le32 (td->hwBE);
749 tdCBP = ohci_cpu_to_le32 (td->hwCBP);
750
751
752 if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
753 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
754 if (tdBE != 0) {
755 if (td->hwCBP == 0)
756 lurb_priv->actual_length += tdBE - td->data + 1;
757 else
758 lurb_priv->actual_length += tdCBP - td->data;
759 }
760 }
761}
762
763/*-------------------------------------------------------------------------*/
764
765/* replies to the request have to be on a FIFO basis so
766 * we reverse the reversed done-list */
767
768static td_t * dl_reverse_done_list (ohci_t *ohci)
769{
770 __u32 td_list_hc;
771 td_t *td_rev = NULL;
772 td_t *td_list = NULL;
773 urb_priv_t *lurb_priv = NULL;
774
775 td_list_hc = ohci_cpu_to_le32 (ohci->hcca->done_head) & 0xfffffff0;
776 ohci->hcca->done_head = 0;
777
778 while (td_list_hc) {
779 td_list = (td_t *)td_list_hc;
780
781 if (TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO))) {
782 lurb_priv = &urb_priv;
783 dbg(" USB-error/status: %x : %p",
784 TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO)), td_list);
785 if (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x1)) {
786 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
787 td_list->ed->hwHeadP =
788 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & ohci_cpu_to_le32 (0xfffffff0)) |
789 (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x2));
790 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
791 } else
792 td_list->ed->hwHeadP &= ohci_cpu_to_le32 (0xfffffff2);
793 }
794#ifdef CONFIG_MPC5200
795 td_list->hwNextTD = 0;
796#endif
797 }
798
799 td_list->next_dl_td = td_rev;
800 td_rev = td_list;
801 td_list_hc = ohci_cpu_to_le32 (td_list->hwNextTD) & 0xfffffff0;
802 }
803 return td_list;
804}
805
806/*-------------------------------------------------------------------------*/
807
808/* td done list */
809static int dl_done_list (ohci_t *ohci, td_t *td_list)
810{
811 td_t *td_list_next = NULL;
812 ed_t *ed;
813 int cc = 0;
814 int stat = 0xff;
815 /* urb_t *urb; */
816 urb_priv_t *lurb_priv;
817 __u32 tdINFO, edHeadP, edTailP;
818
819 while (td_list) {
820 td_list_next = td_list->next_dl_td;
821
822 lurb_priv = &urb_priv;
823 tdINFO = ohci_cpu_to_le32 (td_list->hwINFO);
824
825 ed = td_list->ed;
826
827 dl_transfer_length(td_list);
828
829 /* error code of transfer */
830 cc = TD_CC_GET (tdINFO);
831 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
832 if ((ed->state & (ED_OPER | ED_UNLINK))
833 && (lurb_priv->state != URB_DEL)) {
834 dbg("ConditionCode %#x", cc);
835 stat = cc_to_error[cc];
836 }
837 }
838
839 if (ed->state != ED_NEW) {
840 edHeadP = ohci_cpu_to_le32 (ed->hwHeadP) & 0xfffffff0;
841 edTailP = ohci_cpu_to_le32 (ed->hwTailP);
842
843 /* unlink eds if they are not busy */
844 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
845 ep_unlink (ohci, ed);
846 }
847
848 td_list = td_list_next;
849 }
850 return stat;
851}
852
853/*-------------------------------------------------------------------------*
854 * Virtual Root Hub
855 *-------------------------------------------------------------------------*/
856
857/* Device descriptor */
858static __u8 root_hub_dev_des[] =
859{
860 0x12, /* __u8 bLength; */
861 0x01, /* __u8 bDescriptorType; Device */
862 0x10, /* __u16 bcdUSB; v1.1 */
863 0x01,
864 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
865 0x00, /* __u8 bDeviceSubClass; */
866 0x00, /* __u8 bDeviceProtocol; */
867 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
868 0x00, /* __u16 idVendor; */
869 0x00,
870 0x00, /* __u16 idProduct; */
871 0x00,
872 0x00, /* __u16 bcdDevice; */
873 0x00,
874 0x00, /* __u8 iManufacturer; */
875 0x01, /* __u8 iProduct; */
876 0x00, /* __u8 iSerialNumber; */
877 0x01 /* __u8 bNumConfigurations; */
878};
879
880
881/* Configuration descriptor */
882static __u8 root_hub_config_des[] =
883{
884 0x09, /* __u8 bLength; */
885 0x02, /* __u8 bDescriptorType; Configuration */
886 0x19, /* __u16 wTotalLength; */
887 0x00,
888 0x01, /* __u8 bNumInterfaces; */
889 0x01, /* __u8 bConfigurationValue; */
890 0x00, /* __u8 iConfiguration; */
891 0x40, /* __u8 bmAttributes;
892 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
893 0x00, /* __u8 MaxPower; */
894
895 /* interface */
896 0x09, /* __u8 if_bLength; */
897 0x04, /* __u8 if_bDescriptorType; Interface */
898 0x00, /* __u8 if_bInterfaceNumber; */
899 0x00, /* __u8 if_bAlternateSetting; */
900 0x01, /* __u8 if_bNumEndpoints; */
901 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
902 0x00, /* __u8 if_bInterfaceSubClass; */
903 0x00, /* __u8 if_bInterfaceProtocol; */
904 0x00, /* __u8 if_iInterface; */
905
906 /* endpoint */
907 0x07, /* __u8 ep_bLength; */
908 0x05, /* __u8 ep_bDescriptorType; Endpoint */
909 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
910 0x03, /* __u8 ep_bmAttributes; Interrupt */
911 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
912 0x00,
913 0xff /* __u8 ep_bInterval; 255 ms */
914};
915
916static unsigned char root_hub_str_index0[] =
917{
918 0x04, /* __u8 bLength; */
919 0x03, /* __u8 bDescriptorType; String-descriptor */
920 0x09, /* __u8 lang ID */
921 0x04, /* __u8 lang ID */
922};
923
924static unsigned char root_hub_str_index1[] =
925{
926 28, /* __u8 bLength; */
927 0x03, /* __u8 bDescriptorType; String-descriptor */
928 'O', /* __u8 Unicode */
929 0, /* __u8 Unicode */
930 'H', /* __u8 Unicode */
931 0, /* __u8 Unicode */
932 'C', /* __u8 Unicode */
933 0, /* __u8 Unicode */
934 'I', /* __u8 Unicode */
935 0, /* __u8 Unicode */
936 ' ', /* __u8 Unicode */
937 0, /* __u8 Unicode */
938 'R', /* __u8 Unicode */
939 0, /* __u8 Unicode */
940 'o', /* __u8 Unicode */
941 0, /* __u8 Unicode */
942 'o', /* __u8 Unicode */
943 0, /* __u8 Unicode */
944 't', /* __u8 Unicode */
945 0, /* __u8 Unicode */
946 ' ', /* __u8 Unicode */
947 0, /* __u8 Unicode */
948 'H', /* __u8 Unicode */
949 0, /* __u8 Unicode */
950 'u', /* __u8 Unicode */
951 0, /* __u8 Unicode */
952 'b', /* __u8 Unicode */
953 0, /* __u8 Unicode */
954};
955
956/* Hub class-specific descriptor is constructed dynamically */
957
958
959/*-------------------------------------------------------------------------*/
960
961#define OK(x) len = (x); break
962#ifdef DEBUG
963#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
964#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
965#else
966#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
967#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
968#endif
969#define RD_RH_STAT roothub_status(&gohci)
970#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
971
972/* request to virtual root hub */
973
974int rh_check_port_status(ohci_t *controller)
975{
976 __u32 temp, ndp, i;
977 int res;
978
979 res = -1;
980 temp = roothub_a (controller);
981 ndp = (temp & RH_A_NDP);
982 for (i = 0; i < ndp; i++) {
983 temp = roothub_portstatus (controller, i);
984 /* check for a device disconnect */
985 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
986 (RH_PS_PESC | RH_PS_CSC)) &&
987 ((temp & RH_PS_CCS) == 0)) {
988 res = i;
989 break;
990 }
991 }
992 return res;
993}
994
995static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
996 void *buffer, int transfer_len, struct devrequest *cmd)
997{
998 void * data = buffer;
999 int leni = transfer_len;
1000 int len = 0;
1001 int stat = 0;
1002 __u32 datab[4];
1003 __u8 *data_buf = (__u8 *)datab;
1004 __u16 bmRType_bReq;
1005 __u16 wValue;
1006 __u16 wIndex;
1007 __u16 wLength;
1008
1009#ifdef DEBUG
1010urb_priv.actual_length = 0;
1011pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1012#endif
1013 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1014 info("Root-Hub submit IRQ: NOT implemented");
1015 return 0;
1016 }
1017
1018 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1019 wValue = m16_swap (cmd->value);
1020 wIndex = m16_swap (cmd->index);
1021 wLength = m16_swap (cmd->length);
1022
1023 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1024 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1025
1026 switch (bmRType_bReq) {
1027 /* Request Destination:
1028 without flags: Device,
1029 RH_INTERFACE: interface,
1030 RH_ENDPOINT: endpoint,
1031 RH_CLASS means HUB here,
1032 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1033 */
1034
1035 case RH_GET_STATUS:
1036 *(__u16 *) data_buf = m16_swap (1); OK (2);
1037 case RH_GET_STATUS | RH_INTERFACE:
1038 *(__u16 *) data_buf = m16_swap (0); OK (2);
1039 case RH_GET_STATUS | RH_ENDPOINT:
1040 *(__u16 *) data_buf = m16_swap (0); OK (2);
1041 case RH_GET_STATUS | RH_CLASS:
1042 *(__u32 *) data_buf = m32_swap (
1043 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1044 OK (4);
1045 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1046 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
1047
1048 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1049 switch (wValue) {
1050 case (RH_ENDPOINT_STALL): OK (0);
1051 }
1052 break;
1053
1054 case RH_CLEAR_FEATURE | RH_CLASS:
1055 switch (wValue) {
1056 case RH_C_HUB_LOCAL_POWER:
1057 OK(0);
1058 case (RH_C_HUB_OVER_CURRENT):
1059 WR_RH_STAT(RH_HS_OCIC); OK (0);
1060 }
1061 break;
1062
1063 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1064 switch (wValue) {
1065 case (RH_PORT_ENABLE):
1066 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1067 case (RH_PORT_SUSPEND):
1068 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1069 case (RH_PORT_POWER):
1070 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1071 case (RH_C_PORT_CONNECTION):
1072 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1073 case (RH_C_PORT_ENABLE):
1074 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1075 case (RH_C_PORT_SUSPEND):
1076 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1077 case (RH_C_PORT_OVER_CURRENT):
1078 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1079 case (RH_C_PORT_RESET):
1080 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1081 }
1082 break;
1083
1084 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1085 switch (wValue) {
1086 case (RH_PORT_SUSPEND):
1087 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1088 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1089 if (RD_RH_PORTSTAT & RH_PS_CCS)
1090 WR_RH_PORTSTAT (RH_PS_PRS);
1091 OK (0);
1092 case (RH_PORT_POWER):
1093 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1094 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1095 if (RD_RH_PORTSTAT & RH_PS_CCS)
1096 WR_RH_PORTSTAT (RH_PS_PES );
1097 OK (0);
1098 }
1099 break;
1100
1101 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1102
1103 case RH_GET_DESCRIPTOR:
1104 switch ((wValue & 0xff00) >> 8) {
1105 case (0x01): /* device descriptor */
1106 len = min_t(unsigned int,
1107 leni,
1108 min_t(unsigned int,
1109 sizeof (root_hub_dev_des),
1110 wLength));
1111 data_buf = root_hub_dev_des; OK(len);
1112 case (0x02): /* configuration descriptor */
1113 len = min_t(unsigned int,
1114 leni,
1115 min_t(unsigned int,
1116 sizeof (root_hub_config_des),
1117 wLength));
1118 data_buf = root_hub_config_des; OK(len);
1119 case (0x03): /* string descriptors */
1120 if(wValue==0x0300) {
1121 len = min_t(unsigned int,
1122 leni,
1123 min_t(unsigned int,
1124 sizeof (root_hub_str_index0),
1125 wLength));
1126 data_buf = root_hub_str_index0;
1127 OK(len);
1128 }
1129 if(wValue==0x0301) {
1130 len = min_t(unsigned int,
1131 leni,
1132 min_t(unsigned int,
1133 sizeof (root_hub_str_index1),
1134 wLength));
1135 data_buf = root_hub_str_index1;
1136 OK(len);
1137 }
1138 default:
1139 stat = USB_ST_STALLED;
1140 }
1141 break;
1142
1143 case RH_GET_DESCRIPTOR | RH_CLASS:
1144 {
1145 __u32 temp = roothub_a (&gohci);
1146
1147 data_buf [0] = 9; /* min length; */
1148 data_buf [1] = 0x29;
1149 data_buf [2] = temp & RH_A_NDP;
1150 data_buf [3] = 0;
1151 if (temp & RH_A_PSM) /* per-port power switching? */
1152 data_buf [3] |= 0x1;
1153 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1154 data_buf [3] |= 0x10;
1155 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1156 data_buf [3] |= 0x8;
1157
1158 /* corresponds to data_buf[4-7] */
1159 datab [1] = 0;
1160 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1161 temp = roothub_b (&gohci);
1162 data_buf [7] = temp & RH_B_DR;
1163 if (data_buf [2] < 7) {
1164 data_buf [8] = 0xff;
1165 } else {
1166 data_buf [0] += 2;
1167 data_buf [8] = (temp & RH_B_DR) >> 8;
1168 data_buf [10] = data_buf [9] = 0xff;
1169 }
1170
1171 len = min_t(unsigned int, leni,
1172 min_t(unsigned int, data_buf [0], wLength));
1173 OK (len);
1174 }
1175
1176 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1177
1178 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1179
1180 default:
1181 dbg ("unsupported root hub command");
1182 stat = USB_ST_STALLED;
1183 }
1184
1185#ifdef DEBUG
1186 ohci_dump_roothub (&gohci, 1);
1187#endif
1188
1189 len = min_t(int, len, leni);
1190 if (data != data_buf)
1191 memcpy (data, data_buf, len);
1192 dev->act_len = len;
1193 dev->status = stat;
1194
1195#ifdef DEBUG
1196 if (transfer_len)
1197 urb_priv.actual_length = transfer_len;
1198 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1199#endif
1200
1201 return stat;
1202}
1203
1204/*-------------------------------------------------------------------------*/
1205
1206/* common code for handling submit messages - used for all but root hub */
1207/* accesses. */
1208int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1209 int transfer_len, struct devrequest *setup, int interval)
1210{
1211 int stat = 0;
1212 int maxsize = usb_maxpacket(dev, pipe);
1213 int timeout;
1214
1215 /* device pulled? Shortcut the action. */
1216 if (devgone == dev) {
1217 dev->status = USB_ST_CRC_ERR;
1218 return 0;
1219 }
1220
1221#ifdef DEBUG
1222 urb_priv.actual_length = 0;
1223 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1224#endif
1225 if (!maxsize) {
1226 err("submit_common_message: pipesize for pipe %lx is zero",
1227 pipe);
1228 return -1;
1229 }
1230
1231 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1232 err("sohci_submit_job failed");
1233 return -1;
1234 }
1235
1236 /* allow more time for a BULK device to react - some are slow */
1237#define BULK_TO 5000 /* timeout in milliseconds */
1238 if (usb_pipetype (pipe) == PIPE_BULK)
1239 timeout = BULK_TO;
1240 else
1241 timeout = 100;
1242
1243 /* wait for it to complete */
1244 for (;;) {
1245 /* check whether the controller is done */
1246 stat = hc_interrupt();
1247 if (stat < 0) {
1248 stat = USB_ST_CRC_ERR;
1249 break;
1250 }
1251 if (stat >= 0 && stat < 0xff) {
1252 /* 0xff is returned for an SF-interrupt */
1253 break;
1254 }
1255 if (--timeout) {
1256 wait_ms(1);
1257 } else {
1258 err("CTL:TIMEOUT ");
1259 stat = USB_ST_CRC_ERR;
1260 break;
1261 }
1262 }
1263 /* we got an Root Hub Status Change interrupt */
1264 if (got_rhsc) {
1265#ifdef DEBUG
1266 ohci_dump_roothub (&gohci, 1);
1267#endif
1268 got_rhsc = 0;
1269 /* abuse timeout */
1270 timeout = rh_check_port_status(&gohci);
1271 if (timeout >= 0) {
1272#if 0 /* this does nothing useful, but leave it here in case that changes */
1273 /* the called routine adds 1 to the passed value */
1274 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1275#endif
1276 /*
1277 * XXX
1278 * This is potentially dangerous because it assumes
1279 * that only one device is ever plugged in!
1280 */
1281 devgone = dev;
1282 }
1283 }
1284
1285 dev->status = stat;
1286 dev->act_len = transfer_len;
1287
1288#ifdef DEBUG
1289 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1290#endif
1291
1292 /* free TDs in urb_priv */
1293 urb_free_priv (&urb_priv);
1294 return 0;
1295}
1296
1297/* submit routines called from usb.c */
1298int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1299 int transfer_len)
1300{
1301 info("submit_bulk_msg");
1302 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1303}
1304
1305int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1306 int transfer_len, struct devrequest *setup)
1307{
1308 int maxsize = usb_maxpacket(dev, pipe);
1309
1310 info("submit_control_msg");
1311#ifdef DEBUG
1312 urb_priv.actual_length = 0;
1313 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1314#endif
1315 if (!maxsize) {
1316 err("submit_control_message: pipesize for pipe %lx is zero",
1317 pipe);
1318 return -1;
1319 }
1320 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1321 gohci.rh.dev = dev;
1322 /* root hub - redirect */
1323 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1324 setup);
1325 }
1326
1327 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1328}
1329
1330int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1331 int transfer_len, int interval)
1332{
1333 info("submit_int_msg");
1334 return -1;
1335}
1336
1337/*-------------------------------------------------------------------------*
1338 * HC functions
1339 *-------------------------------------------------------------------------*/
1340
1341/* reset the HC and BUS */
1342
1343static int hc_reset (ohci_t *ohci)
1344{
1345 int timeout = 30;
1346 int smm_timeout = 50; /* 0,5 sec */
1347
1348 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1349 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1350 info("USB HC TakeOver from SMM");
1351 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1352 wait_ms (10);
1353 if (--smm_timeout == 0) {
1354 err("USB HC TakeOver failed!");
1355 return -1;
1356 }
1357 }
1358 }
1359
1360 /* Disable HC interrupts */
1361 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1362
1363 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1364 ohci->slot_name,
1365 readl (&ohci->regs->control));
1366
1367 /* Reset USB (needed by some controllers) */
1368 ohci->hc_control = 0;
1369 writel (ohci->hc_control, &ohci->regs->control);
1370
1371 /* HC Reset requires max 10 us delay */
1372 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1373 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1374 if (--timeout == 0) {
1375 err("USB HC reset timed out!");
1376 return -1;
1377 }
1378 udelay (1);
1379 }
1380 return 0;
1381}
1382
1383/*-------------------------------------------------------------------------*/
1384
1385/* Start an OHCI controller, set the BUS operational
1386 * enable interrupts
1387 * connect the virtual root hub */
1388
1389static int hc_start (ohci_t * ohci)
1390{
1391 __u32 mask;
1392 unsigned int fminterval;
1393
1394 ohci->disabled = 1;
1395
1396 /* Tell the controller where the control and bulk lists are
1397 * The lists are empty now. */
1398
1399 writel (0, &ohci->regs->ed_controlhead);
1400 writel (0, &ohci->regs->ed_bulkhead);
1401
1402 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1403
1404 fminterval = 0x2edf;
1405 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1406 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1407 writel (fminterval, &ohci->regs->fminterval);
1408 writel (0x628, &ohci->regs->lsthresh);
1409
1410 /* start controller operations */
1411 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1412 ohci->disabled = 0;
1413 writel (ohci->hc_control, &ohci->regs->control);
1414
1415 /* disable all interrupts */
1416 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1417 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1418 OHCI_INTR_OC | OHCI_INTR_MIE);
1419 writel (mask, &ohci->regs->intrdisable);
1420 /* clear all interrupts */
1421 mask &= ~OHCI_INTR_MIE;
1422 writel (mask, &ohci->regs->intrstatus);
1423 /* Choose the interrupts we care about now - but w/o MIE */
1424 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1425 writel (mask, &ohci->regs->intrenable);
1426
1427#ifdef OHCI_USE_NPS
1428 /* required for AMD-756 and some Mac platforms */
1429 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1430 &ohci->regs->roothub.a);
1431 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1432#endif /* OHCI_USE_NPS */
1433
1434#define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1435 /* POTPGT delay is bits 24-31, in 2 ms units. */
1436 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1437
1438 /* connect the virtual root hub */
1439 ohci->rh.devnum = 0;
1440
1441 return 0;
1442}
1443
1444/*-------------------------------------------------------------------------*/
1445
1446/* an interrupt happens */
1447
1448static int
1449hc_interrupt (void)
1450{
1451 ohci_t *ohci = &gohci;
1452 struct ohci_regs *regs = ohci->regs;
1453 int ints;
1454 int stat = -1;
1455
1456 if ((ohci->hcca->done_head != 0) && !(ohci_cpu_to_le32 (ohci->hcca->done_head) & 0x01)) {
1457 ints = OHCI_INTR_WDH;
1458 } else {
1459 ints = readl (&regs->intrstatus);
1460 }
1461
1462 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1463
1464 if (ints & OHCI_INTR_RHSC) {
1465 got_rhsc = 1;
1466 }
1467
1468 if (ints & OHCI_INTR_UE) {
1469 ohci->disabled++;
1470 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1471 ohci->slot_name);
1472 /* e.g. due to PCI Master/Target Abort */
1473
1474#ifdef DEBUG
1475 ohci_dump (ohci, 1);
1476#endif
1477 /* FIXME: be optimistic, hope that bug won't repeat often. */
1478 /* Make some non-interrupt context restart the controller. */
1479 /* Count and limit the retries though; either hardware or */
1480 /* software errors can go forever... */
1481 hc_reset (ohci);
1482 return -1;
1483 }
1484
1485 if (ints & OHCI_INTR_WDH) {
1486 writel (OHCI_INTR_WDH, &regs->intrdisable);
1487 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1488 writel (OHCI_INTR_WDH, &regs->intrenable);
1489 }
1490
1491 if (ints & OHCI_INTR_SO) {
1492 dbg("USB Schedule overrun\n");
1493 writel (OHCI_INTR_SO, &regs->intrenable);
1494 stat = -1;
1495 }
1496
1497 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1498 if (ints & OHCI_INTR_SF) {
1499 unsigned int frame = ohci_cpu_to_le16 (ohci->hcca->frame_no) & 1;
1500 writel (OHCI_INTR_SF, &regs->intrdisable);
1501 if (ohci->ed_rm_list[frame] != NULL)
1502 writel (OHCI_INTR_SF, &regs->intrenable);
1503 stat = 0xff;
1504 }
1505
1506 writel (ints, &regs->intrstatus);
1507 return stat;
1508}
1509
1510/*-------------------------------------------------------------------------*/
1511
1512/*-------------------------------------------------------------------------*/
1513
1514/* De-allocate all resources.. */
1515
1516static void hc_release_ohci (ohci_t *ohci)
1517{
1518 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1519
1520 if (!ohci->disabled)
1521 hc_reset (ohci);
1522}
1523
1524/*-------------------------------------------------------------------------*/
1525
1526/*
1527 * low level initalisation routine, called from usb.c
1528 */
1529static char ohci_inited = 0;
1530
1531int usb_lowlevel_init(void)
1532{
1533
1534 /* Set the USB Clock */
1535 *(vu_long *)MPC5XXX_CDM_48_FDC = 0x0001bbbb;
1536 *(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00800000;
1537 /* Activate USB port */
1538 *(vu_long *)MPC5XXX_GPS_PORT_CONFIG |= 0x00001000;
1539
1540 memset (&gohci, 0, sizeof (ohci_t));
1541 memset (&urb_priv, 0, sizeof (urb_priv_t));
1542
1543 /* align the storage */
1544 if ((__u32)&ghcca[0] & 0xff) {
1545 err("HCCA not aligned!!");
1546 return -1;
1547 }
1548 phcca = &ghcca[0];
1549 info("aligned ghcca %p", phcca);
1550 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1551 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1552 err("EDs not aligned!!");
1553 return -1;
1554 }
1555 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1556 if ((__u32)gtd & 0x7) {
1557 err("TDs not aligned!!");
1558 return -1;
1559 }
1560 ptd = gtd;
1561 gohci.hcca = phcca;
1562 memset (phcca, 0, sizeof (struct ohci_hcca));
1563
1564 gohci.disabled = 1;
1565 gohci.sleeping = 0;
1566 gohci.irq = -1;
1567 gohci.regs = (struct ohci_regs *)MPC5XXX_USB;
1568
1569 gohci.flags = 0;
1570 gohci.slot_name = "mpc5200";
1571
1572 if (hc_reset (&gohci) < 0) {
1573 hc_release_ohci (&gohci);
1574 return -1;
1575 }
1576
1577 if (hc_start (&gohci) < 0) {
1578 err ("can't start usb-%s", gohci.slot_name);
1579 hc_release_ohci (&gohci);
1580 return -1;
1581 }
1582
1583#ifdef DEBUG
1584 ohci_dump (&gohci, 1);
1585#endif
1586 ohci_inited = 1;
1587 return 0;
1588}
1589
1590int usb_lowlevel_stop(void)
1591{
1592 /* this gets called really early - before the controller has */
1593 /* even been initialized! */
1594 if (!ohci_inited)
1595 return 0;
1596 /* TODO release any interrupts, etc. */
1597 /* call hc_release_ohci() here ? */
1598 hc_reset (&gohci);
1599 return 0;
1600}
1601
1602#endif /* CONFIG_USB_OHCI */
"Das U-Boot" Source Tree