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42d1f039 | 1 | # |
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2 | # (C) Copyright 2006 |
3 | # Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | # | |
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5 | # (C) Copyright 2002,2003 Motorola Inc. |
6 | # Xianghua Xiao,X.Xiao@motorola.com | |
7 | # | |
8 | # See file CREDITS for list of people who contributed to this | |
9 | # project. | |
10 | # | |
11 | # This program is free software; you can redistribute it and/or | |
12 | # modify it under the terms of the GNU General Public License as | |
13 | # published by the Free Software Foundation; either version 2 of | |
14 | # the License, or (at your option) any later version. | |
15 | # | |
16 | # This program is distributed in the hope that it will be useful, | |
17 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | # GNU General Public License for more details. | |
20 | # | |
21 | # You should have received a copy of the GNU General Public License | |
22 | # along with this program; if not, write to the Free Software | |
23 | # Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | # MA 02111-1307 USA | |
25 | # | |
26 | ||
27 | include $(TOPDIR)/config.mk | |
28 | ||
f9328639 | 29 | LIB = $(obj)lib$(CPU).a |
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30 | |
31 | START = start.o resetvec.o | |
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32 | SOBJS-$(CONFIG_MP) += release.o |
33 | SOBJS = $(SOBJS-y) | |
34 | COBJS-$(CONFIG_MP) += mp.o | |
f852ce72 | 35 | COBJS-$(CONFIG_OF_LIBFDT) += fdt.o |
58e5e9af | 36 | |
2a6c2d7a | 37 | # supports ddr1 |
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38 | COBJS-$(CONFIG_MPC8540) += ddr-gen1.o |
39 | COBJS-$(CONFIG_MPC8560) += ddr-gen1.o | |
40 | COBJS-$(CONFIG_MPC8541) += ddr-gen1.o | |
41 | COBJS-$(CONFIG_MPC8555) += ddr-gen1.o | |
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42 | |
43 | # supports ddr1/2 | |
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44 | COBJS-$(CONFIG_MPC8548) += ddr-gen2.o |
45 | COBJS-$(CONFIG_MPC8568) += ddr-gen2.o | |
46 | COBJS-$(CONFIG_MPC8544) += ddr-gen2.o | |
47 | ||
48 | # supports ddr1/2/3 | |
49 | COBJS-$(CONFIG_MPC8572) += ddr-gen3.o | |
50 | COBJS-$(CONFIG_MPC8536) += ddr-gen3.o | |
58e5e9af | 51 | |
44a23cfd | 52 | COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o tlb.o \ |
58e5e9af | 53 | pci.o serial_scc.o commproc.o ether_fcc.o qe_io.o \ |
f852ce72 | 54 | $(COBJS-y) |
42d1f039 | 55 | |
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56 | SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) |
57 | OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) | |
58 | START := $(addprefix $(obj),$(START)) | |
59 | ||
60 | all: $(obj).depend $(START) $(LIB) | |
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61 | |
62 | $(LIB): $(OBJS) | |
2b208f53 | 63 | $(AR) $(ARFLAGS) $@ $(OBJS) |
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64 | |
65 | ######################################################################### | |
66 | ||
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67 | # defines $(obj).depend target |
68 | include $(SRCTREE)/rules.mk | |
42d1f039 | 69 | |
f9328639 | 70 | sinclude $(obj).depend |
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71 | |
72 | ######################################################################### |