]> git.ipfire.org Git - people/ms/u-boot.git/blame - cpu/mpc85xx/fdt.c
Fix calculation of I2C clock for some 85xx chips
[people/ms/u-boot.git] / cpu / mpc85xx / fdt.c
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1/*
2 * Copyright 2007 Freescale Semiconductor, Inc.
3 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <libfdt.h>
28#include <fdt_support.h>
29
69018ce2 30extern void ft_qe_setup(void *blob);
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31#ifdef CONFIG_MP
32#include "mp.h"
33DECLARE_GLOBAL_DATA_PTR;
34
35void ft_fixup_cpu(void *blob, u64 memory_limit)
36{
37 int off;
38 ulong spin_tbl_addr = get_spin_addr();
39 u32 bootpg, id = get_my_id();
40
41 /* if we have 4G or more of memory, put the boot page at 4Gb-4k */
42 if ((u64)gd->ram_size > 0xfffff000)
43 bootpg = 0xfffff000;
44 else
45 bootpg = gd->ram_size - 4096;
46
47 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
48 while (off != -FDT_ERR_NOTFOUND) {
49 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
50
51 if (reg) {
52 if (*reg == id) {
53 fdt_setprop_string(blob, off, "status", "okay");
54 } else {
79679d80 55 u32 val = *reg * SIZE_BOOT_ENTRY + spin_tbl_addr;
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56 val = cpu_to_fdt32(val);
57 fdt_setprop_string(blob, off, "status",
58 "disabled");
59 fdt_setprop_string(blob, off, "enable-method",
60 "spin-table");
61 fdt_setprop(blob, off, "cpu-release-addr",
62 &val, sizeof(val));
63 }
64 } else {
65 printf ("cpu NULL\n");
66 }
67 off = fdt_node_offset_by_prop_value(blob, off,
68 "device_type", "cpu", 4);
69 }
70
71 /* Reserve the boot page so OSes dont use it */
72 if ((u64)bootpg < memory_limit) {
73 off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
74 if (off < 0)
75 printf("%s: %s\n", __FUNCTION__, fdt_strerror(off));
76 }
77}
78#endif
69018ce2 79
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80void ft_cpu_setup(void *blob, bd_t *bd)
81{
82#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
83 defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
84 fdt_fixup_ethernet(blob, bd);
85#endif
86
87 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
88 "timebase-frequency", bd->bi_busfreq / 8, 1);
89 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
90 "bus-frequency", bd->bi_busfreq, 1);
91 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
92 "clock-frequency", bd->bi_intfreq, 1);
93 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
94 "bus-frequency", bd->bi_busfreq, 1);
95#ifdef CONFIG_QE
69018ce2 96 ft_qe_setup(blob);
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97#endif
98
99#ifdef CFG_NS16550
100 do_fixup_by_compat_u32(blob, "ns16550",
101 "clock-frequency", bd->bi_busfreq, 1);
102#endif
103
104#ifdef CONFIG_CPM2
105 do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
106 "current-speed", bd->bi_baudrate, 1);
107
108 do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
109 "clock-frequency", bd->bi_brgfreq, 1);
110#endif
111
112 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
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113
114#ifdef CONFIG_MP
115 ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
116#endif
f852ce72 117}