]> git.ipfire.org Git - people/ms/u-boot.git/blame - cpu/mpc86xx/interrupts.c
cpu/86xx fixes.
[people/ms/u-boot.git] / cpu / mpc86xx / interrupts.c
CommitLineData
debb7354
JL
1/*
2 * (C) Copyright 2000-2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2002 (440 port)
6 * Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com
7 *
8 * (C) Copyright 2003 Motorola Inc. (MPC85xx port)
9 * Xianghua Xiao (X.Xiao@motorola.com)
10 *
cfc7a7f5 11 * (C) Copyright 2004, 2007 Freescale Semiconductor. (MPC86xx Port)
c934f655 12 * Jeff Brown
debb7354
JL
13 * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
14 *
15 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
33
34#include <common.h>
35#include <mpc86xx.h>
36#include <command.h>
37#include <asm/processor.h>
38#include <ppc_asm.tmpl>
39
c934f655 40unsigned long decrementer_count; /* count value for 1e6/HZ microseconds */
debb7354
JL
41unsigned long timestamp;
42
c934f655 43
ffff3ae5 44static __inline__ unsigned long get_msr(void)
debb7354
JL
45{
46 unsigned long msr;
47
48 asm volatile ("mfmsr %0":"=r" (msr):);
49
50 return msr;
51}
52
ffff3ae5 53static __inline__ void set_msr(unsigned long msr)
debb7354
JL
54{
55 asm volatile ("mtmsr %0"::"r" (msr));
56}
57
ffff3ae5 58static __inline__ unsigned long get_dec(void)
debb7354
JL
59{
60 unsigned long val;
61
62 asm volatile ("mfdec %0":"=r" (val):);
63
64 return val;
65}
66
ffff3ae5 67static __inline__ void set_dec(unsigned long val)
debb7354
JL
68{
69 if (val)
70 asm volatile ("mtdec %0"::"r" (val));
71}
72
73/* interrupt is not supported yet */
cdd917a4 74int interrupt_init_cpu(unsigned long *decrementer_count)
debb7354 75{
c934f655 76 return 0;
debb7354
JL
77}
78
ffff3ae5 79int interrupt_init(void)
debb7354
JL
80{
81 int ret;
82
cfc7a7f5
JL
83 volatile immap_t *immr = (immap_t *)CFG_IMMR;
84 immr->im_pic.gcr = MPC86xx_PICGCR_RST;
85 while (immr->im_pic.gcr & MPC86xx_PICGCR_RST);
86 immr->im_pic.gcr = MPC86xx_PICGCR_MODE;
9964a4dd 87
debb7354 88 /* call cpu specific function from $(CPU)/interrupts.c */
ffff3ae5 89 ret = interrupt_init_cpu(&decrementer_count);
debb7354
JL
90
91 if (ret)
92 return ret;
93
ffff3ae5 94 decrementer_count = get_tbclk() / CFG_HZ;
cdd917a4 95 debug("interrupt init: tbclk() = %d MHz, decrementer_count = %ld\n",
ffff3ae5
JL
96 (get_tbclk() / 1000000),
97 decrementer_count);
5c9efb36 98
ffff3ae5 99 set_dec(decrementer_count);
debb7354 100
ffff3ae5 101 set_msr(get_msr() | MSR_EE);
debb7354 102
ffff3ae5
JL
103 debug("MSR = 0x%08lx, Decrementer reg = 0x%08lx\n",
104 get_msr(),
105 get_dec());
5c9efb36 106
cfc7a7f5
JL
107#ifdef CONFIG_INTERRUPTS
108 volatile ccsr_pic_t *pic = &immr->im_pic;
109
110 pic->iivpr1 = 0x810001; /* 50220 enable mcm interrupts */
111 debug("iivpr1@%x = %x\n", &pic->iivpr1, pic->iivpr1);
112
113 pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
114 debug("iivpr2@%x = %x\n", &pic->iivpr2, pic->iivpr2);
115
116 pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
117 debug("iivpr3@%x = %x\n", &pic->iivpr3, pic->iivpr3);
118
119#if defined(CONFIG_PCI1) || defined(CONFIG_PCIE1)
120 pic->iivpr8 = 0x810008; /* enable pcie1 interrupts */
121 debug("iivpr8@%x = %x\n", &pic->iivpr8, pic->iivpr8);
122#endif
123#if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
124 pic->iivpr9 = 0x810009; /* enable pcie2 interrupts */
125 debug("iivpr9@%x = %x\n", &pic->iivpr9, pic->iivpr9);
126#endif
127
128 pic->ctpr = 0; /* 40080 clear current task priority register */
129#endif
130
5c9efb36 131 return 0;
debb7354
JL
132}
133
ffff3ae5 134void enable_interrupts(void)
debb7354 135{
ffff3ae5 136 set_msr(get_msr() | MSR_EE);
debb7354
JL
137}
138
139/* returns flag if MSR_EE was set before */
ffff3ae5 140int disable_interrupts(void)
debb7354 141{
ffff3ae5 142 ulong msr = get_msr();
debb7354 143
ffff3ae5 144 set_msr(msr & ~MSR_EE);
5c9efb36 145 return (msr & MSR_EE) != 0;
debb7354
JL
146}
147
debb7354
JL
148void increment_timestamp(void)
149{
c934f655 150 timestamp++;
debb7354
JL
151}
152
153/*
154 * timer_interrupt - gets called when the decrementer overflows,
155 * with interrupts disabled.
156 * Trivial implementation - no need to be really accurate.
157 */
ffff3ae5 158void timer_interrupt_cpu(struct pt_regs *regs)
debb7354
JL
159{
160 /* nothing to do here */
debb7354
JL
161}
162
ffff3ae5 163void timer_interrupt(struct pt_regs *regs)
debb7354 164{
c934f655 165 /* call cpu specific function from $(CPU)/interrupts.c */
ffff3ae5 166 timer_interrupt_cpu(regs);
5c9efb36 167
c934f655 168 timestamp++;
debb7354 169
c934f655 170 /* Restore Decrementer Count */
ffff3ae5 171 set_dec(decrementer_count);
5c9efb36 172
debb7354
JL
173#if defined(CONFIG_WATCHDOG) || defined (CONFIG_HW_WATCHDOG)
174 if ((timestamp % (CFG_WATCHDOG_FREQ)) == 0)
ffff3ae5
JL
175 WATCHDOG_RESET();
176#endif /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */
debb7354
JL
177
178#ifdef CONFIG_STATUS_LED
ffff3ae5 179 status_led_tick(timestamp);
debb7354
JL
180#endif /* CONFIG_STATUS_LED */
181
182#ifdef CONFIG_SHOW_ACTIVITY
ffff3ae5 183 board_show_activity(timestamp);
debb7354
JL
184#endif /* CONFIG_SHOW_ACTIVITY */
185
debb7354
JL
186}
187
ffff3ae5 188void reset_timer(void)
debb7354 189{
c934f655 190 timestamp = 0;
debb7354
JL
191}
192
ffff3ae5 193ulong get_timer(ulong base)
5c9efb36 194{
c934f655 195 return timestamp - base;
debb7354
JL
196}
197
ffff3ae5 198void set_timer(ulong t)
debb7354 199{
c934f655 200 timestamp = t;
debb7354
JL
201}
202
203/*
204 * Install and free a interrupt handler. Not implemented yet.
205 */
206
ffff3ae5 207void irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
debb7354 208{
debb7354
JL
209}
210
ffff3ae5 211void irq_free_handler(int vec)
debb7354 212{
debb7354
JL
213}
214
c934f655 215/*
debb7354 216 * irqinfo - print information about PCI devices,not implemented.
debb7354 217 */
ffff3ae5 218int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
debb7354 219{
ffff3ae5 220 printf("\nInterrupt-unsupported:\n");
debb7354
JL
221
222 return 0;
223}
224
225/*
226 * Handle external interrupts
227 */
ffff3ae5 228void external_interrupt(struct pt_regs *regs)
debb7354
JL
229{
230 puts("external_interrupt (oops!)\n");
231}