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85xx: Added single core members of FSL P1xx/P2xx processors series
[people/ms/u-boot.git] / cpu / mpc8xxx / cpu.c
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1/*
2 * Copyright 2009 Freescale Semiconductor, Inc.
3 *
4 * This file is derived from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c.
5 * Basically this file contains cpu specific common code for 85xx/86xx
6 * processors.
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <config.h>
27#include <common.h>
28#include <command.h>
29#include <tsec.h>
30#include <netdev.h>
31#include <asm/cache.h>
32#include <asm/io.h>
33
34DECLARE_GLOBAL_DATA_PTR;
35
36struct cpu_type cpu_type_list [] = {
37#if defined(CONFIG_MPC85xx)
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38 CPU_TYPE_ENTRY(8533, 8533, 1),
39 CPU_TYPE_ENTRY(8533, 8533_E, 1),
40 CPU_TYPE_ENTRY(8535, 8535, 1),
41 CPU_TYPE_ENTRY(8535, 8535_E, 1),
42 CPU_TYPE_ENTRY(8536, 8536, 1),
43 CPU_TYPE_ENTRY(8536, 8536_E, 1),
44 CPU_TYPE_ENTRY(8540, 8540, 1),
45 CPU_TYPE_ENTRY(8541, 8541, 1),
46 CPU_TYPE_ENTRY(8541, 8541_E, 1),
47 CPU_TYPE_ENTRY(8543, 8543, 1),
48 CPU_TYPE_ENTRY(8543, 8543_E, 1),
49 CPU_TYPE_ENTRY(8544, 8544, 1),
50 CPU_TYPE_ENTRY(8544, 8544_E, 1),
51 CPU_TYPE_ENTRY(8545, 8545, 1),
52 CPU_TYPE_ENTRY(8545, 8545_E, 1),
53 CPU_TYPE_ENTRY(8547, 8547_E, 1),
54 CPU_TYPE_ENTRY(8548, 8548, 1),
55 CPU_TYPE_ENTRY(8548, 8548_E, 1),
56 CPU_TYPE_ENTRY(8555, 8555, 1),
57 CPU_TYPE_ENTRY(8555, 8555_E, 1),
58 CPU_TYPE_ENTRY(8560, 8560, 1),
59 CPU_TYPE_ENTRY(8567, 8567, 1),
60 CPU_TYPE_ENTRY(8567, 8567_E, 1),
61 CPU_TYPE_ENTRY(8568, 8568, 1),
62 CPU_TYPE_ENTRY(8568, 8568_E, 1),
63 CPU_TYPE_ENTRY(8569, 8569, 1),
64 CPU_TYPE_ENTRY(8569, 8569_E, 1),
65 CPU_TYPE_ENTRY(8572, 8572, 2),
66 CPU_TYPE_ENTRY(8572, 8572_E, 2),
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67 CPU_TYPE_ENTRY(P1011, P1011, 1),
68 CPU_TYPE_ENTRY(P1011, P1011_E, 1),
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69 CPU_TYPE_ENTRY(P1020, P1020, 2),
70 CPU_TYPE_ENTRY(P1020, P1020_E, 2),
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71 CPU_TYPE_ENTRY(P2010, P2010, 1),
72 CPU_TYPE_ENTRY(P2010, P2010_E, 1),
73 CPU_TYPE_ENTRY(P2020, P2020, 2),
74 CPU_TYPE_ENTRY(P2020, P2020_E, 2),
18bacc20 75#elif defined(CONFIG_MPC86xx)
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76 CPU_TYPE_ENTRY(8610, 8610, 1),
77 CPU_TYPE_ENTRY(8641, 8641, 2),
78 CPU_TYPE_ENTRY(8641D, 8641D, 2),
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79#endif
80};
81
82struct cpu_type *identify_cpu(u32 ver)
83{
84 int i;
85 for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++) {
86 if (cpu_type_list[i].soc_ver == ver)
87 return &cpu_type_list[i];
88 }
89
90 return NULL;
91}
92
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93int cpu_numcores() {
94 struct cpu_type *cpu;
95 cpu = gd->cpu;
96 return cpu->num_cores;
97}
98
99int probecpu (void)
100{
101 uint svr;
102 uint ver;
103
104 svr = get_svr();
105 ver = SVR_SOC_VER(svr);
106
107 gd->cpu = identify_cpu(ver);
108
109#ifndef CONFIG_MP
110 if (cpu_numcores() > 1) {
111 puts("Unicore software on multiprocessor system!!\n"
112 "To enable mutlticore build define CONFIG_MP\n");
113 }
114#endif
115 return 0;
116}
117
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118/*
119 * Initializes on-chip ethernet controllers.
120 * to override, implement board_eth_init()
121 */
122int cpu_eth_init(bd_t *bis)
123{
124#if defined(CONFIG_ETHER_ON_FCC)
125 fec_initialize(bis);
126#endif
127
128#if defined(CONFIG_UEC_ETH)
129 uec_standard_init(bis);
130#endif
131
132#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC)
133 tsec_standard_init(bis);
134#endif
135
136 return 0;
137}