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Major cleanup for AMCC PPC4xx eval boards.
[people/ms/u-boot.git] / cpu / ppc4xx / usb_ohci.c
CommitLineData
c157d8e2
SR		 1/*
2 * URB OHCI HCD (Host Controller Driver) for USB on the PPC 440.
3 *
4 * (C) Copyright 2003-2004
5 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
6 *
7 * (C) Copyright 2004
8 * Pierre Aubert, Staubli Faverges <p.aubert@staubli.com>
9 *
10 * Note: Much of this code has been derived from Linux 2.4
11 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
12 * (C) Copyright 2000-2002 David Brownell
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
32 */
33/*
34 * IMPORTANT NOTES
35 * 1 - this driver is intended for use with USB Mass Storage Devices
36 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
37 */
38
39#include <common.h>
40
41#ifdef CONFIG_USB_OHCI
42
43#include <malloc.h>
44#include <usb.h>
45#include "usb_ohci.h"
46#include "usbdev.h"
47
48#define OHCI_USE_NPS /* force NoPowerSwitching mode */
49#undef OHCI_VERBOSE_DEBUG /* not always helpful */
50#undef DEBUG
51#undef SHOW_INFO
52#undef OHCI_FILL_TRACE
53
54/* For initializing controller (mask in an HCFS mode too) */
55#define OHCI_CONTROL_INIT \
56 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
57
58#define readl(a) (*((vu_long *)(a)))
59#define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
60
61#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
62
63#ifdef DEBUG
64#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
65#else
66#define dbg(format, arg...) do {} while(0)
67#endif /* DEBUG */
68#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
69#ifdef SHOW_INFO
70#define info(format, arg...) printf("INFO: " format "\n", ## arg)
71#else
72#define info(format, arg...) do {} while(0)
73#endif
74
75#define m16_swap(x) swap_16(x)
76#define m32_swap(x) swap_32(x)
77
78#if 1
79#define ohci_cpu_to_le16(x) (x)
80#define ohci_cpu_to_le32(x) (x)
81#else
82#define ohci_cpu_to_le16(x) swap_16(x)
83#define ohci_cpu_to_le32(x) swap_32(x)
84#endif
85
86/* global ohci_t */
87static ohci_t gohci;
88/* this must be aligned to a 256 byte boundary */
89struct ohci_hcca ghcca[1];
90/* a pointer to the aligned storage */
91struct ohci_hcca *phcca;
92/* this allocates EDs for all possible endpoints */
93struct ohci_device ohci_dev;
94/* urb_priv */
95urb_priv_t urb_priv;
96/* RHSC flag */
97int got_rhsc;
98/* device which was disconnected */
99struct usb_device *devgone;
100
101/*-------------------------------------------------------------------------*/
102
103/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
104 * The erratum (#4) description is incorrect. AMD's workaround waits
105 * till some bits (mostly reserved) are clear; ok for all revs.
106 */
107#define OHCI_QUIRK_AMD756 0xabcd
108#define read_roothub(hc, register, mask) ({ \
109 u32 temp = readl (&hc->regs->roothub.register); \
110 if (hc->flags & OHCI_QUIRK_AMD756) \
111 while (temp & mask) \
112 temp = readl (&hc->regs->roothub.register); \
113 temp; })
114
115static u32 roothub_a(struct ohci *hc)
116{
117 return read_roothub(hc, a, 0xfc0fe000);
118}
119static inline u32 roothub_b(struct ohci *hc)
120{
121 return readl(&hc->regs->roothub.b);
122}
123static inline u32 roothub_status(struct ohci *hc)
124{
125 return readl(&hc->regs->roothub.status);
126}
127static u32 roothub_portstatus(struct ohci *hc, int i)
128{
129 return read_roothub(hc, portstatus[i], 0xffe0fce0);
130}
131
132/* forward declaration */
133static int hc_interrupt(void);
134static void
135td_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
136 int transfer_len, struct devrequest *setup, urb_priv_t * urb,
137 int interval);
138
139/*-------------------------------------------------------------------------*
140 * URB support functions
141 *-------------------------------------------------------------------------*/
142
143/* free HCD-private data associated with this URB */
144
145static void urb_free_priv(urb_priv_t * urb)
146{
147 int i;
148 int last;
149 struct td *td;
150
151 last = urb->length - 1;
152 if (last >= 0) {
153 for (i = 0; i <= last; i++) {
154 td = urb->td[i];
155 if (td) {
156 td->usb_dev = NULL;
157 urb->td[i] = NULL;
158 }
159 }
160 }
161}
162
163/*-------------------------------------------------------------------------*/
164
165#ifdef DEBUG
166static int sohci_get_current_frame_number(struct usb_device *dev);
167
168/* debug| print the main components of an URB
169 * small: 0) header + data packets 1) just header */
170
171static void pkt_print(struct usb_device *dev, unsigned long pipe, void *buffer,
172 int transfer_len, struct devrequest *setup, char *str,
173 int small)
174{
175 urb_priv_t *purb = &urb_priv;
176
177 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
178 str,
179 sohci_get_current_frame_number(dev),
180 usb_pipedevice(pipe),
181 usb_pipeendpoint(pipe),
182 usb_pipeout(pipe) ? 'O' : 'I',
183 usb_pipetype(pipe) < 2 ? (usb_pipeint(pipe) ? "INTR" : "ISOC") :
184 (usb_pipecontrol(pipe) ? "CTRL" : "BULK"),
185 purb->actual_length, transfer_len, dev->status);
186#ifdef OHCI_VERBOSE_DEBUG
187 if (!small) {
188 int i, len;
189
190 if (usb_pipecontrol(pipe)) {
191 printf(__FILE__ ": cmd(8):");
192 for (i = 0; i < 8; i++)
193 printf(" %02x", ((__u8 *) setup)[i]);
194 printf("\n");
195 }
196 if (transfer_len > 0 && buffer) {
197 printf(__FILE__ ": data(%d/%d):",
198 purb->actual_length, transfer_len);
199 len = usb_pipeout(pipe) ?
200 transfer_len : purb->actual_length;
201 for (i = 0; i < 16 && i < len; i++)
202 printf(" %02x", ((__u8 *) buffer)[i]);
203 printf("%s\n", i < len ? "..." : "");
204 }
205 }
206#endif
207}
208
209/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
210void ep_print_int_eds(ohci_t * ohci, char *str)
211{
212 int i, j;
213 __u32 *ed_p;
214 for (i = 0; i < 32; i++) {
215 j = 5;
216 ed_p = &(ohci->hcca->int_table[i]);
217 if (*ed_p == 0)
218 continue;
219 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
220 while (*ed_p != 0 && j--) {
221 ed_t *ed = (ed_t *) ohci_cpu_to_le32(ed_p);
222 printf(" ed: %4x;", ed->hwINFO);
223 ed_p = &ed->hwNextED;
224 }
225 printf("\n");
226 }
227}
228
229static void ohci_dump_intr_mask(char *label, __u32 mask)
230{
231 dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
232 label,
233 mask,
234 (mask & OHCI_INTR_MIE) ? " MIE" : "",
235 (mask & OHCI_INTR_OC) ? " OC" : "",
236 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
237 (mask & OHCI_INTR_FNO) ? " FNO" : "",
238 (mask & OHCI_INTR_UE) ? " UE" : "",
239 (mask & OHCI_INTR_RD) ? " RD" : "",
240 (mask & OHCI_INTR_SF) ? " SF" : "",
241 (mask & OHCI_INTR_WDH) ? " WDH" : "",
242 (mask & OHCI_INTR_SO) ? " SO" : "");
243}
244
245static void maybe_print_eds(char *label, __u32 value)
246{
247 ed_t *edp = (ed_t *) value;
248
249 if (value) {
250 dbg("%s %08x", label, value);
251 dbg("%08x", edp->hwINFO);
252 dbg("%08x", edp->hwTailP);
253 dbg("%08x", edp->hwHeadP);
254 dbg("%08x", edp->hwNextED);
255 }
256}
257
258static char *hcfs2string(int state)
259{
260 switch (state) {
261 case OHCI_USB_RESET:
262 return "reset";
263 case OHCI_USB_RESUME:
264 return "resume";
265 case OHCI_USB_OPER:
266 return "operational";
267 case OHCI_USB_SUSPEND:
268 return "suspend";
269 }
270 return "?";
271}
272
273/* dump control and status registers */
274static void ohci_dump_status(ohci_t * controller)
275{
276 struct ohci_regs *regs = controller->regs;
277 __u32 temp;
278
279 temp = readl(&regs->revision) & 0xff;
280 if (temp != 0x10)
281 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
282
283 temp = readl(&regs->control);
284 dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
285 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
286 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
287 (temp & OHCI_CTRL_IR) ? " IR" : "",
288 hcfs2string(temp & OHCI_CTRL_HCFS),
289 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
290 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
291 (temp & OHCI_CTRL_IE) ? " IE" : "",
292 (temp & OHCI_CTRL_PLE) ? " PLE" : "", temp & OHCI_CTRL_CBSR);
293
294 temp = readl(&regs->cmdstatus);
295 dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
296 (temp & OHCI_SOC) >> 16,
297 (temp & OHCI_OCR) ? " OCR" : "",
298 (temp & OHCI_BLF) ? " BLF" : "",
299 (temp & OHCI_CLF) ? " CLF" : "", (temp & OHCI_HCR) ? " HCR" : "");
300
301 ohci_dump_intr_mask("intrstatus", readl(&regs->intrstatus));
302 ohci_dump_intr_mask("intrenable", readl(&regs->intrenable));
303
304 maybe_print_eds("ed_periodcurrent", readl(&regs->ed_periodcurrent));
305
306 maybe_print_eds("ed_controlhead", readl(&regs->ed_controlhead));
307 maybe_print_eds("ed_controlcurrent", readl(&regs->ed_controlcurrent));
308
309 maybe_print_eds("ed_bulkhead", readl(&regs->ed_bulkhead));
310 maybe_print_eds("ed_bulkcurrent", readl(&regs->ed_bulkcurrent));
311
312 maybe_print_eds("donehead", readl(&regs->donehead));
313}
314
315static void ohci_dump_roothub(ohci_t * controller, int verbose)
316{
317 __u32 temp, ndp, i;
318
319 temp = roothub_a(controller);
320 ndp = (temp & RH_A_NDP);
321
322 if (verbose) {
323 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
324 ((temp & RH_A_POTPGT) >> 24) & 0xff,
325 (temp & RH_A_NOCP) ? " NOCP" : "",
326 (temp & RH_A_OCPM) ? " OCPM" : "",
327 (temp & RH_A_DT) ? " DT" : "",
328 (temp & RH_A_NPS) ? " NPS" : "",
329 (temp & RH_A_PSM) ? " PSM" : "", ndp);
330 temp = roothub_b(controller);
331 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
332 temp, (temp & RH_B_PPCM) >> 16, (temp & RH_B_DR)
333 );
334 temp = roothub_status(controller);
335 dbg("roothub.status: %08x%s%s%s%s%s%s",
336 temp,
337 (temp & RH_HS_CRWE) ? " CRWE" : "",
338 (temp & RH_HS_OCIC) ? " OCIC" : "",
339 (temp & RH_HS_LPSC) ? " LPSC" : "",
340 (temp & RH_HS_DRWE) ? " DRWE" : "",
341 (temp & RH_HS_OCI) ? " OCI" : "",
342 (temp & RH_HS_LPS) ? " LPS" : "");
343 }
344
345 for (i = 0; i < ndp; i++) {
346 temp = roothub_portstatus(controller, i);
347 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
348 i,
349 temp,
350 (temp & RH_PS_PRSC) ? " PRSC" : "",
351 (temp & RH_PS_OCIC) ? " OCIC" : "",
352 (temp & RH_PS_PSSC) ? " PSSC" : "",
353 (temp & RH_PS_PESC) ? " PESC" : "",
354 (temp & RH_PS_CSC) ? " CSC" : "",
355 (temp & RH_PS_LSDA) ? " LSDA" : "",
356 (temp & RH_PS_PPS) ? " PPS" : "",
357 (temp & RH_PS_PRS) ? " PRS" : "",
358 (temp & RH_PS_POCI) ? " POCI" : "",
359 (temp & RH_PS_PSS) ? " PSS" : "",
360 (temp & RH_PS_PES) ? " PES" : "",
361 (temp & RH_PS_CCS) ? " CCS" : "");
362 }
363}
364
365static void ohci_dump(ohci_t * controller, int verbose)
366{
367 dbg("OHCI controller usb-%s state", controller->slot_name);
368
369 /* dumps some of the state we know about */
370 ohci_dump_status(controller);
371 if (verbose)
372 ep_print_int_eds(controller, "hcca");
373 dbg("hcca frame #%04x", controller->hcca->frame_no);
374 ohci_dump_roothub(controller, 1);
375}
376
377#endif /* DEBUG */
378
379/*-------------------------------------------------------------------------*
380 * Interface functions (URB)
381 *-------------------------------------------------------------------------*/
382
383/* get a transfer request */
384
385int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
386 int transfer_len, struct devrequest *setup, int interval)
387{
388 ohci_t *ohci;
389 ed_t *ed;
390 urb_priv_t *purb_priv;
391 int i, size = 0;
392
393 ohci = &gohci;
394
395 /* when controller's hung, permit only roothub cleanup attempts
396 * such as powering down ports */
397 if (ohci->disabled) {
398 err("sohci_submit_job: EPIPE");
399 return -1;
400 }
401
402 /* every endpoint has a ed, locate and fill it */
403 if (!(ed = ep_add_ed(dev, pipe))) {
404 err("sohci_submit_job: ENOMEM");
405 return -1;
406 }
407
408 /* for the private part of the URB we need the number of TDs (size) */
409 switch (usb_pipetype(pipe)) {
410 case PIPE_BULK: /* one TD for every 4096 Byte */
411 size = (transfer_len - 1) / 4096 + 1;
412 break;
413 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
414 size = (transfer_len == 0) ? 2 : (transfer_len - 1) / 4096 + 3;
415 break;
416 }
417
418 if (size >= (N_URB_TD - 1)) {
419 err("need %d TDs, only have %d", size, N_URB_TD);
420 return -1;
421 }
422 purb_priv = &urb_priv;
423 purb_priv->pipe = pipe;
424
425 /* fill the private part of the URB */
426 purb_priv->length = size;
427 purb_priv->ed = ed;
428 purb_priv->actual_length = 0;
429
430 /* allocate the TDs */
431 /* note that td[0] was allocated in ep_add_ed */
432 for (i = 0; i < size; i++) {
433 purb_priv->td[i] = td_alloc(dev);
434 if (!purb_priv->td[i]) {
435 purb_priv->length = i;
436 urb_free_priv(purb_priv);
437 err("sohci_submit_job: ENOMEM");
438 return -1;
439 }
440 }
441
442 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
443 urb_free_priv(purb_priv);
444 err("sohci_submit_job: EINVAL");
445 return -1;
446 }
447
448 /* link the ed into a chain if is not already */
449 if (ed->state != ED_OPER)
450 ep_link(ohci, ed);
451
452 /* fill the TDs and link it to the ed */
453 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv,
454 interval);
455
456 return 0;
457}
458
459/*-------------------------------------------------------------------------*/
460
461#ifdef DEBUG
462/* tell us the current USB frame number */
463
464static int sohci_get_current_frame_number(struct usb_device *usb_dev)
465{
466 ohci_t *ohci = &gohci;
467
468 return ohci_cpu_to_le16(ohci->hcca->frame_no);
469}
470#endif
471
472/*-------------------------------------------------------------------------*
473 * ED handling functions
474 *-------------------------------------------------------------------------*/
475
476/* link an ed into one of the HC chains */
477
478static int ep_link(ohci_t * ohci, ed_t * edi)
479{
480 volatile ed_t *ed = edi;
481
482 ed->state = ED_OPER;
483
484 switch (ed->type) {
485 case PIPE_CONTROL:
486 ed->hwNextED = 0;
487 if (ohci->ed_controltail == NULL) {
488 writel(ed, &ohci->regs->ed_controlhead);
489 } else {
490 ohci->ed_controltail->hwNextED =
491 ohci_cpu_to_le32((unsigned long)ed);
492 }
493 ed->ed_prev = ohci->ed_controltail;
494 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
495 !ohci->ed_rm_list[1] && !ohci->sleeping) {
496 ohci->hc_control |= OHCI_CTRL_CLE;
497 writel(ohci->hc_control, &ohci->regs->control);
498 }
499 ohci->ed_controltail = edi;
500 break;
501
502 case PIPE_BULK:
503 ed->hwNextED = 0;
504 if (ohci->ed_bulktail == NULL) {
505 writel(ed, &ohci->regs->ed_bulkhead);
506 } else {
507 ohci->ed_bulktail->hwNextED =
508 ohci_cpu_to_le32((unsigned long)ed);
509 }
510 ed->ed_prev = ohci->ed_bulktail;
511 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
512 !ohci->ed_rm_list[1] && !ohci->sleeping) {
513 ohci->hc_control |= OHCI_CTRL_BLE;
514 writel(ohci->hc_control, &ohci->regs->control);
515 }
516 ohci->ed_bulktail = edi;
517 break;
518 }
519 return 0;
520}
521
522/*-------------------------------------------------------------------------*/
523
524/* unlink an ed from one of the HC chains.
525 * just the link to the ed is unlinked.
526 * the link from the ed still points to another operational ed or 0
527 * so the HC can eventually finish the processing of the unlinked ed */
528
529static int ep_unlink(ohci_t * ohci, ed_t * edi)
530{
531 volatile ed_t *ed = edi;
532
533 ed->hwINFO |= ohci_cpu_to_le32(OHCI_ED_SKIP);
534
535 switch (ed->type) {
536 case PIPE_CONTROL:
537 if (ed->ed_prev == NULL) {
538 if (!ed->hwNextED) {
539 ohci->hc_control &= ~OHCI_CTRL_CLE;
540 writel(ohci->hc_control, &ohci->regs->control);
541 }
542 writel(ohci_cpu_to_le32(*((__u32 *) & ed->hwNextED)),
543 &ohci->regs->ed_controlhead);
544 } else {
545 ed->ed_prev->hwNextED = ed->hwNextED;
546 }
547 if (ohci->ed_controltail == ed) {
548 ohci->ed_controltail = ed->ed_prev;
549 } else {
550 ((ed_t *)
551 ohci_cpu_to_le32(*((__u32 *) & ed->hwNextED)))->
552 ed_prev = ed->ed_prev;
553 }
554 break;
555
556 case PIPE_BULK:
557 if (ed->ed_prev == NULL) {
558 if (!ed->hwNextED) {
559 ohci->hc_control &= ~OHCI_CTRL_BLE;
560 writel(ohci->hc_control, &ohci->regs->control);
561 }
562 writel(ohci_cpu_to_le32(*((__u32 *) & ed->hwNextED)),
563 &ohci->regs->ed_bulkhead);
564 } else {
565 ed->ed_prev->hwNextED = ed->hwNextED;
566 }
567 if (ohci->ed_bulktail == ed) {
568 ohci->ed_bulktail = ed->ed_prev;
569 } else {
570 ((ed_t *)
571 ohci_cpu_to_le32(*((__u32 *) & ed->hwNextED)))->
572 ed_prev = ed->ed_prev;
573 }
574 break;
575 }
576 ed->state = ED_UNLINK;
577 return 0;
578}
579
580/*-------------------------------------------------------------------------*/
581
582/* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
583 * but the USB stack is a little bit stateless so we do it at every transaction
584 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
585 * in all other cases the state is left unchanged
586 * the ed info fields are setted anyway even though most of them should not change */
587
588static ed_t *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe)
589{
590 td_t *td;
591 ed_t *ed_ret;
592 volatile ed_t *ed;
593
594 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
595 (usb_pipecontrol(pipe) ? 0 :
596 usb_pipeout(pipe))];
597
598 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
599 err("ep_add_ed: pending delete");
600 /* pending delete request */
601 return NULL;
602 }
603
604 if (ed->state == ED_NEW) {
605 ed->hwINFO = ohci_cpu_to_le32(OHCI_ED_SKIP); /* skip ed */
606 /* dummy td; end of td list for ed */
607 td = td_alloc(usb_dev);
608 ed->hwTailP = ohci_cpu_to_le32((unsigned long)td);
609 ed->hwHeadP = ed->hwTailP;
610 ed->state = ED_UNLINK;
611 ed->type = usb_pipetype(pipe);
612 ohci_dev.ed_cnt++;
613 }
614
615 ed->hwINFO = ohci_cpu_to_le32(usb_pipedevice(pipe)
616 | usb_pipeendpoint(pipe) << 7
617 | (usb_pipeisoc(pipe) ? 0x8000 : 0)
618 | (usb_pipecontrol(pipe) ? 0
619 : (usb_pipeout(pipe) ? 0x800 : 0x1000))
620 | usb_pipeslow(pipe) << 13 |
621 usb_maxpacket(usb_dev, pipe) << 16);
622
623 return ed_ret;
624}
625
626/*-------------------------------------------------------------------------*
627 * TD handling functions
628 *-------------------------------------------------------------------------*/
629
630/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
631
632static void td_fill(ohci_t * ohci, unsigned int info,
633 void *data, int len,
634 struct usb_device *dev, int index, urb_priv_t * urb_priv)
635{
636 volatile td_t *td, *td_pt;
637#ifdef OHCI_FILL_TRACE
638 int i;
639#endif
640
641 if (index > urb_priv->length) {
642 err("index > length");
643 return;
644 }
645 /* use this td as the next dummy */
646 td_pt = urb_priv->td[index];
647 td_pt->hwNextTD = 0;
648
649 /* fill the old dummy TD */
650 td = urb_priv->td[index] =
651 (td_t *) (ohci_cpu_to_le32(urb_priv->ed->hwTailP) & ~0xf);
652
653 td->ed = urb_priv->ed;
654 td->next_dl_td = NULL;
655 td->index = index;
656 td->data = (__u32) data;
657#ifdef OHCI_FILL_TRACE
658 if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK)
659 && usb_pipeout(urb_priv->pipe)) {
660 for (i = 0; i < len; i++)
661 printf("td->data[%d] %#2x ", i,
662 ((unsigned char *)td->data)[i]);
663 printf("\n");
664 }
665#endif
666 if (!len)
667 data = 0;
668
669 td->hwINFO = ohci_cpu_to_le32(info);
670 td->hwCBP = ohci_cpu_to_le32((unsigned long)data);
671 if (data)
672 td->hwBE = ohci_cpu_to_le32((unsigned long)(data + len - 1));
673 else
674 td->hwBE = 0;
675 td->hwNextTD = ohci_cpu_to_le32((unsigned long)td_pt);
676 td->hwPSW[0] = ohci_cpu_to_le16(((__u32) data & 0x0FFF) | 0xE000);
677
678 /* append to queue */
679 td->ed->hwTailP = td->hwNextTD;
680}
681
682/*-------------------------------------------------------------------------*/
683
684/* prepare all TDs of a transfer */
685
686static void td_submit_job(struct usb_device *dev, unsigned long pipe,
687 void *buffer, int transfer_len,
688 struct devrequest *setup, urb_priv_t * urb,
689 int interval)
690{
691 ohci_t *ohci = &gohci;
692 int data_len = transfer_len;
693 void *data;
694 int cnt = 0;
695 __u32 info = 0;
696 unsigned int toggle = 0;
697
698 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
699 if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
700 toggle = TD_T_TOGGLE;
701 } else {
702 toggle = TD_T_DATA0;
703 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe),
704 1);
705 }
706 urb->td_cnt = 0;
707 if (data_len)
708 data = buffer;
709 else
710 data = 0;
711
712 switch (usb_pipetype(pipe)) {
713 case PIPE_BULK:
714 info = usb_pipeout(pipe) ? TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN;
715 while (data_len > 4096) {
716 td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
717 4096, dev, cnt, urb);
718 data += 4096;
719 data_len -= 4096;
720 cnt++;
721 }
722 info = usb_pipeout(pipe) ?
723 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN;
724 td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
725 data_len, dev, cnt, urb);
726 cnt++;
727
728 if (!ohci->sleeping)
729 writel(OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
730 break;
731
732 case PIPE_CONTROL:
733 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
734 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
735 if (data_len > 0) {
736 info = usb_pipeout(pipe) ?
737 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R
738 | TD_DP_IN | TD_T_DATA1;
739 /* NOTE: mishandles transfers >8K, some >4K */
740 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
741 }
742 info = usb_pipeout(pipe) ?
743 TD_CC | TD_DP_IN | TD_T_DATA1 : TD_CC | TD_DP_OUT |
744 TD_T_DATA1;
745 td_fill(ohci, info, data, 0, dev, cnt++, urb);
746 if (!ohci->sleeping)
747 writel(OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
748 break;
749 }
750 if (urb->length != cnt)
751 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
752}
753
754/*-------------------------------------------------------------------------*
755 * Done List handling functions
756 *-------------------------------------------------------------------------*/
757
758/* calculate the transfer length and update the urb */
759
760static void dl_transfer_length(td_t * td)
761{
762 __u32 tdINFO, tdBE, tdCBP;
763 urb_priv_t *lurb_priv = &urb_priv;
764
765 tdINFO = ohci_cpu_to_le32(td->hwINFO);
766 tdBE = ohci_cpu_to_le32(td->hwBE);
767 tdCBP = ohci_cpu_to_le32(td->hwCBP);
768
769 if (!(usb_pipetype(lurb_priv->pipe) == PIPE_CONTROL &&
770 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
771 if (tdBE != 0) {
772 if (td->hwCBP == 0)
773 lurb_priv->actual_length += tdBE - td->data + 1;
774 else
775 lurb_priv->actual_length += tdCBP - td->data;
776 }
777 }
778}
779
780/*-------------------------------------------------------------------------*/
781
782/* replies to the request have to be on a FIFO basis so
783 * we reverse the reversed done-list */
784
785static td_t *dl_reverse_done_list(ohci_t * ohci)
786{
787 __u32 td_list_hc;
788 td_t *td_rev = NULL;
789 td_t *td_list = NULL;
790 urb_priv_t *lurb_priv = NULL;
791
792 td_list_hc = ohci_cpu_to_le32(ohci->hcca->done_head) & 0xfffffff0;
793 ohci->hcca->done_head = 0;
794
795 while (td_list_hc) {
796 td_list = (td_t *) td_list_hc;
797
798 if (TD_CC_GET(ohci_cpu_to_le32(td_list->hwINFO))) {
799 lurb_priv = &urb_priv;
800 dbg(" USB-error/status: %x : %p",
801 TD_CC_GET(ohci_cpu_to_le32(td_list->hwINFO)),
802 td_list);
803 if (td_list->ed->hwHeadP & ohci_cpu_to_le32(0x1)) {
804 if (lurb_priv
805 && ((td_list->index + 1) <
806 lurb_priv->length)) {
807 td_list->ed->hwHeadP =
808 (lurb_priv->
809 td[lurb_priv->length -
810 1]->
811 hwNextTD &
812 ohci_cpu_to_le32(0xfffffff0)) |
813 (td_list->ed->
814 hwHeadP & ohci_cpu_to_le32(0x2));
815 lurb_priv->td_cnt +=
816 lurb_priv->length - td_list->index -
817 1;
818 } else
819 td_list->ed->hwHeadP &=
820 ohci_cpu_to_le32(0xfffffff2);
821 }
822#ifdef CONFIG_MPC5200
823 td_list->hwNextTD = 0;
824#endif
825 }
826
827 td_list->next_dl_td = td_rev;
828 td_rev = td_list;
829 td_list_hc = ohci_cpu_to_le32(td_list->hwNextTD) & 0xfffffff0;
830 }
831 return td_list;
832}
833
834/*-------------------------------------------------------------------------*/
835
836/* td done list */
837static int dl_done_list(ohci_t * ohci, td_t * td_list)
838{
839 td_t *td_list_next = NULL;
840 ed_t *ed;
841 int cc = 0;
842 int stat = 0xff;
843 /* urb_t *urb; */
844 urb_priv_t *lurb_priv;
845 __u32 tdINFO, edHeadP, edTailP;
846
847 while (td_list) {
848 td_list_next = td_list->next_dl_td;
849
850 lurb_priv = &urb_priv;
851 tdINFO = ohci_cpu_to_le32(td_list->hwINFO);
852
853 ed = td_list->ed;
854
855 dl_transfer_length(td_list);
856
857 /* error code of transfer */
858 cc = TD_CC_GET(tdINFO);
859 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
860 if ((ed->state & (ED_OPER | ED_UNLINK))
861 && (lurb_priv->state != URB_DEL)) {
862 dbg("ConditionCode %#x", cc);
863 stat = cc_to_error[cc];
864 }
865 }
866
867 if (ed->state != ED_NEW) {
868 edHeadP = ohci_cpu_to_le32(ed->hwHeadP) & 0xfffffff0;
869 edTailP = ohci_cpu_to_le32(ed->hwTailP);
870
871 /* unlink eds if they are not busy */
872 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
873 ep_unlink(ohci, ed);
874 }
875
876 td_list = td_list_next;
877 }
878 return stat;
879}
880
881/*-------------------------------------------------------------------------*
882 * Virtual Root Hub
883 *-------------------------------------------------------------------------*/
884
885/* Device descriptor */
886static __u8 root_hub_dev_des[] = {
887 0x12, /* __u8 bLength; */
888 0x01, /* __u8 bDescriptorType; Device */
889 0x10, /* __u16 bcdUSB; v1.1 */
890 0x01,
891 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
892 0x00, /* __u8 bDeviceSubClass; */
893 0x00, /* __u8 bDeviceProtocol; */
894 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
895 0x00, /* __u16 idVendor; */
896 0x00,
897 0x00, /* __u16 idProduct; */
898 0x00,
899 0x00, /* __u16 bcdDevice; */
900 0x00,
901 0x00, /* __u8 iManufacturer; */
902 0x01, /* __u8 iProduct; */
903 0x00, /* __u8 iSerialNumber; */
904 0x01 /* __u8 bNumConfigurations; */
905};
906
907/* Configuration descriptor */
908static __u8 root_hub_config_des[] = {
909 0x09, /* __u8 bLength; */
910 0x02, /* __u8 bDescriptorType; Configuration */
911 0x19, /* __u16 wTotalLength; */
912 0x00,
913 0x01, /* __u8 bNumInterfaces; */
914 0x01, /* __u8 bConfigurationValue; */
915 0x00, /* __u8 iConfiguration; */
916 0x40, /* __u8 bmAttributes;
917 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
918 0x00, /* __u8 MaxPower; */
919
920 /* interface */
921 0x09, /* __u8 if_bLength; */
922 0x04, /* __u8 if_bDescriptorType; Interface */
923 0x00, /* __u8 if_bInterfaceNumber; */
924 0x00, /* __u8 if_bAlternateSetting; */
925 0x01, /* __u8 if_bNumEndpoints; */
926 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
927 0x00, /* __u8 if_bInterfaceSubClass; */
928 0x00, /* __u8 if_bInterfaceProtocol; */
929 0x00, /* __u8 if_iInterface; */
930
931 /* endpoint */
932 0x07, /* __u8 ep_bLength; */
933 0x05, /* __u8 ep_bDescriptorType; Endpoint */
934 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
935 0x03, /* __u8 ep_bmAttributes; Interrupt */
936 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
937 0x00,
938 0xff /* __u8 ep_bInterval; 255 ms */
939};
940
941static unsigned char root_hub_str_index0[] = {
942 0x04, /* __u8 bLength; */
943 0x03, /* __u8 bDescriptorType; String-descriptor */
944 0x09, /* __u8 lang ID */
945 0x04, /* __u8 lang ID */
946};
947
948static unsigned char root_hub_str_index1[] = {
949 28, /* __u8 bLength; */
950 0x03, /* __u8 bDescriptorType; String-descriptor */
951 'O', /* __u8 Unicode */
952 0, /* __u8 Unicode */
953 'H', /* __u8 Unicode */
954 0, /* __u8 Unicode */
955 'C', /* __u8 Unicode */
956 0, /* __u8 Unicode */
957 'I', /* __u8 Unicode */
958 0, /* __u8 Unicode */
959 ' ', /* __u8 Unicode */
960 0, /* __u8 Unicode */
961 'R', /* __u8 Unicode */
962 0, /* __u8 Unicode */
963 'o', /* __u8 Unicode */
964 0, /* __u8 Unicode */
965 'o', /* __u8 Unicode */
966 0, /* __u8 Unicode */
967 't', /* __u8 Unicode */
968 0, /* __u8 Unicode */
969 ' ', /* __u8 Unicode */
970 0, /* __u8 Unicode */
971 'H', /* __u8 Unicode */
972 0, /* __u8 Unicode */
973 'u', /* __u8 Unicode */
974 0, /* __u8 Unicode */
975 'b', /* __u8 Unicode */
976 0, /* __u8 Unicode */
977};
978
979/* Hub class-specific descriptor is constructed dynamically */
980
981/*-------------------------------------------------------------------------*/
982
983#define OK(x) len = (x); break
984#ifdef DEBUG
985#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
986#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
987#else
988#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
989#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
990#endif
991#define RD_RH_STAT roothub_status(&gohci)
992#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
993
994/* request to virtual root hub */
995
996int rh_check_port_status(ohci_t * controller)
997{
998 __u32 temp, ndp, i;
999 int res;
1000
1001 res = -1;
1002 temp = roothub_a(controller);
1003 ndp = (temp & RH_A_NDP);
1004 for (i = 0; i < ndp; i++) {
1005 temp = roothub_portstatus(controller, i);
1006 /* check for a device disconnect */
1007 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1008 (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) {
1009 res = i;
1010 break;
1011 }
1012 }
1013 return res;
1014}
1015
1016static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1017 void *buffer, int transfer_len,
1018 struct devrequest *cmd)
1019{
1020 void *data = buffer;
1021 int leni = transfer_len;
1022 int len = 0;
1023 int stat = 0;
1024 __u32 datab[4];
1025 __u8 *data_buf = (__u8 *) datab;
1026 __u16 bmRType_bReq;
1027 __u16 wValue;
1028 __u16 wIndex;
1029 __u16 wLength;
1030
1031#ifdef DEBUG
1032 urb_priv.actual_length = 0;
1033 pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)",
1034 usb_pipein(pipe));
1035#endif
1036 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1037 info("Root-Hub submit IRQ: NOT implemented");
1038 return 0;
1039 }
1040
1041 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1042 wValue = m16_swap(cmd->value);
1043 wIndex = m16_swap(cmd->index);
1044 wLength = m16_swap(cmd->length);
1045
1046 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1047 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1048
1049 switch (bmRType_bReq) {
1050 /* Request Destination:
1051 without flags: Device,
1052 RH_INTERFACE: interface,
1053 RH_ENDPOINT: endpoint,
1054 RH_CLASS means HUB here,
1055 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1056 */
1057
1058 case RH_GET_STATUS:
1059 *(__u16 *) data_buf = m16_swap(1);
1060 OK(2);
1061 case RH_GET_STATUS | RH_INTERFACE:
1062 *(__u16 *) data_buf = m16_swap(0);
1063 OK(2);
1064 case RH_GET_STATUS | RH_ENDPOINT:
1065 *(__u16 *) data_buf = m16_swap(0);
1066 OK(2);
1067 case RH_GET_STATUS | RH_CLASS:
1068 *(__u32 *) data_buf =
1069 m32_swap(RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1070 OK(4);
1071 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1072 *(__u32 *) data_buf = m32_swap(RD_RH_PORTSTAT);
1073 OK(4);
1074
1075 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1076 switch (wValue) {
1077 case (RH_ENDPOINT_STALL):
1078 OK(0);
1079 }
1080 break;
1081
1082 case RH_CLEAR_FEATURE | RH_CLASS:
1083 switch (wValue) {
1084 case RH_C_HUB_LOCAL_POWER:
1085 OK(0);
1086 case (RH_C_HUB_OVER_CURRENT):
1087 WR_RH_STAT(RH_HS_OCIC);
1088 OK(0);
1089 }
1090 break;
1091
1092 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1093 switch (wValue) {
1094 case (RH_PORT_ENABLE):
1095 WR_RH_PORTSTAT(RH_PS_CCS);
1096 OK(0);
1097 case (RH_PORT_SUSPEND):
1098 WR_RH_PORTSTAT(RH_PS_POCI);
1099 OK(0);
1100 case (RH_PORT_POWER):
1101 WR_RH_PORTSTAT(RH_PS_LSDA);
1102 OK(0);
1103 case (RH_C_PORT_CONNECTION):
1104 WR_RH_PORTSTAT(RH_PS_CSC);
1105 OK(0);
1106 case (RH_C_PORT_ENABLE):
1107 WR_RH_PORTSTAT(RH_PS_PESC);
1108 OK(0);
1109 case (RH_C_PORT_SUSPEND):
1110 WR_RH_PORTSTAT(RH_PS_PSSC);
1111 OK(0);
1112 case (RH_C_PORT_OVER_CURRENT):
1113 WR_RH_PORTSTAT(RH_PS_OCIC);
1114 OK(0);
1115 case (RH_C_PORT_RESET):
1116 WR_RH_PORTSTAT(RH_PS_PRSC);
1117 OK(0);
1118 }
1119 break;
1120
1121 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1122 switch (wValue) {
1123 case (RH_PORT_SUSPEND):
1124 WR_RH_PORTSTAT(RH_PS_PSS);
1125 OK(0);
1126 case (RH_PORT_RESET): /* BUG IN HUP CODE ******** */
1127 if (RD_RH_PORTSTAT & RH_PS_CCS)
1128 WR_RH_PORTSTAT(RH_PS_PRS);
1129 OK(0);
1130 case (RH_PORT_POWER):
1131 WR_RH_PORTSTAT(RH_PS_PPS);
1132 OK(0);
1133 case (RH_PORT_ENABLE): /* BUG IN HUP CODE ******** */
1134 if (RD_RH_PORTSTAT & RH_PS_CCS)
1135 WR_RH_PORTSTAT(RH_PS_PES);
1136 OK(0);
1137 }
1138 break;
1139
1140 case RH_SET_ADDRESS:
1141 gohci.rh.devnum = wValue;
1142 OK(0);
1143
1144 case RH_GET_DESCRIPTOR:
1145 switch ((wValue & 0xff00) >> 8) {
1146 case (0x01): /* device descriptor */
1147 len = min_t(unsigned int,
1148 leni,
1149 min_t(unsigned int,
1150 sizeof(root_hub_dev_des), wLength));
1151 data_buf = root_hub_dev_des;
1152 OK(len);
1153 case (0x02): /* configuration descriptor */
1154 len = min_t(unsigned int,
1155 leni,
1156 min_t(unsigned int,
1157 sizeof(root_hub_config_des),
1158 wLength));
1159 data_buf = root_hub_config_des;
1160 OK(len);
1161 case (0x03): /* string descriptors */
1162 if (wValue == 0x0300) {
1163 len = min_t(unsigned int,
1164 leni,
1165 min_t(unsigned int,
1166 sizeof(root_hub_str_index0),
1167 wLength));
1168 data_buf = root_hub_str_index0;
1169 OK(len);
1170 }
1171 if (wValue == 0x0301) {
1172 len = min_t(unsigned int,
1173 leni,
1174 min_t(unsigned int,
1175 sizeof(root_hub_str_index1),
1176 wLength));
1177 data_buf = root_hub_str_index1;
1178 OK(len);
1179 }
1180 default:
1181 stat = USB_ST_STALLED;
1182 }
1183 break;
1184
1185 case RH_GET_DESCRIPTOR | RH_CLASS:
1186 {
1187 __u32 temp = roothub_a(&gohci);
1188
1189 data_buf[0] = 9; /* min length; */
1190 data_buf[1] = 0x29;
1191 data_buf[2] = temp & RH_A_NDP;
1192 data_buf[3] = 0;
1193 if (temp & RH_A_PSM) /* per-port power switching? */
1194 data_buf[3] |= 0x1;
1195 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1196 data_buf[3] |= 0x10;
1197 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1198 data_buf[3] |= 0x8;
1199
1200 /* corresponds to data_buf[4-7] */
1201 datab[1] = 0;
1202 data_buf[5] = (temp & RH_A_POTPGT) >> 24;
1203 temp = roothub_b(&gohci);
1204 data_buf[7] = temp & RH_B_DR;
1205 if (data_buf[2] < 7) {
1206 data_buf[8] = 0xff;
1207 } else {
1208 data_buf[0] += 2;
1209 data_buf[8] = (temp & RH_B_DR) >> 8;
1210 data_buf[10] = data_buf[9] = 0xff;
1211 }
1212
1213 len = min_t(unsigned int, leni,
1214 min_t(unsigned int, data_buf[0], wLength));
1215 OK(len);
1216 }
1217
1218 case RH_GET_CONFIGURATION:
1219 *(__u8 *) data_buf = 0x01;
1220 OK(1);
1221
1222 case RH_SET_CONFIGURATION:
1223 WR_RH_STAT(0x10000);
1224 OK(0);
1225
1226 default:
1227 dbg("unsupported root hub command");
1228 stat = USB_ST_STALLED;
1229 }
1230
1231#ifdef DEBUG
1232 ohci_dump_roothub(&gohci, 1);
1233#endif
1234
1235 len = min_t(int, len, leni);
1236 if (data != data_buf)
1237 memcpy(data, data_buf, len);
1238 dev->act_len = len;
1239 dev->status = stat;
1240
1241#ifdef DEBUG
1242 if (transfer_len)
1243 urb_priv.actual_length = transfer_len;
1244 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)",
1245 0 /*usb_pipein(pipe) */ );
1246#endif
1247
1248 return stat;
1249}
1250
1251/*-------------------------------------------------------------------------*/
1252
1253/* common code for handling submit messages - used for all but root hub */
1254/* accesses. */
1255int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1256 int transfer_len, struct devrequest *setup, int interval)
1257{
1258 int stat = 0;
1259 int maxsize = usb_maxpacket(dev, pipe);
1260 int timeout;
1261
1262 /* device pulled? Shortcut the action. */
1263 if (devgone == dev) {
1264 dev->status = USB_ST_CRC_ERR;
1265 return 0;
1266 }
1267#ifdef DEBUG
1268 urb_priv.actual_length = 0;
1269 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
1270 usb_pipein(pipe));
1271#endif
1272 if (!maxsize) {
1273 err("submit_common_message: pipesize for pipe %lx is zero",
1274 pipe);
1275 return -1;
1276 }
1277
1278 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) <
1279 0) {
1280 err("sohci_submit_job failed");
1281 return -1;
1282 }
1283
1284 /* allow more time for a BULK device to react - some are slow */
1285#define BULK_TO 5000 /* timeout in milliseconds */
1286 if (usb_pipetype(pipe) == PIPE_BULK)
1287 timeout = BULK_TO;
1288 else
1289 timeout = 100;
1290
1291 /* wait for it to complete */
1292 for (;;) {
1293 /* check whether the controller is done */
1294 stat = hc_interrupt();
1295 if (stat < 0) {
1296 stat = USB_ST_CRC_ERR;
1297 break;
1298 }
1299 if (stat >= 0 && stat < 0xff) {
1300 /* 0xff is returned for an SF-interrupt */
1301 break;
1302 }
1303 if (--timeout) {
1304 wait_ms(1);
1305 } else {
1306 err("CTL:TIMEOUT ");
1307 stat = USB_ST_CRC_ERR;
1308 break;
1309 }
1310 }
1311 /* we got an Root Hub Status Change interrupt */
1312 if (got_rhsc) {
1313#ifdef DEBUG
1314 ohci_dump_roothub(&gohci, 1);
1315#endif
1316 got_rhsc = 0;
1317 /* abuse timeout */
1318 timeout = rh_check_port_status(&gohci);
1319 if (timeout >= 0) {
1320#if 0 /* this does nothing useful, but leave it here in case that changes */
1321 /* the called routine adds 1 to the passed value */
1322 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1323#endif
1324 /*
1325 * XXX
1326 * This is potentially dangerous because it assumes
1327 * that only one device is ever plugged in!
1328 */
1329 devgone = dev;
1330 }
1331 }
1332
1333 dev->status = stat;
1334 dev->act_len = transfer_len;
1335
1336#ifdef DEBUG
1337 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)",
1338 usb_pipein(pipe));
1339#endif
1340
1341 /* free TDs in urb_priv */
1342 urb_free_priv(&urb_priv);
1343 return 0;
1344}
1345
1346/* submit routines called from usb.c */
1347int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1348 int transfer_len)
1349{
1350 info("submit_bulk_msg");
1351 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1352}
1353
1354int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1355 int transfer_len, struct devrequest *setup)
1356{
1357 int maxsize = usb_maxpacket(dev, pipe);
1358
1359 info("submit_control_msg");
1360#ifdef DEBUG
1361 urb_priv.actual_length = 0;
1362 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
1363 usb_pipein(pipe));
1364#endif
1365 if (!maxsize) {
1366 err("submit_control_message: pipesize for pipe %lx is zero",
1367 pipe);
1368 return -1;
1369 }
1370 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1371 gohci.rh.dev = dev;
1372 /* root hub - redirect */
1373 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1374 setup);
1375 }
1376
1377 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1378}
1379
1380int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1381 int transfer_len, int interval)
1382{
1383 info("submit_int_msg");
1384 return -1;
1385}
1386
1387/*-------------------------------------------------------------------------*
1388 * HC functions
1389 *-------------------------------------------------------------------------*/
1390
1391/* reset the HC and BUS */
1392
1393static int hc_reset(ohci_t * ohci)
1394{
1395 int timeout = 30;
1396 int smm_timeout = 50; /* 0,5 sec */
1397
1398 if (readl(&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1399 writel(OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1400 info("USB HC TakeOver from SMM");
1401 while (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1402 wait_ms(10);
1403 if (--smm_timeout == 0) {
1404 err("USB HC TakeOver failed!");
1405 return -1;
1406 }
1407 }
1408 }
1409
1410 /* Disable HC interrupts */
1411 writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1412
1413 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1414 ohci->slot_name, readl(&ohci->regs->control));
1415
1416 /* Reset USB (needed by some controllers) */
1417 ohci->hc_control = 0;
1418 writel(ohci->hc_control, &ohci->regs->control);
1419
1420 /* HC Reset requires max 10 us delay */
1421 writel(OHCI_HCR, &ohci->regs->cmdstatus);
1422 while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1423 if (--timeout == 0) {
1424 err("USB HC reset timed out!");
1425 return -1;
1426 }
1427 udelay(1);
1428 }
1429 return 0;
1430}
1431
1432/*-------------------------------------------------------------------------*/
1433
1434/* Start an OHCI controller, set the BUS operational
1435 * enable interrupts
1436 * connect the virtual root hub */
1437
1438static int hc_start(ohci_t * ohci)
1439{
1440 __u32 mask;
1441 unsigned int fminterval;
1442
1443 ohci->disabled = 1;
1444
1445 /* Tell the controller where the control and bulk lists are
1446 * The lists are empty now. */
1447
1448 writel(0, &ohci->regs->ed_controlhead);
1449 writel(0, &ohci->regs->ed_bulkhead);
1450
1451 writel((__u32) ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1452
1453 fminterval = 0x2edf;
1454 writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1455 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1456 writel(fminterval, &ohci->regs->fminterval);
1457 writel(0x628, &ohci->regs->lsthresh);
1458
1459 /* start controller operations */
1460 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1461 ohci->disabled = 0;
1462 writel(ohci->hc_control, &ohci->regs->control);
1463
1464 /* disable all interrupts */
1465 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1466 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1467 OHCI_INTR_OC | OHCI_INTR_MIE);
1468 writel(mask, &ohci->regs->intrdisable);
1469 /* clear all interrupts */
1470 mask &= ~OHCI_INTR_MIE;
1471 writel(mask, &ohci->regs->intrstatus);
1472 /* Choose the interrupts we care about now - but w/o MIE */
1473 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1474 writel(mask, &ohci->regs->intrenable);
1475
1476#ifdef OHCI_USE_NPS
1477 /* required for AMD-756 and some Mac platforms */
1478 writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1479 &ohci->regs->roothub.a);
1480 writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1481#endif /* OHCI_USE_NPS */
1482
1483#define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1484 /* POTPGT delay is bits 24-31, in 2 ms units. */
1485 mdelay((roothub_a(ohci) >> 23) & 0x1fe);
1486
1487 /* connect the virtual root hub */
1488 ohci->rh.devnum = 0;
1489
1490 return 0;
1491}
1492
1493/*-------------------------------------------------------------------------*/
1494
1495/* an interrupt happens */
1496
1497static int hc_interrupt(void)
1498{
1499 ohci_t *ohci = &gohci;
1500 struct ohci_regs *regs = ohci->regs;
1501 int ints;
1502 int stat = -1;
1503
1504 if ((ohci->hcca->done_head != 0)
1505 && !(ohci_cpu_to_le32(ohci->hcca->done_head) & 0x01)) {
1506 ints = OHCI_INTR_WDH;
1507 } else {
1508 ints = readl(&regs->intrstatus);
1509 }
1510
1511 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1512
1513 if (ints & OHCI_INTR_RHSC) {
1514 got_rhsc = 1;
1515 }
1516
1517 if (ints & OHCI_INTR_UE) {
1518 ohci->disabled++;
1519 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1520 ohci->slot_name);
1521 /* e.g. due to PCI Master/Target Abort */
1522
1523#ifdef DEBUG
1524 ohci_dump(ohci, 1);
1525#endif
1526 /* FIXME: be optimistic, hope that bug won't repeat often. */
1527 /* Make some non-interrupt context restart the controller. */
1528 /* Count and limit the retries though; either hardware or */
1529 /* software errors can go forever... */
1530 hc_reset(ohci);
1531 return -1;
1532 }
1533
1534 if (ints & OHCI_INTR_WDH) {
1535 writel(OHCI_INTR_WDH, &regs->intrdisable);
1536 stat = dl_done_list(&gohci, dl_reverse_done_list(&gohci));
1537 writel(OHCI_INTR_WDH, &regs->intrenable);
1538 }
1539
1540 if (ints & OHCI_INTR_SO) {
1541 dbg("USB Schedule overrun\n");
1542 writel(OHCI_INTR_SO, &regs->intrenable);
1543 stat = -1;
1544 }
1545
1546 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1547 if (ints & OHCI_INTR_SF) {
1548 unsigned int frame = ohci_cpu_to_le16(ohci->hcca->frame_no) & 1;
1549 writel(OHCI_INTR_SF, &regs->intrdisable);
1550 if (ohci->ed_rm_list[frame] != NULL)
1551 writel(OHCI_INTR_SF, &regs->intrenable);
1552 stat = 0xff;
1553 }
1554
1555 writel(ints, &regs->intrstatus);
1556 return stat;
1557}
1558
1559/*-------------------------------------------------------------------------*/
1560
1561/*-------------------------------------------------------------------------*/
1562
1563/* De-allocate all resources.. */
1564
1565static void hc_release_ohci(ohci_t * ohci)
1566{
1567 dbg("USB HC release ohci usb-%s", ohci->slot_name);
1568
1569 if (!ohci->disabled)
1570 hc_reset(ohci);
1571}
1572
1573/*-------------------------------------------------------------------------*/
1574
1575/*
1576 * low level initalisation routine, called from usb.c
1577 */
1578static char ohci_inited = 0;
1579
1580int usb_lowlevel_init(void)
1581{
1582
1583 memset(&gohci, 0, sizeof(ohci_t));
1584 memset(&urb_priv, 0, sizeof(urb_priv_t));
1585
1586 /* align the storage */
1587 if ((__u32) & ghcca[0] & 0xff) {
1588 err("HCCA not aligned!!");
1589 return -1;
1590 }
1591 phcca = &ghcca[0];
1592 info("aligned ghcca %p", phcca);
1593 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1594 if ((__u32) & ohci_dev.ed[0] & 0x7) {
1595 err("EDs not aligned!!");
1596 return -1;
1597 }
1598 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1599 if ((__u32) gtd & 0x7) {
1600 err("TDs not aligned!!");
1601 return -1;
1602 }
1603 ptd = gtd;
1604 gohci.hcca = phcca;
1605 memset(phcca, 0, sizeof(struct ohci_hcca));
1606
1607 gohci.disabled = 1;
1608 gohci.sleeping = 0;
1609 gohci.irq = -1;
1610 gohci.regs = (struct ohci_regs *)(CFG_PERIPHERAL_BASE | 0x1000);
1611
1612 gohci.flags = 0;
1613 gohci.slot_name = "ppc440";
1614
1615 if (hc_reset(&gohci) < 0) {
1616 hc_release_ohci(&gohci);
1617 return -1;
1618 }
1619
1620 if (hc_start(&gohci) < 0) {
1621 err("can't start usb-%s", gohci.slot_name);
1622 hc_release_ohci(&gohci);
1623 return -1;
1624 }
1625#ifdef DEBUG
1626 ohci_dump(&gohci, 1);
1627#endif
1628 ohci_inited = 1;
1629
1630 /* init the device driver */
1631 usb_dev_init();
1632
1633 return 0;
1634}
1635
1636int usb_lowlevel_stop(void)
1637{
1638 /* this gets called really early - before the controller has */
1639 /* even been initialized! */
1640 if (!ohci_inited)
1641 return 0;
1642 /* TODO release any interrupts, etc. */
1643 /* call hc_release_ohci() here ? */
1644 hc_reset(&gohci);
1645 return 0;
1646}
1647
1648#endif /* CONFIG_USB_OHCI */
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