[people/ms/u-boot.git] / cpu / ppc4xx / vecnum.h

/*
*  Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/

/*
 * Interrupt vector number definitions to ease the
 * 405 -- 440 porting pain ;-)
 *
 * NOTE: They're not all here yet ... update as needed.
 *
 */

#ifndef _VECNUMS_H_
#define _VECNUMS_H_

#if defined(CONFIG_440SP)

/* UIC 0 */
#define VECNUM_U0           0           /* UART0                        */
#define VECNUM_U1           1           /* UART1                        */
#define VECNUM_IIC0         2           /* IIC0                         */
#define VECNUM_IIC1         3           /* IIC1                         */
#define VECNUM_PIM          4           /* PCI inbound message          */
#define VECNUM_PCRW         5           /* PCI command reg write        */
#define VECNUM_PPM          6           /* PCI power management         */
#define VECNUM_UIC1NC       30          /* UIC1 non-critical interrupt  */
#define VECNUM_UIC1C        31          /* UIC1 critical interrupt      */

/* UIC 1 */
#define VECNUM_EIR0         (32 + 0)	/* External interrupt 0         */
#define VECNUM_MS           (32 + 1)	/* MAL SERR                     */
#define VECNUM_TXDE         (32 + 2)	/* MAL TXDE                     */
#define VECNUM_RXDE         (32 + 3)	/* MAL RXDE                     */
#define VECNUM_MTE          (32 + 6)	/* MAL Tx EOB                   */
#define VECNUM_MRE          (32 + 7)	/* MAL Rx EOB                   */
#define VECNUM_CT0          (32 + 12)	/* GPT compare timer 0          */
#define VECNUM_CT1          (32 + 13)	/* GPT compare timer 1          */
#define VECNUM_CT2          (32 + 14)	/* GPT compare timer 2          */
#define VECNUM_CT3          (32 + 15)	/* GPT compare timer 3          */
#define VECNUM_CT4          (32 + 16)	/* GPT compare timer 4          */
#define VECNUM_ETH0         (32 + 28)	/* Ethernet interrupt status    */
#define VECNUM_EWU0         (32 + 29)	/* Emac  wakeup                 */

#elif defined(CONFIG_440)

/* UIC 0 */
#define VECNUM_U0           0           /* UART0                        */
#define VECNUM_U1           1           /* UART1                        */
#define VECNUM_IIC0         2           /* IIC0                         */
#define VECNUM_IIC1         3           /* IIC1                         */
#define VECNUM_PIM          4           /* PCI inbound message          */
#define VECNUM_PCRW         5           /* PCI command reg write        */
#define VECNUM_PPM          6           /* PCI power management         */
#define VECNUM_MSI0         7           /* PCI MSI level 0              */
#define VECNUM_MSI1         8           /* PCI MSI level 0              */
#define VECNUM_MSI2         9           /* PCI MSI level 0              */
#define VECNUM_MTE          10          /* MAL TXEOB                    */
#define VECNUM_MRE          11          /* MAL RXEOB                    */
#define VECNUM_D0           12          /* DMA channel 0                */
#define VECNUM_D1           13          /* DMA channel 1                */
#define VECNUM_D2           14          /* DMA channel 2                */
#define VECNUM_D3           15          /* DMA channel 3                */
#define VECNUM_CT0          18          /* GPT compare timer 0          */
#define VECNUM_CT1          19          /* GPT compare timer 1          */
#define VECNUM_CT2          20          /* GPT compare timer 2          */
#define VECNUM_CT3          21          /* GPT compare timer 3          */
#define VECNUM_CT4          22          /* GPT compare timer 4          */
#define VECNUM_EIR0         23          /* External interrupt 0         */
#define VECNUM_EIR1         24          /* External interrupt 1         */
#define VECNUM_EIR2         25          /* External interrupt 2         */
#define VECNUM_EIR3         26          /* External interrupt 3         */
#define VECNUM_EIR4         27          /* External interrupt 4         */
#define VECNUM_EIR5         28          /* External interrupt 5         */
#define VECNUM_EIR6         29          /* External interrupt 6         */
#define VECNUM_UIC1NC       30          /* UIC1 non-critical interrupt  */
#define VECNUM_UIC1C        31          /* UIC1 critical interrupt      */

/* UIC 1 */
#define VECNUM_MS           (32 + 0 )   /* MAL SERR                     */
#define VECNUM_TXDE         (32 + 1 )   /* MAL TXDE                     */
#define VECNUM_RXDE         (32 + 2 )   /* MAL RXDE                     */
#define VECNUM_USBDEV	    (32 + 23)   /* USB 1.1/USB 2.0 Device       */
#define VECNUM_ETH0         (32 + 28)   /* Ethernet 0 interrupt status  */
#define VECNUM_EWU0         (32 + 29)   /* Ethernet 0 wakeup            */

#else /* !defined(CONFIG_440) */

#define VECNUM_U0           0           /* UART0                        */
#define VECNUM_U1           1           /* UART1                        */
#define VECNUM_D0           5           /* DMA channel 0                */
#define VECNUM_D1           6           /* DMA channel 1                */
#define VECNUM_D2           7           /* DMA channel 2                */
#define VECNUM_D3           8           /* DMA channel 3                */
#define VECNUM_EWU0         9           /* Ethernet wakeup              */
#define VECNUM_MS           10          /* MAL SERR                     */
#define VECNUM_MTE          11          /* MAL TXEOB                    */
#define VECNUM_MRE          12          /* MAL RXEOB                    */
#define VECNUM_TXDE         13          /* MAL TXDE                     */
#define VECNUM_RXDE         14          /* MAL RXDE                     */
#define VECNUM_ETH0         15          /* Ethernet interrupt status    */
#define VECNUM_EIR0         25          /* External interrupt 0         */
#define VECNUM_EIR1         26          /* External interrupt 1         */
#define VECNUM_EIR2         27          /* External interrupt 2         */
#define VECNUM_EIR3         28          /* External interrupt 3         */
#define VECNUM_EIR4         29          /* External interrupt 4         */
#define VECNUM_EIR5         30          /* External interrupt 5         */
#define VECNUM_EIR6         31          /* External interrupt 6         */

#endif /* defined(CONFIG_440) */

#endif /* _VECNUMS_H_ */
Commit	Line	Data
c609719b WD	1	/*
	2	* Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
	3	*
	4	* See file CREDITS for list of people who contributed to this
	5	* project.
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License as
	9	* published by the Free Software Foundation; either version 2 of
	10	* the License, or (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	20	* MA 02111-1307 USA
	21	*/
	22
	23	/*
	24	* Interrupt vector number definitions to ease the
	25	* 405 -- 440 porting pain ;-)
	26	*
	27	* NOTE: They're not all here yet ... update as needed.
	28	*
	29	*/
	30
	31	#ifndef _VECNUMS_H_
	32	#define _VECNUMS_H_
	33
6e7fb6ea SR	34	#if defined(CONFIG_440SP)
	35
	36	/* UIC 0 */
	37	#define VECNUM_U0 0 /* UART0 */
	38	#define VECNUM_U1 1 /* UART1 */
	39	#define VECNUM_IIC0 2 /* IIC0 */
	40	#define VECNUM_IIC1 3 /* IIC1 */
	41	#define VECNUM_PIM 4 /* PCI inbound message */
	42	#define VECNUM_PCRW 5 /* PCI command reg write */
	43	#define VECNUM_PPM 6 /* PCI power management */
	44	#define VECNUM_UIC1NC 30 /* UIC1 non-critical interrupt */
	45	#define VECNUM_UIC1C 31 /* UIC1 critical interrupt */
	46
	47	/* UIC 1 */
	48	#define VECNUM_EIR0 (32 + 0) /* External interrupt 0 */
	49	#define VECNUM_MS (32 + 1) /* MAL SERR */
	50	#define VECNUM_TXDE (32 + 2) /* MAL TXDE */
	51	#define VECNUM_RXDE (32 + 3) /* MAL RXDE */
	52	#define VECNUM_MTE (32 + 6) /* MAL Tx EOB */
	53	#define VECNUM_MRE (32 + 7) /* MAL Rx EOB */
	54	#define VECNUM_CT0 (32 + 12) /* GPT compare timer 0 */
	55	#define VECNUM_CT1 (32 + 13) /* GPT compare timer 1 */
	56	#define VECNUM_CT2 (32 + 14) /* GPT compare timer 2 */
	57	#define VECNUM_CT3 (32 + 15) /* GPT compare timer 3 */
	58	#define VECNUM_CT4 (32 + 16) /* GPT compare timer 4 */
	59	#define VECNUM_ETH0 (32 + 28) /* Ethernet interrupt status */
	60	#define VECNUM_EWU0 (32 + 29) /* Emac wakeup */
	61
	62	#elif defined(CONFIG_440)
c609719b WD	63
	64	/* UIC 0 */
	65	#define VECNUM_U0 0 /* UART0 */
	66	#define VECNUM_U1 1 /* UART1 */
	67	#define VECNUM_IIC0 2 /* IIC0 */
	68	#define VECNUM_IIC1 3 /* IIC1 */
	69	#define VECNUM_PIM 4 /* PCI inbound message */
	70	#define VECNUM_PCRW 5 /* PCI command reg write */
	71	#define VECNUM_PPM 6 /* PCI power management */
	72	#define VECNUM_MSI0 7 /* PCI MSI level 0 */
	73	#define VECNUM_MSI1 8 /* PCI MSI level 0 */
	74	#define VECNUM_MSI2 9 /* PCI MSI level 0 */
	75	#define VECNUM_MTE 10 /* MAL TXEOB */
	76	#define VECNUM_MRE 11 /* MAL RXEOB */
	77	#define VECNUM_D0 12 /* DMA channel 0 */
	78	#define VECNUM_D1 13 /* DMA channel 1 */
	79	#define VECNUM_D2 14 /* DMA channel 2 */
	80	#define VECNUM_D3 15 /* DMA channel 3 */
	81	#define VECNUM_CT0 18 /* GPT compare timer 0 */
	82	#define VECNUM_CT1 19 /* GPT compare timer 1 */
	83	#define VECNUM_CT2 20 /* GPT compare timer 2 */
	84	#define VECNUM_CT3 21 /* GPT compare timer 3 */
	85	#define VECNUM_CT4 22 /* GPT compare timer 4 */
	86	#define VECNUM_EIR0 23 /* External interrupt 0 */
	87	#define VECNUM_EIR1 24 /* External interrupt 1 */
	88	#define VECNUM_EIR2 25 /* External interrupt 2 */
	89	#define VECNUM_EIR3 26 /* External interrupt 3 */
	90	#define VECNUM_EIR4 27 /* External interrupt 4 */
	91	#define VECNUM_EIR5 28 /* External interrupt 5 */
	92	#define VECNUM_EIR6 29 /* External interrupt 6 */
	93	#define VECNUM_UIC1NC 30 /* UIC1 non-critical interrupt */
	94	#define VECNUM_UIC1C 31 /* UIC1 critical interrupt */
	95
	96	/* UIC 1 */
	97	#define VECNUM_MS (32 + 0 ) /* MAL SERR */
	98	#define VECNUM_TXDE (32 + 1 ) /* MAL TXDE */
	99	#define VECNUM_RXDE (32 + 2 ) /* MAL RXDE */
c157d8e2	100	#define VECNUM_USBDEV (32 + 23) /* USB 1.1/USB 2.0 Device */
c609719b WD	101	#define VECNUM_ETH0 (32 + 28) /* Ethernet 0 interrupt status */
	102	#define VECNUM_EWU0 (32 + 29) /* Ethernet 0 wakeup */
	103
	104	#else /* !defined(CONFIG_440) */
	105
	106	#define VECNUM_U0 0 /* UART0 */
	107	#define VECNUM_U1 1 /* UART1 */
	108	#define VECNUM_D0 5 /* DMA channel 0 */
	109	#define VECNUM_D1 6 /* DMA channel 1 */
	110	#define VECNUM_D2 7 /* DMA channel 2 */
	111	#define VECNUM_D3 8 /* DMA channel 3 */
	112	#define VECNUM_EWU0 9 /* Ethernet wakeup */
	113	#define VECNUM_MS 10 /* MAL SERR */
	114	#define VECNUM_MTE 11 /* MAL TXEOB */
	115	#define VECNUM_MRE 12 /* MAL RXEOB */
	116	#define VECNUM_TXDE 13 /* MAL TXDE */
	117	#define VECNUM_RXDE 14 /* MAL RXDE */
	118	#define VECNUM_ETH0 15 /* Ethernet interrupt status */
	119	#define VECNUM_EIR0 25 /* External interrupt 0 */
	120	#define VECNUM_EIR1 26 /* External interrupt 1 */
	121	#define VECNUM_EIR2 27 /* External interrupt 2 */
	122	#define VECNUM_EIR3 28 /* External interrupt 3 */
	123	#define VECNUM_EIR4 29 /* External interrupt 4 */
	124	#define VECNUM_EIR5 30 /* External interrupt 5 */
	125	#define VECNUM_EIR6 31 /* External interrupt 6 */
	126
	127	#endif /* defined(CONFIG_440) */
	128
	129	#endif /* _VECNUMS_H_ */