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0b135cfc NI |
1 | /* |
2 | * (C) Copyright 2007 | |
3 | * Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <common.h> | |
25 | #include <command.h> | |
b02bad12 | 26 | #include <asm/processor.h> |
e92c9518 | 27 | #include <asm/cache.h> |
0b135cfc NI |
28 | |
29 | int checkcpu(void) | |
30 | { | |
31 | puts("CPU: SH4\n"); | |
32 | return 0; | |
33 | } | |
34 | ||
35 | int cpu_init (void) | |
36 | { | |
37 | return 0; | |
38 | } | |
39 | ||
40 | int cleanup_before_linux (void) | |
41 | { | |
42 | disable_interrupts(); | |
43 | return 0; | |
44 | } | |
45 | ||
46 | int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) | |
47 | { | |
48 | disable_interrupts(); | |
49 | reset_cpu (0); | |
50 | return 0; | |
51 | } | |
52 | ||
b02bad12 NI |
53 | void flush_cache (unsigned long addr, unsigned long size) |
54 | { | |
e92c9518 | 55 | dcache_invalid_range( addr , addr + size ); |
b02bad12 | 56 | } |
0b135cfc NI |
57 | |
58 | void icache_enable (void) | |
59 | { | |
b02bad12 | 60 | cache_control(0); |
0b135cfc NI |
61 | } |
62 | ||
63 | void icache_disable (void) | |
64 | { | |
b02bad12 | 65 | cache_control(1); |
0b135cfc NI |
66 | } |
67 | ||
0b135cfc NI |
68 | int icache_status (void) |
69 | { | |
61fb15c5 | 70 | return 0; |
0b135cfc | 71 | } |
b02bad12 NI |
72 | |
73 | void dcache_enable (void) | |
74 | { | |
75 | } | |
76 | ||
77 | void dcache_disable (void) | |
78 | { | |
79 | } | |
80 | ||
81 | int dcache_status (void) | |
82 | { | |
83 | return 0; | |
84 | } |