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tcg: synchronize cpu->exit_request and cpu->tcg_exit_req accesses
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7d13299d 1/*
e965fc38 2 * emulator main execution loop
5fafdf24 3 *
66321a11 4 * Copyright (c) 2003-2005 Fabrice Bellard
7d13299d 5 *
3ef693a0
FB
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
7d13299d 10 *
3ef693a0
FB
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
7d13299d 15 *
3ef693a0 16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
7d13299d 18 */
e4533c7a 19#include "config.h"
cea5f9a2 20#include "cpu.h"
6db8b538 21#include "trace.h"
76cad711 22#include "disas/disas.h"
7cb69cae 23#include "tcg.h"
1de7afc9 24#include "qemu/atomic.h"
9c17d615 25#include "sysemu/qtest.h"
c2aa5f81 26#include "qemu/timer.h"
9d82b5a7
PB
27#include "exec/address-spaces.h"
28#include "exec/memory-internal.h"
79e2b9ae 29#include "qemu/rcu.h"
e1b89321 30#include "exec/tb-hash.h"
c2aa5f81
ST
31
32/* -icount align implementation. */
33
34typedef struct SyncClocks {
35 int64_t diff_clk;
36 int64_t last_cpu_icount;
7f7bc144 37 int64_t realtime_clock;
c2aa5f81
ST
38} SyncClocks;
39
40#if !defined(CONFIG_USER_ONLY)
41/* Allow the guest to have a max 3ms advance.
42 * The difference between the 2 clocks could therefore
43 * oscillate around 0.
44 */
45#define VM_CLOCK_ADVANCE 3000000
7f7bc144
ST
46#define THRESHOLD_REDUCE 1.5
47#define MAX_DELAY_PRINT_RATE 2000000000LL
48#define MAX_NB_PRINTS 100
c2aa5f81
ST
49
50static void align_clocks(SyncClocks *sc, const CPUState *cpu)
51{
52 int64_t cpu_icount;
53
54 if (!icount_align_option) {
55 return;
56 }
57
58 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
59 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
60 sc->last_cpu_icount = cpu_icount;
61
62 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
63#ifndef _WIN32
64 struct timespec sleep_delay, rem_delay;
65 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
66 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
67 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
a498d0ef 68 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
c2aa5f81
ST
69 } else {
70 sc->diff_clk = 0;
71 }
72#else
73 Sleep(sc->diff_clk / SCALE_MS);
74 sc->diff_clk = 0;
75#endif
76 }
77}
78
7f7bc144
ST
79static void print_delay(const SyncClocks *sc)
80{
81 static float threshold_delay;
82 static int64_t last_realtime_clock;
83 static int nb_prints;
84
85 if (icount_align_option &&
86 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
87 nb_prints < MAX_NB_PRINTS) {
88 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
89 (-sc->diff_clk / (float)1000000000LL <
90 (threshold_delay - THRESHOLD_REDUCE))) {
91 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
92 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
93 threshold_delay - 1,
94 threshold_delay);
95 nb_prints++;
96 last_realtime_clock = sc->realtime_clock;
97 }
98 }
99}
100
c2aa5f81
ST
101static void init_delay_params(SyncClocks *sc,
102 const CPUState *cpu)
103{
104 if (!icount_align_option) {
105 return;
106 }
2e91cc62
PB
107 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
108 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
c2aa5f81 109 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
27498bef
ST
110 if (sc->diff_clk < max_delay) {
111 max_delay = sc->diff_clk;
112 }
113 if (sc->diff_clk > max_advance) {
114 max_advance = sc->diff_clk;
115 }
7f7bc144
ST
116
117 /* Print every 2s max if the guest is late. We limit the number
118 of printed messages to NB_PRINT_MAX(currently 100) */
119 print_delay(sc);
c2aa5f81
ST
120}
121#else
122static void align_clocks(SyncClocks *sc, const CPUState *cpu)
123{
124}
125
126static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
127{
128}
129#endif /* CONFIG USER ONLY */
7d13299d 130
5638d180 131void cpu_loop_exit(CPUState *cpu)
e4533c7a 132{
d77953b9 133 cpu->current_tb = NULL;
6f03bef0 134 siglongjmp(cpu->jmp_env, 1);
e4533c7a 135}
bfed01fc 136
fbf9eeb3
FB
137/* exit the current TB from a signal handler. The host registers are
138 restored in a state compatible with the CPU emulator
139 */
9eff14f3 140#if defined(CONFIG_SOFTMMU)
0ea8cb88 141void cpu_resume_from_signal(CPUState *cpu, void *puc)
9eff14f3 142{
9eff14f3
BS
143 /* XXX: restore cpu registers saved in host registers */
144
27103424 145 cpu->exception_index = -1;
6f03bef0 146 siglongjmp(cpu->jmp_env, 1);
9eff14f3 147}
76e5c76f
PB
148
149void cpu_reload_memory_map(CPUState *cpu)
150{
79e2b9ae
PB
151 AddressSpaceDispatch *d;
152
153 if (qemu_in_vcpu_thread()) {
154 /* Do not let the guest prolong the critical section as much as it
155 * as it desires.
156 *
157 * Currently, this is prevented by the I/O thread's periodinc kicking
158 * of the VCPU thread (iothread_requesting_mutex, qemu_cpu_kick_thread)
159 * but this will go away once TCG's execution moves out of the global
160 * mutex.
161 *
162 * This pair matches cpu_exec's rcu_read_lock()/rcu_read_unlock(), which
163 * only protects cpu->as->dispatch. Since we reload it below, we can
164 * split the critical section.
165 */
166 rcu_read_unlock();
167 rcu_read_lock();
168 }
169
9d82b5a7 170 /* The CPU and TLB are protected by the iothread lock. */
79e2b9ae 171 d = atomic_rcu_read(&cpu->as->dispatch);
9d82b5a7 172 cpu->memory_dispatch = d;
76e5c76f
PB
173 tlb_flush(cpu, 1);
174}
9eff14f3 175#endif
fbf9eeb3 176
77211379
PM
177/* Execute a TB, and fix up the CPU state afterwards if necessary */
178static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
179{
180 CPUArchState *env = cpu->env_ptr;
03afa5f8
RH
181 uintptr_t next_tb;
182
183#if defined(DEBUG_DISAS)
184 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
185#if defined(TARGET_I386)
186 log_cpu_state(cpu, CPU_DUMP_CCOP);
187#elif defined(TARGET_M68K)
188 /* ??? Should not modify env state for dumping. */
189 cpu_m68k_flush_flags(env, env->cc_op);
190 env->cc_op = CC_OP_FLAGS;
191 env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
192 log_cpu_state(cpu, 0);
193#else
194 log_cpu_state(cpu, 0);
195#endif
196 }
197#endif /* DEBUG_DISAS */
198
414b15c9 199 cpu->can_do_io = !use_icount;
03afa5f8 200 next_tb = tcg_qemu_tb_exec(env, tb_ptr);
626cf8f4 201 cpu->can_do_io = 1;
6db8b538
AB
202 trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
203 next_tb & TB_EXIT_MASK);
204
77211379
PM
205 if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
206 /* We didn't start executing this TB (eg because the instruction
207 * counter hit zero); we must restore the guest PC to the address
208 * of the start of the TB.
209 */
bdf7ae5b 210 CPUClass *cc = CPU_GET_CLASS(cpu);
77211379 211 TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
bdf7ae5b
AF
212 if (cc->synchronize_from_tb) {
213 cc->synchronize_from_tb(cpu, tb);
214 } else {
215 assert(cc->set_pc);
216 cc->set_pc(cpu, tb->pc);
217 }
77211379 218 }
378df4b2
PM
219 if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
220 /* We were asked to stop executing TBs (probably a pending
221 * interrupt. We've now stopped, so clear the flag.
222 */
223 cpu->tcg_exit_req = 0;
224 }
77211379
PM
225 return next_tb;
226}
227
2e70f6ef
PB
228/* Execute the code without caching the generated code. An interpreter
229 could be used if available. */
ea3e9847 230static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
cea5f9a2 231 TranslationBlock *orig_tb)
2e70f6ef 232{
2e70f6ef
PB
233 TranslationBlock *tb;
234
235 /* Should never happen.
236 We only end up here when an existing TB is too long. */
237 if (max_cycles > CF_COUNT_MASK)
238 max_cycles = CF_COUNT_MASK;
239
02d57ea1 240 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
d8a499f1 241 max_cycles | CF_NOCACHE);
02d57ea1 242 tb->orig_tb = tcg_ctx.tb_ctx.tb_invalidated_flag ? NULL : orig_tb;
d77953b9 243 cpu->current_tb = tb;
2e70f6ef 244 /* execute the generated code */
6db8b538 245 trace_exec_tb_nocache(tb, tb->pc);
77211379 246 cpu_tb_exec(cpu, tb->tc_ptr);
d77953b9 247 cpu->current_tb = NULL;
2e70f6ef
PB
248 tb_phys_invalidate(tb, -1);
249 tb_free(tb);
250}
251
ea3e9847 252static TranslationBlock *tb_find_slow(CPUState *cpu,
cea5f9a2 253 target_ulong pc,
8a40a180 254 target_ulong cs_base,
c068688b 255 uint64_t flags)
8a40a180 256{
ea3e9847 257 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
8a40a180 258 TranslationBlock *tb, **ptb1;
8a40a180 259 unsigned int h;
337fc758 260 tb_page_addr_t phys_pc, phys_page1;
41c1b1c9 261 target_ulong virt_page2;
3b46e624 262
5e5f07e0 263 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
3b46e624 264
8a40a180 265 /* find translated block using physical mappings */
41c1b1c9 266 phys_pc = get_page_addr_code(env, pc);
8a40a180 267 phys_page1 = phys_pc & TARGET_PAGE_MASK;
8a40a180 268 h = tb_phys_hash_func(phys_pc);
5e5f07e0 269 ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
8a40a180
FB
270 for(;;) {
271 tb = *ptb1;
272 if (!tb)
273 goto not_found;
5fafdf24 274 if (tb->pc == pc &&
8a40a180 275 tb->page_addr[0] == phys_page1 &&
5fafdf24 276 tb->cs_base == cs_base &&
8a40a180
FB
277 tb->flags == flags) {
278 /* check next page if needed */
279 if (tb->page_addr[1] != -1) {
337fc758
BS
280 tb_page_addr_t phys_page2;
281
5fafdf24 282 virt_page2 = (pc & TARGET_PAGE_MASK) +
8a40a180 283 TARGET_PAGE_SIZE;
41c1b1c9 284 phys_page2 = get_page_addr_code(env, virt_page2);
8a40a180
FB
285 if (tb->page_addr[1] == phys_page2)
286 goto found;
287 } else {
288 goto found;
289 }
290 }
291 ptb1 = &tb->phys_hash_next;
292 }
293 not_found:
2e70f6ef 294 /* if no translated code available, then translate it now */
648f034c 295 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
3b46e624 296
8a40a180 297 found:
2c90fe2b
KB
298 /* Move the last found TB to the head of the list */
299 if (likely(*ptb1)) {
300 *ptb1 = tb->phys_hash_next;
5e5f07e0
EV
301 tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
302 tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
2c90fe2b 303 }
8a40a180 304 /* we add the TB in the virtual pc hash table */
8cd70437 305 cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
8a40a180
FB
306 return tb;
307}
308
ea3e9847 309static inline TranslationBlock *tb_find_fast(CPUState *cpu)
8a40a180 310{
ea3e9847 311 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
8a40a180
FB
312 TranslationBlock *tb;
313 target_ulong cs_base, pc;
6b917547 314 int flags;
8a40a180
FB
315
316 /* we record a subset of the CPU state. It will
317 always be the same before a given translated block
318 is executed. */
6b917547 319 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
8cd70437 320 tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
551bd27f
TS
321 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
322 tb->flags != flags)) {
ea3e9847 323 tb = tb_find_slow(cpu, pc, cs_base, flags);
8a40a180
FB
324 }
325 return tb;
326}
327
ea3e9847 328static void cpu_handle_debug_exception(CPUState *cpu)
1009d2ed 329{
86025ee4 330 CPUClass *cc = CPU_GET_CLASS(cpu);
1009d2ed
JK
331 CPUWatchpoint *wp;
332
ff4700b0
AF
333 if (!cpu->watchpoint_hit) {
334 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1009d2ed
JK
335 wp->flags &= ~BP_WATCHPOINT_HIT;
336 }
337 }
86025ee4
PM
338
339 cc->debug_excp_handler(cpu);
1009d2ed
JK
340}
341
7d13299d
FB
342/* main execution loop */
343
1a28cac3 344volatile sig_atomic_t exit_request;
9373e632 345CPUState *tcg_current_cpu;
1a28cac3 346
ea3e9847 347int cpu_exec(CPUState *cpu)
7d13299d 348{
97a8ea5a 349 CPUClass *cc = CPU_GET_CLASS(cpu);
693fa551
AF
350#ifdef TARGET_I386
351 X86CPU *x86_cpu = X86_CPU(cpu);
ea3e9847 352 CPUArchState *env = &x86_cpu->env;
97a8ea5a 353#endif
8a40a180 354 int ret, interrupt_request;
8a40a180 355 TranslationBlock *tb;
c27004ec 356 uint8_t *tc_ptr;
3e9bd63a 357 uintptr_t next_tb;
c2aa5f81
ST
358 SyncClocks sc;
359
bae2c270
PM
360 /* This must be volatile so it is not trashed by longjmp() */
361 volatile bool have_tb_lock = false;
8c6939c0 362
259186a7 363 if (cpu->halted) {
3993c6bd 364 if (!cpu_has_work(cpu)) {
eda48c34
PB
365 return EXCP_HALTED;
366 }
367
259186a7 368 cpu->halted = 0;
eda48c34 369 }
5a1e3cfc 370
4917cf44 371 current_cpu = cpu;
9373e632 372 atomic_mb_set(&tcg_current_cpu, cpu);
79e2b9ae
PB
373 rcu_read_lock();
374
c629a4bc 375 if (unlikely(exit_request)) {
fcd7d003 376 cpu->exit_request = 1;
1a28cac3
MT
377 }
378
cffe7b32 379 cc->cpu_exec_enter(cpu);
9d27abd9 380
c2aa5f81
ST
381 /* Calculate difference between guest clock and host clock.
382 * This delay includes the delay of the last cycle, so
383 * what we have to do is sleep until it is 0. As for the
384 * advance/delay we gain here, we try to fix it next time.
385 */
386 init_delay_params(&sc, cpu);
387
7d13299d 388 /* prepare setjmp context for exception handling */
3fb2ded1 389 for(;;) {
6f03bef0 390 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
3fb2ded1 391 /* if an exception is pending, we execute it here */
27103424
AF
392 if (cpu->exception_index >= 0) {
393 if (cpu->exception_index >= EXCP_INTERRUPT) {
3fb2ded1 394 /* exit request from the cpu execution loop */
27103424 395 ret = cpu->exception_index;
1009d2ed 396 if (ret == EXCP_DEBUG) {
ea3e9847 397 cpu_handle_debug_exception(cpu);
1009d2ed 398 }
e511b4d7 399 cpu->exception_index = -1;
3fb2ded1 400 break;
72d239ed
AJ
401 } else {
402#if defined(CONFIG_USER_ONLY)
3fb2ded1 403 /* if user mode only, we simulate a fake exception
9f083493 404 which will be handled outside the cpu execution
3fb2ded1 405 loop */
83479e77 406#if defined(TARGET_I386)
97a8ea5a 407 cc->do_interrupt(cpu);
83479e77 408#endif
27103424 409 ret = cpu->exception_index;
e511b4d7 410 cpu->exception_index = -1;
3fb2ded1 411 break;
72d239ed 412#else
97a8ea5a 413 cc->do_interrupt(cpu);
27103424 414 cpu->exception_index = -1;
83479e77 415#endif
3fb2ded1 416 }
5fafdf24 417 }
9df217a3 418
b5fc09ae 419 next_tb = 0; /* force lookup of first TB */
3fb2ded1 420 for(;;) {
259186a7 421 interrupt_request = cpu->interrupt_request;
e1638bd8 422 if (unlikely(interrupt_request)) {
ed2803da 423 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
e1638bd8 424 /* Mask out external interrupts for this step. */
3125f763 425 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
e1638bd8 426 }
6658ffb8 427 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
259186a7 428 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
27103424 429 cpu->exception_index = EXCP_DEBUG;
5638d180 430 cpu_loop_exit(cpu);
6658ffb8 431 }
a90b7318 432 if (interrupt_request & CPU_INTERRUPT_HALT) {
259186a7
AF
433 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
434 cpu->halted = 1;
27103424 435 cpu->exception_index = EXCP_HLT;
5638d180 436 cpu_loop_exit(cpu);
a90b7318 437 }
4a92a558
PB
438#if defined(TARGET_I386)
439 if (interrupt_request & CPU_INTERRUPT_INIT) {
440 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
441 do_cpu_init(x86_cpu);
442 cpu->exception_index = EXCP_HALTED;
443 cpu_loop_exit(cpu);
444 }
445#else
446 if (interrupt_request & CPU_INTERRUPT_RESET) {
447 cpu_reset(cpu);
448 }
68a79315 449#endif
9585db68
RH
450 /* The target hook has 3 exit conditions:
451 False when the interrupt isn't processed,
452 True when it is, and we should restart on a new TB,
453 and via longjmp via cpu_loop_exit. */
454 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
455 next_tb = 0;
456 }
457 /* Don't use the cached interrupt_request value,
458 do_interrupt may have updated the EXITTB flag. */
259186a7
AF
459 if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
460 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
bf3e8bf1
FB
461 /* ensure that no TB jump will be modified as
462 the program flow was changed */
b5fc09ae 463 next_tb = 0;
bf3e8bf1 464 }
be214e6c 465 }
fcd7d003
AF
466 if (unlikely(cpu->exit_request)) {
467 cpu->exit_request = 0;
27103424 468 cpu->exception_index = EXCP_INTERRUPT;
5638d180 469 cpu_loop_exit(cpu);
3fb2ded1 470 }
5e5f07e0 471 spin_lock(&tcg_ctx.tb_ctx.tb_lock);
bae2c270 472 have_tb_lock = true;
ea3e9847 473 tb = tb_find_fast(cpu);
d5975363
PB
474 /* Note: we do it here to avoid a gcc bug on Mac OS X when
475 doing it in tb_find_slow */
5e5f07e0 476 if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
d5975363
PB
477 /* as some TB could have been invalidated because
478 of memory exceptions while generating the code, we
479 must recompute the hash index here */
480 next_tb = 0;
5e5f07e0 481 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
d5975363 482 }
c30d1aea
PM
483 if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
484 qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n",
485 tb->tc_ptr, tb->pc, lookup_symbol(tb->pc));
486 }
8a40a180
FB
487 /* see if we can patch the calling TB. When the TB
488 spans two pages, we cannot safely do a direct
489 jump. */
040f2fb2 490 if (next_tb != 0 && tb->page_addr[1] == -1) {
0980011b
PM
491 tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
492 next_tb & TB_EXIT_MASK, tb);
3fb2ded1 493 }
bae2c270 494 have_tb_lock = false;
5e5f07e0 495 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
fcd7d003 496 if (likely(!cpu->exit_request)) {
6db8b538 497 trace_exec_tb(tb, tb->pc);
2e70f6ef 498 tc_ptr = tb->tc_ptr;
e965fc38 499 /* execute the generated code */
b0a46fa7 500 cpu->current_tb = tb;
77211379 501 next_tb = cpu_tb_exec(cpu, tc_ptr);
b0a46fa7 502 cpu->current_tb = NULL;
378df4b2
PM
503 switch (next_tb & TB_EXIT_MASK) {
504 case TB_EXIT_REQUESTED:
505 /* Something asked us to stop executing
506 * chained TBs; just continue round the main
507 * loop. Whatever requested the exit will also
508 * have set something else (eg exit_request or
509 * interrupt_request) which we will handle
ab096a75
PB
510 * next time around the loop. But we need to
511 * ensure the tcg_exit_req read in generated code
512 * comes before the next read of cpu->exit_request
513 * or cpu->interrupt_request.
378df4b2 514 */
ab096a75 515 smp_rmb();
378df4b2
PM
516 next_tb = 0;
517 break;
518 case TB_EXIT_ICOUNT_EXPIRED:
519 {
bf20dc07 520 /* Instruction counter expired. */
52851b7e 521 int insns_left = cpu->icount_decr.u32;
efee7340 522 if (cpu->icount_extra && insns_left >= 0) {
2e70f6ef 523 /* Refill decrementer and continue execution. */
efee7340 524 cpu->icount_extra += insns_left;
52851b7e 525 insns_left = MIN(0xffff, cpu->icount_extra);
efee7340 526 cpu->icount_extra -= insns_left;
28ecfd7a 527 cpu->icount_decr.u16.low = insns_left;
2e70f6ef
PB
528 } else {
529 if (insns_left > 0) {
530 /* Execute remaining instructions. */
52851b7e 531 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
ea3e9847 532 cpu_exec_nocache(cpu, insns_left, tb);
c2aa5f81 533 align_clocks(&sc, cpu);
2e70f6ef 534 }
27103424 535 cpu->exception_index = EXCP_INTERRUPT;
2e70f6ef 536 next_tb = 0;
5638d180 537 cpu_loop_exit(cpu);
2e70f6ef 538 }
378df4b2
PM
539 break;
540 }
541 default:
542 break;
2e70f6ef
PB
543 }
544 }
c2aa5f81
ST
545 /* Try to align the host and virtual clocks
546 if the guest is in advance */
547 align_clocks(&sc, cpu);
4cbf74b6
FB
548 /* reset soft MMU for next block (it can currently
549 only be set by a memory fault) */
50a518e3 550 } /* for(;;) */
0d101938
JK
551 } else {
552 /* Reload env after longjmp - the compiler may have smashed all
553 * local variables as longjmp is marked 'noreturn'. */
4917cf44 554 cpu = current_cpu;
6c78f29a 555 cc = CPU_GET_CLASS(cpu);
626cf8f4 556 cpu->can_do_io = 1;
693fa551
AF
557#ifdef TARGET_I386
558 x86_cpu = X86_CPU(cpu);
ea3e9847 559 env = &x86_cpu->env;
6c78f29a 560#endif
bae2c270
PM
561 if (have_tb_lock) {
562 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
563 have_tb_lock = false;
564 }
7d13299d 565 }
3fb2ded1
FB
566 } /* for(;;) */
567
cffe7b32 568 cc->cpu_exec_exit(cpu);
79e2b9ae 569 rcu_read_unlock();
1057eaa7 570
4917cf44
AF
571 /* fail safe : never use current_cpu outside cpu_exec() */
572 current_cpu = NULL;
9373e632
PB
573
574 /* Does not need atomic_mb_set because a spurious wakeup is okay. */
575 atomic_set(&tcg_current_cpu, NULL);
7d13299d
FB
576 return ret;
577}