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b4b48a10 AP |
1 | #include <stdio.h> |
2 | #include <stdlib.h> | |
3 | #include <string.h> | |
4 | #include <setjmp.h> | |
5 | #include <signal.h> | |
fd054957 | 6 | #include <unistd.h> |
d5630dd6 | 7 | #if defined(__linux) || defined(_AIX) |
0f113f3e | 8 | # include <sys/utsname.h> |
78c3e205 | 9 | #endif |
2688d999 AP |
10 | #if defined(_AIX53) /* defined even on post-5.3 */ |
11 | # include <sys/systemcfg.h> | |
12 | # if !defined(__power_set) | |
13 | # define __power_set(a) (_system_configuration.implementation & (a)) | |
14 | # endif | |
15 | #endif | |
11252459 | 16 | #include <openssl/crypto.h> |
b4b48a10 AP |
17 | #include <openssl/bn.h> |
18 | ||
0e716d92 | 19 | #include "ppc_arch.h" |
b4b48a10 | 20 | |
07f3e4f3 | 21 | unsigned int OPENSSL_ppccap_P = 0; |
b4b48a10 AP |
22 | |
23 | static sigset_t all_masked; | |
24 | ||
d741cf22 | 25 | #ifdef OPENSSL_BN_ASM_MONT |
0f113f3e MC |
26 | int bn_mul_mont(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp, |
27 | const BN_ULONG *np, const BN_ULONG *n0, int num) | |
28 | { | |
29 | int bn_mul_mont_fpu64(BN_ULONG *rp, const BN_ULONG *ap, | |
30 | const BN_ULONG *bp, const BN_ULONG *np, | |
31 | const BN_ULONG *n0, int num); | |
32 | int bn_mul_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp, | |
33 | const BN_ULONG *np, const BN_ULONG *n0, int num); | |
34 | ||
35 | if (sizeof(size_t) == 4) { | |
36 | # if 1 || (defined(__APPLE__) && defined(__MACH__)) | |
37 | if (num >= 8 && (num & 3) == 0 && (OPENSSL_ppccap_P & PPC_FPU64)) | |
38 | return bn_mul_mont_fpu64(rp, ap, bp, np, n0, num); | |
39 | # else | |
40 | /* | |
41 | * boundary of 32 was experimentally determined on Linux 2.6.22, | |
42 | * might have to be adjusted on AIX... | |
43 | */ | |
44 | if (num >= 32 && (num & 3) == 0 && (OPENSSL_ppccap_P & PPC_FPU64)) { | |
45 | sigset_t oset; | |
46 | int ret; | |
47 | ||
48 | sigprocmask(SIG_SETMASK, &all_masked, &oset); | |
49 | ret = bn_mul_mont_fpu64(rp, ap, bp, np, n0, num); | |
50 | sigprocmask(SIG_SETMASK, &oset, NULL); | |
51 | ||
52 | return ret; | |
53 | } | |
54 | # endif | |
55 | } else if ((OPENSSL_ppccap_P & PPC_FPU64)) | |
56 | /* | |
57 | * this is a "must" on POWER6, but run-time detection is not | |
58 | * implemented yet... | |
59 | */ | |
60 | return bn_mul_mont_fpu64(rp, ap, bp, np, n0, num); | |
61 | ||
62 | return bn_mul_mont_int(rp, ap, bp, np, n0, num); | |
63 | } | |
d741cf22 | 64 | #endif |
b4b48a10 | 65 | |
0f113f3e MC |
66 | void sha256_block_p8(void *ctx, const void *inp, size_t len); |
67 | void sha256_block_ppc(void *ctx, const void *inp, size_t len); | |
68 | void sha256_block_data_order(void *ctx, const void *inp, size_t len) | |
69 | { | |
70 | OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha256_block_p8(ctx, inp, len) : | |
71 | sha256_block_ppc(ctx, inp, len); | |
72 | } | |
73 | ||
74 | void sha512_block_p8(void *ctx, const void *inp, size_t len); | |
75 | void sha512_block_ppc(void *ctx, const void *inp, size_t len); | |
76 | void sha512_block_data_order(void *ctx, const void *inp, size_t len) | |
77 | { | |
78 | OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha512_block_p8(ctx, inp, len) : | |
79 | sha512_block_ppc(ctx, inp, len); | |
80 | } | |
cd1922cd | 81 | |
b3214008 AP |
82 | void ChaCha20_ctr32_int(unsigned char *out, const unsigned char *inp, |
83 | size_t len, const unsigned int key[8], | |
84 | const unsigned int counter[4]); | |
85 | void ChaCha20_ctr32_vmx(unsigned char *out, const unsigned char *inp, | |
86 | size_t len, const unsigned int key[8], | |
87 | const unsigned int counter[4]); | |
88 | void ChaCha20_ctr32(unsigned char *out, const unsigned char *inp, | |
89 | size_t len, const unsigned int key[8], | |
90 | const unsigned int counter[4]) | |
91 | { | |
92 | OPENSSL_ppccap_P & PPC_ALTIVEC | |
93 | ? ChaCha20_ctr32_vmx(out, inp, len, key, counter) | |
94 | : ChaCha20_ctr32_int(out, inp, len, key, counter); | |
95 | } | |
96 | ||
97 | void poly1305_init_int(void *ctx, const unsigned char key[16]); | |
98 | void poly1305_blocks(void *ctx, const unsigned char *inp, size_t len, | |
99 | unsigned int padbit); | |
100 | void poly1305_emit(void *ctx, unsigned char mac[16], | |
101 | const unsigned int nonce[4]); | |
102 | void poly1305_init_fpu(void *ctx, const unsigned char key[16]); | |
103 | void poly1305_blocks_fpu(void *ctx, const unsigned char *inp, size_t len, | |
104 | unsigned int padbit); | |
105 | void poly1305_emit_fpu(void *ctx, unsigned char mac[16], | |
106 | const unsigned int nonce[4]); | |
107 | int poly1305_init(void *ctx, const unsigned char key[16], void *func[2]) | |
108 | { | |
109 | if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P & PPC_FPU)) { | |
110 | poly1305_init_fpu(ctx,key); | |
111 | func[0] = poly1305_blocks_fpu; | |
112 | func[1] = poly1305_emit_fpu; | |
113 | } else { | |
114 | poly1305_init_int(ctx,key); | |
115 | func[0] = poly1305_blocks; | |
116 | func[1] = poly1305_emit; | |
117 | } | |
118 | return 1; | |
119 | } | |
120 | ||
b4b48a10 | 121 | static sigjmp_buf ill_jmp; |
0f113f3e MC |
122 | static void ill_handler(int sig) |
123 | { | |
124 | siglongjmp(ill_jmp, sig); | |
125 | } | |
b4b48a10 | 126 | |
2688d999 | 127 | void OPENSSL_fpu_probe(void); |
70b76d39 | 128 | void OPENSSL_ppc64_probe(void); |
fd054957 | 129 | void OPENSSL_altivec_probe(void); |
de51e830 | 130 | void OPENSSL_crypto207_probe(void); |
70b76d39 | 131 | |
2688d999 AP |
132 | /* |
133 | * Use a weak reference to getauxval() so we can use it if it is available | |
134 | * but don't break the build if it is not. Note that this is *link-time* | |
135 | * feature detection, not *run-time*. In other words if we link with | |
136 | * symbol present, it's expected to be present even at run-time. | |
137 | */ | |
138 | #if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__) | |
139 | extern unsigned long getauxval(unsigned long type) __attribute__ ((weak)); | |
140 | #else | |
141 | static unsigned long (*getauxval) (unsigned long) = NULL; | |
142 | #endif | |
143 | ||
144 | /* I wish <sys/auxv.h> was universally available */ | |
145 | #define HWCAP 16 /* AT_HWCAP */ | |
146 | #define HWCAP_PPC64 (1U << 30) | |
147 | #define HWCAP_ALTIVEC (1U << 28) | |
148 | #define HWCAP_FPU (1U << 27) | |
149 | #define HWCAP_POWER6_EXT (1U << 9) | |
150 | #define HWCAP_VSX (1U << 7) | |
151 | ||
152 | #define HWCAP2 26 /* AT_HWCAP2 */ | |
153 | #define HWCAP_VEC_CRYPTO (1U << 25) | |
e0e53282 | 154 | #define HWCAP_ARCH_3_00 (1U << 23) |
2688d999 AP |
155 | |
156 | # if defined(__GNUC__) && __GNUC__>=2 | |
157 | __attribute__ ((constructor)) | |
158 | # endif | |
b4b48a10 | 159 | void OPENSSL_cpuid_setup(void) |
0f113f3e MC |
160 | { |
161 | char *e; | |
162 | struct sigaction ill_oact, ill_act; | |
163 | sigset_t oset; | |
164 | static int trigger = 0; | |
165 | ||
166 | if (trigger) | |
167 | return; | |
168 | trigger = 1; | |
169 | ||
0f113f3e MC |
170 | if ((e = getenv("OPENSSL_ppccap"))) { |
171 | OPENSSL_ppccap_P = strtoul(e, NULL, 0); | |
172 | return; | |
173 | } | |
b4b48a10 | 174 | |
0f113f3e | 175 | OPENSSL_ppccap_P = 0; |
6415dd7b | 176 | |
fd054957 | 177 | #if defined(_AIX) |
2688d999 AP |
178 | OPENSSL_ppccap_P |= PPC_FPU; |
179 | ||
0f113f3e MC |
180 | if (sizeof(size_t) == 4) { |
181 | struct utsname uts; | |
fd054957 | 182 | # if defined(_SC_AIX_KERNEL_BITMODE) |
0f113f3e MC |
183 | if (sysconf(_SC_AIX_KERNEL_BITMODE) != 64) |
184 | return; | |
fd054957 | 185 | # endif |
0f113f3e MC |
186 | if (uname(&uts) != 0 || atoi(uts.version) < 6) |
187 | return; | |
188 | } | |
2688d999 AP |
189 | |
190 | # if defined(__power_set) | |
191 | /* | |
192 | * Value used in __power_set is a single-bit 1<<n one denoting | |
193 | * specific processor class. Incidentally 0xffffffff<<n can be | |
194 | * used to denote specific processor and its successors. | |
195 | */ | |
196 | if (sizeof(size_t) == 4) { | |
197 | /* In 32-bit case PPC_FPU64 is always fastest [if option] */ | |
198 | if (__power_set(0xffffffffU<<13)) /* POWER5 and later */ | |
199 | OPENSSL_ppccap_P |= PPC_FPU64; | |
200 | } else { | |
201 | /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */ | |
202 | if (__power_set(0x1U<<14)) /* POWER6 */ | |
203 | OPENSSL_ppccap_P |= PPC_FPU64; | |
204 | } | |
205 | ||
206 | if (__power_set(0xffffffffU<<14)) /* POWER6 and later */ | |
207 | OPENSSL_ppccap_P |= PPC_ALTIVEC; | |
208 | ||
209 | if (__power_set(0xffffffffU<<16)) /* POWER8 and later */ | |
210 | OPENSSL_ppccap_P |= PPC_CRYPTO207; | |
211 | ||
e0e53282 AP |
212 | if (__power_set(0xffffffffU<<17)) /* POWER9 and later */ |
213 | OPENSSL_ppccap_P |= PPC_MADD300; | |
214 | ||
2688d999 AP |
215 | return; |
216 | # endif | |
217 | #endif | |
218 | ||
219 | if (getauxval != NULL) { | |
220 | unsigned long hwcap = getauxval(HWCAP); | |
221 | ||
222 | if (hwcap & HWCAP_FPU) { | |
223 | OPENSSL_ppccap_P |= PPC_FPU; | |
224 | ||
225 | if (sizeof(size_t) == 4) { | |
226 | /* In 32-bit case PPC_FPU64 is always fastest [if option] */ | |
227 | if (hwcap & HWCAP_PPC64) | |
228 | OPENSSL_ppccap_P |= PPC_FPU64; | |
229 | } else { | |
230 | /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */ | |
231 | if (hwcap & HWCAP_POWER6_EXT) | |
232 | OPENSSL_ppccap_P |= PPC_FPU64; | |
233 | } | |
234 | } | |
235 | ||
236 | if (hwcap & HWCAP_ALTIVEC) { | |
237 | OPENSSL_ppccap_P |= PPC_ALTIVEC; | |
238 | ||
239 | if ((hwcap & HWCAP_VSX) && (getauxval(HWCAP2) & HWCAP_VEC_CRYPTO)) | |
240 | OPENSSL_ppccap_P |= PPC_CRYPTO207; | |
241 | } | |
242 | ||
e0e53282 AP |
243 | if (hwcap & HWCAP_ARCH_3_00) { |
244 | OPENSSL_ppccap_P |= PPC_MADD300; | |
245 | } | |
246 | ||
2688d999 AP |
247 | return; |
248 | } | |
249 | ||
250 | sigfillset(&all_masked); | |
251 | sigdelset(&all_masked, SIGILL); | |
252 | sigdelset(&all_masked, SIGTRAP); | |
253 | #ifdef SIGEMT | |
254 | sigdelset(&all_masked, SIGEMT); | |
fd054957 | 255 | #endif |
2688d999 AP |
256 | sigdelset(&all_masked, SIGFPE); |
257 | sigdelset(&all_masked, SIGBUS); | |
258 | sigdelset(&all_masked, SIGSEGV); | |
fd054957 | 259 | |
0f113f3e MC |
260 | memset(&ill_act, 0, sizeof(ill_act)); |
261 | ill_act.sa_handler = ill_handler; | |
262 | ill_act.sa_mask = all_masked; | |
6415dd7b | 263 | |
0f113f3e MC |
264 | sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset); |
265 | sigaction(SIGILL, &ill_act, &ill_oact); | |
6415dd7b | 266 | |
2688d999 AP |
267 | if (sigsetjmp(ill_jmp,1) == 0) { |
268 | OPENSSL_fpu_probe(); | |
269 | OPENSSL_ppccap_P |= PPC_FPU; | |
270 | ||
271 | if (sizeof(size_t) == 4) { | |
78c3e205 | 272 | #ifdef __linux |
2688d999 AP |
273 | struct utsname uts; |
274 | if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0) | |
78c3e205 | 275 | #endif |
2688d999 AP |
276 | if (sigsetjmp(ill_jmp, 1) == 0) { |
277 | OPENSSL_ppc64_probe(); | |
278 | OPENSSL_ppccap_P |= PPC_FPU64; | |
279 | } | |
280 | } else { | |
281 | /* | |
282 | * Wanted code detecting POWER6 CPU and setting PPC_FPU64 | |
283 | */ | |
284 | } | |
0f113f3e MC |
285 | } |
286 | ||
287 | if (sigsetjmp(ill_jmp, 1) == 0) { | |
288 | OPENSSL_altivec_probe(); | |
289 | OPENSSL_ppccap_P |= PPC_ALTIVEC; | |
290 | if (sigsetjmp(ill_jmp, 1) == 0) { | |
291 | OPENSSL_crypto207_probe(); | |
292 | OPENSSL_ppccap_P |= PPC_CRYPTO207; | |
293 | } | |
294 | } | |
295 | ||
e0e53282 AP |
296 | if (sigsetjmp(ill_jmp, 1) == 0) { |
297 | OPENSSL_madd300_probe(); | |
298 | OPENSSL_ppccap_P |= PPC_MADD300; | |
299 | } | |
300 | ||
0f113f3e MC |
301 | sigaction(SIGILL, &ill_oact, NULL); |
302 | sigprocmask(SIG_SETMASK, &oset, NULL); | |
303 | } |