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1 | # |
2 | # Copyright (C) 2015 Google. Inc | |
3 | # Written by Simon Glass <sjg@chromium.org> | |
4 | # | |
5 | # SPDX-License-Identifier: GPL-2.0+ | |
6 | # | |
7 | ||
8 | U-Boot on Rockchip | |
9 | ================== | |
10 | ||
11 | There are several repositories available with versions of U-Boot that support | |
12 | many Rockchip devices [1] [2]. | |
13 | ||
14 | The current mainline support is experimental only and is not useful for | |
15 | anything. It should provide a base on which to build. | |
16 | ||
f1387130 | 17 | So far only support for the RK3288 and RK3036 is provided. |
adfb2bfe SG |
18 | |
19 | ||
20 | Prerequisites | |
21 | ============= | |
22 | ||
23 | You will need: | |
24 | ||
f1387130 | 25 | - Firefly RK3288 board or something else with a supported RockChip SoC |
adfb2bfe SG |
26 | - Power connection to 5V using the supplied micro-USB power cable |
27 | - Separate USB serial cable attached to your computer and the Firefly | |
28 | (connect to the micro-USB connector below the logo) | |
29 | - rkflashtool [3] | |
30 | - openssl (sudo apt-get install openssl) | |
31 | - Serial UART connection [4] | |
32 | - Suitable ARM cross compiler, e.g.: | |
33 | sudo apt-get install gcc-4.7-arm-linux-gnueabi | |
34 | ||
35 | ||
36 | Building | |
37 | ======== | |
38 | ||
39 | At present three RK3288 boards are supported: | |
40 | ||
41 | - Firefly RK3288 - use firefly-rk3288 configuration | |
7c1058fa | 42 | - Radxa Rock 2 - use rock2 configuration |
f1387130 | 43 | - Hisense Chromebook - use chromebook_jerry configuration |
adfb2bfe | 44 | |
f1387130 | 45 | Two RK3036 board are supported: |
1d5a6968 | 46 | |
f1387130 SG |
47 | - EVB RK3036 - use evb-rk3036 configuration |
48 | - Kylin - use kylin_rk3036 configuration | |
1d5a6968 | 49 | |
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50 | For example: |
51 | ||
52 | CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all | |
53 | ||
54 | (or you can use another cross compiler if you prefer) | |
55 | ||
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56 | |
57 | Writing to the board with USB | |
58 | ============================= | |
59 | ||
60 | For USB to work you must get your board into ROM boot mode, either by erasing | |
61 | your MMC or (perhaps) holding the recovery button when you boot the board. | |
62 | To erase your MMC, you can boot into Linux and type (as root) | |
63 | ||
64 | dd if=/dev/zero of=/dev/mmcblk0 bs=1M | |
65 | ||
66 | Connect your board's OTG port to your computer. | |
67 | ||
68 | To create a suitable image and write it to the board: | |
69 | ||
717f8845 | 70 | ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \ |
f2acc55e | 71 | ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ |
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72 | cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l |
73 | ||
74 | If all goes well you should something like: | |
75 | ||
76 | U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49) | |
77 | Card did not respond to voltage select! | |
78 | spl: mmc init failed with error: -17 | |
79 | ### ERROR ### Please RESET the board ### | |
80 | ||
81 | You will need to reset the board before each time you try. Yes, that's all | |
82 | it does so far. If support for the Rockchip USB protocol or DFU were added | |
83 | in SPL then we could in principle load U-Boot and boot to a prompt from USB | |
84 | as several other platforms do. However it does not seem to be possible to | |
85 | use the existing boot ROM code from SPL. | |
86 | ||
87 | ||
88 | Booting from an SD card | |
89 | ======================= | |
90 | ||
91 | To write an image that boots from an SD card (assumed to be /dev/sdc): | |
92 | ||
717f8845 | 93 | ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \ |
f2acc55e SG |
94 | firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ |
95 | sudo dd if=out of=/dev/sdc seek=64 && \ | |
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96 | sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256 |
97 | ||
98 | This puts the Rockchip header and SPL image first and then places the U-Boot | |
99 | image at block 256 (i.e. 128KB from the start of the SD card). This | |
100 | corresponds with this setting in U-Boot: | |
101 | ||
102 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 | |
103 | ||
104 | Put this SD (or micro-SD) card into your board and reset it. You should see | |
105 | something like: | |
106 | ||
f1387130 | 107 | U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700) |
adfb2bfe | 108 | |
f1387130 | 109 | Model: Radxa Rock 2 Square |
adfb2bfe | 110 | DRAM: 2 GiB |
f1387130 SG |
111 | MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1 |
112 | *** Warning - bad CRC, using default environment | |
113 | ||
114 | In: serial | |
115 | Out: vop@ff940000.vidconsole | |
116 | Err: serial | |
117 | Net: Net Initialization Skipped | |
118 | No ethernet found. | |
119 | Hit any key to stop autoboot: 0 | |
adfb2bfe SG |
120 | => |
121 | ||
f1387130 SG |
122 | If you have an HDMI cable attached you should see a video console. |
123 | ||
1d5a6968 | 124 | For evb_rk3036 board: |
717f8845 | 125 | ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \ |
1d5a6968 | 126 | cat evb-rk3036/u-boot-dtb.bin >> out && \ |
127 | sudo dd if=out of=/dev/sdc seek=64 | |
128 | ||
129 | Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the | |
130 | debug uart must be disabled | |
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131 | |
132 | Booting from SPI | |
133 | ================ | |
134 | ||
135 | To write an image that boots from SPI flash (e.g. for the Haier Chromebook): | |
136 | ||
dd8e4290 SG |
137 | ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \ |
138 | -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \ | |
139 | dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \ | |
140 | cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \ | |
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141 | dd if=out.bin of=out.bin.pad bs=4M conv=sync |
142 | ||
143 | This converts the SPL image to the required SPI format by adding the Rockchip | |
144 | header and skipping every 2KB block. Then the U-Boot image is written at | |
145 | offset 128KB and the whole image is padded to 4MB which is the SPI flash size. | |
146 | The position of U-Boot is controlled with this setting in U-Boot: | |
147 | ||
148 | #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) | |
149 | ||
150 | If you have a Dediprog em100pro connected then you can write the image with: | |
151 | ||
152 | sudo em100 -s -c GD25LQ32 -d out.bin.pad -r | |
153 | ||
154 | When booting you should see something like: | |
155 | ||
156 | U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32) | |
157 | ||
158 | ||
159 | U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600) | |
160 | ||
161 | Model: Google Jerry | |
162 | DRAM: 2 GiB | |
163 | MMC: | |
164 | Using default environment | |
165 | ||
166 | In: serial@ff690000 | |
167 | Out: serial@ff690000 | |
168 | Err: serial@ff690000 | |
169 | => | |
170 | ||
171 | ||
172 | Future work | |
173 | =========== | |
174 | ||
175 | Immediate priorities are: | |
176 | ||
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177 | - USB host |
178 | - USB device | |
f1387130 | 179 | - Run CPU at full speed (code exists but we only see ~60 DMIPS maximum) |
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180 | - Ethernet |
181 | - NAND flash | |
182 | - Support for other Rockchip parts | |
183 | - Boot U-Boot proper over USB OTG (at present only SPL works) | |
184 | ||
185 | ||
186 | Development Notes | |
187 | ================= | |
188 | ||
189 | There are plenty of patches in the links below to help with this work. | |
190 | ||
191 | [1] https://github.com/rkchrome/uboot.git | |
192 | [2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288 | |
193 | [3] https://github.com/linux-rockchip/rkflashtool.git | |
194 | [4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en | |
195 | ||
196 | rkimage | |
197 | ------- | |
198 | ||
199 | rkimage.c produces an SPL image suitable for sending directly to the boot ROM | |
200 | over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes) | |
201 | followed by u-boot-spl-dtb.bin. | |
202 | ||
203 | The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM | |
204 | starts at 0xff700000 and extends to 0xff718000 where we put the stack. | |
205 | ||
206 | rksd | |
207 | ---- | |
208 | ||
209 | rksd.c produces an image consisting of 32KB of empty space, a header and | |
210 | u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although | |
211 | most of the fields are unused by U-Boot. We just need to specify the | |
212 | signature, a flag and the block offset and size of the SPL image. | |
213 | ||
214 | The header occupies a single block but we pad it out to 4 blocks. The header | |
215 | is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL | |
216 | image can be encoded too but we don't do that. | |
217 | ||
218 | The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB, | |
219 | or 0x40 blocks. This is a severe and annoying limitation. There may be a way | |
220 | around this limitation, since there is plenty of SRAM, but at present the | |
221 | board refuses to boot if this limit is exceeded. | |
222 | ||
223 | The image produced is padded up to a block boundary (512 bytes). It should be | |
224 | written to the start of an SD card using dd. | |
225 | ||
226 | Since this image is set to load U-Boot from the SD card at block offset, | |
227 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write | |
228 | u-boot-dtb.img to the SD card at that offset. See above for instructions. | |
229 | ||
230 | rkspi | |
231 | ----- | |
232 | ||
233 | rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The | |
234 | resulting image is then spread out so that only the first 2KB of each 4KB | |
235 | sector is used. The header is the same as with rksd and the maximum size is | |
236 | also 32KB (before spreading). The image should be written to the start of | |
237 | SPI flash. | |
238 | ||
239 | See above for instructions on how to write a SPI image. | |
240 | ||
002c634c SG |
241 | rkmux.py |
242 | -------- | |
243 | ||
244 | You can use this script to create #defines for SoC register access. See the | |
245 | script for usage. | |
246 | ||
adfb2bfe SG |
247 | |
248 | Device tree and driver model | |
249 | ---------------------------- | |
250 | ||
251 | Where possible driver model is used to provide a structure to the | |
252 | functionality. Device tree is used for configuration. However these have an | |
253 | overhead and in SPL with a 32KB size limit some shortcuts have been taken. | |
254 | In general all Rockchip drivers should use these features, with SPL-specific | |
255 | modifications where required. | |
256 | ||
257 | ||
258 | -- | |
259 | Simon Glass <sjg@chromium.org> | |
260 | 24 June 2015 |