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7168da16 MY |
1 | U-Boot for UniPhier SoC family |
2 | ============================== | |
3 | ||
4 | ||
5 | Tested toolchains | |
6 | ----------------- | |
7 | ||
8 | (a) Ubuntu packages (CROSS_COMPILE=arm-linux-gnueabi-) | |
9 | ||
10 | If you are building U-Boot on Ubuntu, its standard package is recommended. | |
11 | You can install it as follows: | |
12 | ||
13 | $ sudo apt-get install gcc-arm-linux-gnueabi- | |
14 | ||
15 | (b) Linaro compilers (CROSS_COMPILE=arm-linux-gnueabihf-) | |
16 | ||
17 | You can download pre-built toolchains from: | |
18 | ||
19 | http://www.linaro.org/downloads/ | |
20 | ||
21 | (c) kernel.org compilers (CROSS_COMPILE=arm-unknown-linux-gnueabi-) | |
22 | ||
23 | You can download pre-built toolchains from: | |
24 | ||
25 | ftp://www.kernel.org/pub/tools/crosstool/files/bin/ | |
26 | ||
27 | ||
28 | Compile the source | |
29 | ------------------ | |
30 | ||
e90b3686 MY |
31 | PH1-sLD3 reference board: |
32 | $ make uniphier_sld3_defconfig | |
7168da16 MY |
33 | $ make CROSS_COMPILE=arm-linux-gnueabi- |
34 | ||
5fd3f434 MY |
35 | PH1-LD4 reference board: |
36 | $ make uniphier_ld4_sld8_defconfig | |
7168da16 MY |
37 | $ make CROSS_COMPILE=arm-linux-gnueabi- |
38 | ||
5fd3f434 MY |
39 | PH1-sLD8 reference board: |
40 | $ make uniphier_ld4_sld8_defconfig | |
41 | $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-sld8-ref | |
42 | ||
e90b3686 MY |
43 | PH1-Pro4 reference board: |
44 | $ make uniphier_pro4_defconfig | |
3365b4eb MY |
45 | $ make CROSS_COMPILE=arm-linux-gnueabi- |
46 | ||
c6c7eed7 MY |
47 | PH1-Pro4 Ace board: |
48 | $ make uniphier_pro4_defconfig | |
49 | $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-pro4-ace | |
50 | ||
51 | PH1-Pro4 Sanji board: | |
52 | $ make uniphier_pro4_defconfig | |
53 | $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-pro4-sanji | |
54 | ||
e90b3686 | 55 | PH1-Pro5 4KBOX Board: |
fe7c95ee MY |
56 | $ make uniphier_pxs2_ld6b_defconfig |
57 | $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-pro5-4kbox | |
28f40d4a | 58 | |
1a264534 MY |
59 | ProXstream2 Gentil board: |
60 | $ make uniphier_pxs2_ld6b_defconfig | |
61 | $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-proxstream2-gentil | |
019df879 | 62 | |
1a264534 MY |
63 | ProXstream2 Vodka board: |
64 | $ make uniphier_pxs2_ld6b_defconfig | |
019df879 MY |
65 | $ make CROSS_COMPILE=arm-linux-gnueabi- |
66 | ||
1a264534 MY |
67 | PH1-LD6b reference board: |
68 | $ make uniphier_pxs2_ld6b_defconfig | |
69 | $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld6b-ref | |
70 | ||
7168da16 MY |
71 | You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-" |
72 | to use your favorite compiler. | |
73 | ||
74 | ||
75 | Burn U-Boot images to NAND | |
76 | -------------------------- | |
77 | ||
d085ecd6 MY |
78 | Write the following to the NAND device: |
79 | ||
3cb9abc9 | 80 | - spl/u-boot-spl.bin at the offset address 0x00000000 |
d085ecd6 MY |
81 | - u-boot.bin at the offset address 0x00010000 |
82 | ||
83 | or | |
84 | ||
85 | - u-boot-with-spl.bin at the offset address 0x00000000 | |
7168da16 MY |
86 | |
87 | If a TFTP server is available, the images can be easily updated. | |
d085ecd6 | 88 | Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory, |
95a2d438 | 89 | and then run the following command at the U-Boot command line: |
7168da16 MY |
90 | |
91 | => run nandupdate | |
92 | ||
93 | ||
c231c436 MY |
94 | Burn U-Boot images to eMMC |
95 | -------------------------- | |
96 | ||
d085ecd6 MY |
97 | Write the following to the Boot partition 1 of the eMMC device: |
98 | ||
c231c436 | 99 | - spl/u-boot-spl.bin at the offset address 0x00000000 |
d085ecd6 MY |
100 | - u-boot.bin at the offset address 0x00010000 |
101 | ||
102 | or | |
103 | ||
104 | - u-boot-with-spl.bin at the offset address 0x00000000 | |
c231c436 MY |
105 | |
106 | If a TFTP server is available, the images can be easily updated. | |
d085ecd6 | 107 | Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory, |
95a2d438 | 108 | and then run the following command at the U-Boot command line: |
c231c436 MY |
109 | |
110 | => run emmcupdate | |
111 | ||
112 | ||
7168da16 MY |
113 | UniPhier specific commands |
114 | -------------------------- | |
115 | ||
116 | - pinmon (enabled by CONFIG_CMD_PINMON) | |
117 | shows the boot mode pins that has been latched at the power-on reset | |
118 | ||
119 | - ddrphy (enabled by CONFIG_CMD_DDRPHY_DUMP) | |
120 | shows the DDR PHY parameters set by the PHY training | |
121 | ||
122 | ||
123 | Supported devices | |
124 | ----------------- | |
125 | ||
126 | - UART (on-chip) | |
127 | - NAND | |
a111bfbf | 128 | - SD/eMMC |
1e7df7c4 MY |
129 | - USB 2.0 (EHCI) |
130 | - USB 3.0 (xHCI) | |
b9a66b63 | 131 | - GPIO |
7168da16 MY |
132 | - LAN (on-board SMSC9118) |
133 | - I2C | |
134 | - EEPROM (connected to the on-board I2C bus) | |
135 | - Support card (SRAM, NOR flash, some peripherals) | |
136 | ||
137 | ||
62102bee MY |
138 | Micro Support Card |
139 | ------------------ | |
140 | ||
141 | The recommended bit switch settings are as follows: | |
142 | ||
143 | SW2 OFF(1)/ON(0) Description | |
144 | ------------------------------------------ | |
145 | bit 1 <---- BKSZ[0] | |
146 | bit 2 ----> BKSZ[1] | |
147 | bit 3 <---- SoC Bus Width 16/32 | |
148 | bit 4 <---- SERIAL_SEL[0] | |
149 | bit 5 ----> SERIAL_SEL[1] | |
150 | bit 6 ----> BOOTSWAP_EN | |
151 | bit 7 <---- CS1/CS5 | |
152 | bit 8 <---- SOC_SERIAL_DISABLE | |
153 | ||
154 | SW8 OFF(1)/ON(0) Description | |
155 | ------------------------------------------ | |
e69514cc | 156 | bit 1 <---- CS1_SPLIT |
62102bee MY |
157 | bit 2 <---- CASE9_ON |
158 | bit 3 <---- CASE10_ON | |
159 | bit 4 Don't Care Reserve | |
160 | bit 5 Don't Care Reserve | |
161 | bit 6 Don't Care Reserve | |
162 | bit 7 ----> BURST_EN | |
163 | bit 8 ----> FLASHBUS32_16 | |
164 | ||
165 | The BKSZ[1:0] specifies the address range of memory slot and peripherals | |
166 | as follows: | |
167 | ||
168 | BKSZ Description RAM slot Peripherals | |
169 | -------------------------------------------------------------------- | |
c57a9a63 MY |
170 | 0b00 15MB RAM / 1MB Peri 00000000-00efffff 00f00000-00ffffff |
171 | 0b01 31MB RAM / 1MB Peri 00000000-01efffff 01f00000-01ffffff | |
172 | 0b10 64MB RAM / 1MB Peri 00000000-03efffff 03f00000-03ffffff | |
173 | 0b11 127MB RAM / 1MB Peri 00000000-07efffff 07f00000-07ffffff | |
62102bee MY |
174 | |
175 | Set BSKZ[1:0] to 0b01 for U-Boot. | |
176 | This mode is the most handy because EA[24] is always supported by the save pin | |
177 | mode of the system bus. On the other hand, EA[25] is not supported for some | |
178 | newer SoCs. Even if it is, EA[25] is not connected on most of the boards. | |
179 | ||
7168da16 | 180 | -- |
62102bee | 181 | Masahiro Yamada <yamada.masahiro@socionext.com> |
3cb9abc9 | 182 | Feb. 2016 |