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1#
2# Copyright (C) 2014, Simon Glass <sjg@chromium.org>
3# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
4#
5# SPDX-License-Identifier: GPL-2.0+
6#
7
8U-Boot on x86
9=============
10
11This document describes the information about U-Boot running on x86 targets,
12including supported boards, build instructions, todo list, etc.
13
14Status
15------
16U-Boot supports running as a coreboot [1] payload on x86. So far only Link
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17(Chromebook Pixel) and QEMU [2] x86 targets have been tested, but it should
18work with minimal adjustments on other x86 boards since coreboot deals with
19most of the low-level details.
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21U-Boot also supports booting directly from x86 reset vector, without coreboot.
22In this case, known as bare mode, from the fact that it runs on the
23'bare metal', U-Boot acts like a BIOS replacement. Currently Link, QEMU x86
24targets and all Intel boards support running U-Boot 'bare metal'.
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26As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit
27Linux kernel as part of a FIT image. It also supports a compressed zImage.
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29Build Instructions for U-Boot as coreboot payload
30-------------------------------------------------
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31Building U-Boot as a coreboot payload is just like building U-Boot for targets
32on other architectures, like below:
33
34$ make coreboot-x86_defconfig
35$ make all
36
1ae5b78c 37Note this default configuration will build a U-Boot payload for the QEMU board.
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38To build a coreboot payload against another board, you can change the build
39configuration during the 'make menuconfig' process.
40
41x86 architecture --->
42 ...
1ae5b78c 43 (qemu-x86) Board configuration file
683b09d7 44 (qemu-x86_i440fx) Board Device Tree Source (dts) file
1ae5b78c 45 (0x01920000) Board specific Cache-As-RAM (CAR) address
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46 (0x4000) Board specific Cache-As-RAM (CAR) size
47
48Change the 'Board configuration file' and 'Board Device Tree Source (dts) file'
49to point to a new board. You can also change the Cache-As-RAM (CAR) related
50settings here if the default values do not fit your new board.
51
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52Build Instructions for U-Boot as BIOS replacement (bare mode)
53-------------------------------------------------------------
3a1a18ff 54Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a
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55little bit tricky, as generally it requires several binary blobs which are not
56shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is
57not turned on by default in the U-Boot source tree. Firstly, you need turn it
eea0f112 58on by enabling the ROM build:
5dad97ed 59
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60$ export BUILD_ROM=y
61
62This tells the Makefile to build u-boot.rom as a target.
5dad97ed 63
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64---
65
66Chromebook Link specific instructions for bare mode:
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67
68First, you need the following binary blobs:
69
70* descriptor.bin - Intel flash descriptor
71* me.bin - Intel Management Engine
72* mrc.bin - Memory Reference Code, which sets up SDRAM
73* video ROM - sets up the display
74
75You can get these binary blobs by:
76
77$ git clone http://review.coreboot.org/p/blobs.git
78$ cd blobs
79
80Find the following files:
81
82* ./mainboard/google/link/descriptor.bin
83* ./mainboard/google/link/me.bin
8712af97 84* ./northbridge/intel/sandybridge/systemagent-r6.bin
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85
86The 3rd one should be renamed to mrc.bin.
786a08e0 87As for the video ROM, you can get it here [3] and rename it to vga.bin.
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88Make sure all these binary blobs are put in the board directory.
89
90Now you can build U-Boot and obtain u-boot.rom:
91
92$ make chromebook_link_defconfig
93$ make all
94
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95---
96
97Intel Crown Bay specific instructions for bare mode:
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99U-Boot support of Intel Crown Bay board [4] relies on a binary blob called
100Firmware Support Package [5] to perform all the necessary initialization steps
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101as documented in the BIOS Writer Guide, including initialization of the CPU,
102memory controller, chipset and certain bus interfaces.
103
104Download the Intel FSP for Atom E6xx series and Platform Controller Hub EG20T,
105install it on your host and locate the FSP binary blob. Note this platform
106also requires a Chipset Micro Code (CMC) state machine binary to be present in
107the SPI flash where u-boot.rom resides, and this CMC binary blob can be found
108in this FSP package too.
109
110* ./FSP/QUEENSBAY_FSP_GOLD_001_20-DECEMBER-2013.fd
111* ./Microcode/C0_22211.BIN
112
113Rename the first one to fsp.bin and second one to cmc.bin and put them in the
114board directory.
115
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116Note the FSP release version 001 has a bug which could cause random endless
117loop during the FspInit call. This bug was published by Intel although Intel
118did not describe any details. We need manually apply the patch to the FSP
119binary using any hex editor (eg: bvi). Go to the offset 0x1fcd8 of the FSP
120binary, change the following five bytes values from orginally E8 42 FF FF FF
121to B8 00 80 0B 00.
122
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123As for the video ROM, you need manually extract it from the Intel provided
124BIOS for Crown Bay here [6], using the AMI MMTool [7]. Check PCI option ROM
125ID 8086:4108, extract and save it as vga.bin in the board directory.
126
617b867f 127Now you can build U-Boot and obtain u-boot.rom
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128
129$ make crownbay_defconfig
130$ make all
131
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132---
133
134Intel Minnowboard Max instructions for bare mode:
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135
136This uses as FSP as with Crown Bay, except it is for the Atom E3800 series.
137Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at
138the time of writing). Put it in the board directory:
139board/intel/minnowmax/fsp.bin
140
141Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same
142directory: board/intel/minnowmax/vga.bin
143
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144You still need two more binary blobs. The first comes from the original
145firmware image available from:
146
147http://firmware.intel.com/sites/default/files/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
148
149Unzip it:
150
151 $ unzip 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
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152
153Use ifdtool in the U-Boot tools directory to extract the images from that
154file, for example:
155
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156 $ ./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin
157
158This will provide the descriptor file - copy this into the correct place:
159
160 $ cp flashregion_0_flashdescriptor.bin board/intel/minnowmax/descriptor.bin
161
162Then do the same with the sample SPI image provided in the FSP (SPI.bin at
163the time of writing) to obtain the last image. Note that this will also
164produce a flash descriptor file, but it does not seem to work, probably
165because it is not designed for the Minnowmax. That is why you need to get
166the flash descriptor from the original firmware as above.
167
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168 $ ./tools/ifdtool -x BayleyBay/SPI.bin
169 $ cp flashregion_2_intel_me.bin board/intel/minnowmax/me.bin
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170
171Now you can build U-Boot and obtain u-boot.rom
172
173$ make minnowmax_defconfig
174$ make all
175
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176Checksums are as follows (but note that newer versions will invalidate this):
177
178$ md5sum -b board/intel/minnowmax/*.bin
179ffda9a3b94df5b74323afb328d51e6b4 board/intel/minnowmax/descriptor.bin
18069f65b9a580246291d20d08cbef9d7c5 board/intel/minnowmax/fsp.bin
181894a97d371544ec21de9c3e8e1716c4b board/intel/minnowmax/me.bin
182a2588537da387da592a27219d56e9962 board/intel/minnowmax/vga.bin
183
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184The ROM image is broken up into these parts:
185
186Offset Description Controlling config
187------------------------------------------------------------
188000000 descriptor.bin Hard-coded to 0 in ifdtool
189001000 me.bin Set by the descriptor
190500000 <spare>
191700000 u-boot-dtb.bin CONFIG_SYS_TEXT_BASE
192790000 vga.bin CONFIG_X86_OPTION_ROM_ADDR
1937c0000 fsp.bin CONFIG_FSP_ADDR
1947f8000 <spare> (depends on size of fsp.bin)
1957fe000 Environment CONFIG_ENV_OFFSET
1967ff800 U-Boot 16-bit boot CONFIG_SYS_X86_START16
197
198Overall ROM image size is controlled by CONFIG_ROM_SIZE.
199
28a85365 200---
537ccba2 201
28a85365 202Intel Galileo instructions for bare mode:
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203
204Only one binary blob is needed for Remote Management Unit (RMU) within Intel
205Quark SoC. Not like FSP, U-Boot does not call into the binary. The binary is
206needed by the Quark SoC itself.
207
208You can get the binary blob from Quark Board Support Package from Intel website:
209
210* ./QuarkSocPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin
211
212Rename the file and put it to the board directory by:
213
214 $ cp RMU.bin board/intel/galileo/rmu.bin
215
216Now you can build U-Boot and obtain u-boot.rom
217
218$ make galileo_defconfig
219$ make all
3a1a18ff 220
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221QEMU x86 target instructions:
222
223To build u-boot.rom for QEMU x86 targets, just simply run
224
225$ make qemu-x86_defconfig
226$ make all
227
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228Note this default configuration will build a U-Boot for the QEMU x86 i440FX
229board. To build a U-Boot against QEMU x86 Q35 board, you can change the build
230configuration during the 'make menuconfig' process like below:
231
232Device Tree Control --->
233 ...
234 (qemu-x86_q35) Default Device Tree for DT control
235
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236Test with coreboot
237------------------
238For testing U-Boot as the coreboot payload, there are things that need be paid
239attention to. coreboot supports loading an ELF executable and a 32-bit plain
240binary, as well as other supported payloads. With the default configuration,
241U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the
242generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool
243provided by coreboot) manually as coreboot's 'make menuconfig' does not provide
244this capability yet. The command is as follows:
245
246# in the coreboot root directory
247$ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \
330728d7 248 -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000
617b867f 249
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250Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address
251of _x86boot_start (in arch/x86/cpu/start.S).
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252
253If you want to use ELF as the coreboot payload, change U-Boot configuration to
eea0f112 254use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE.
617b867f 255
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256To enable video you must enable these options in coreboot:
257
258 - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
259 - Keep VESA framebuffer
260
261At present it seems that for Minnowboard Max, coreboot does not pass through
262the video information correctly (it always says the resolution is 0x0). This
263works correctly for link though.
264
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265Test with QEMU for bare mode
266----------------------------
1ae5b78c 267QEMU is a fancy emulator that can enable us to test U-Boot without access to
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268a real x86 board. Please make sure your QEMU version is 2.3.0 or above test
269U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows:
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270
271$ qemu-system-i386 -nographic -bios path/to/u-boot.rom
272
273This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU
274also supports emulating an x86 board with Q35 and ICH9 based chipset, which is
275also supported by U-Boot. To instantiate such a machine, call QEMU with:
276
277$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35
278
279Note by default QEMU instantiated boards only have 128 MiB system memory. But
280it is enough to have U-Boot boot and function correctly. You can increase the
281system memory by pass '-m' parameter to QEMU if you want more memory:
282
283$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024
284
285This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only
286supports 3 GiB maximum system memory and reserves the last 1 GiB address space
287for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m'
288would be 3072.
3a1a18ff 289
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290QEMU emulates a graphic card which U-Boot supports. Removing '-nographic' will
291show QEMU's VGA console window. Note this will disable QEMU's serial output.
292If you want to check both consoles, use '-serial stdio'.
293
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294Multicore is also supported by QEMU via '-smp n' where n is the number of cores
295to instantiate. Currently the default U-Boot built for QEMU supports 2 cores.
296In order to support more cores, you need add additional cpu nodes in the device
297tree and change CONFIG_MAX_CPUS accordingly.
298
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299CPU Microcode
300-------------
7aaff9bf 301Modern CPUs usually require a special bit stream called microcode [8] to be
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302loaded on the processor after power up in order to function properly. U-Boot
303has already integrated these as hex dumps in the source tree.
304
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305SMP Support
306-----------
307On a multicore system, U-Boot is executed on the bootstrap processor (BSP).
308Additional application processors (AP) can be brought up by U-Boot. In order to
309have an SMP kernel to discover all of the available processors, U-Boot needs to
310prepare configuration tables which contain the multi-CPUs information before
311loading the OS kernel. Currently U-Boot supports generating two types of tables
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312for SMP, called Simple Firmware Interface (SFI) [9] and Multi-Processor (MP)
313[10] tables. The writing of these two tables are controlled by two Kconfig
314options GENERATE_SFI_TABLE and GENERATE_MP_TABLE.
1281a1fc 315
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316Driver Model
317------------
318x86 has been converted to use driver model for serial and GPIO.
319
320Device Tree
321-----------
322x86 uses device tree to configure the board thus requires CONFIG_OF_CONTROL to
617b867f 323be turned on. Not every device on the board is configured via device tree, but
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324more and more devices will be added as time goes by. Check out the directory
325arch/x86/dts/ for these device tree source files.
326
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327Useful Commands
328---------------
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329In keeping with the U-Boot philosophy of providing functions to check and
330adjust internal settings, there are several x86-specific commands that may be
331useful:
332
333hob - Display information about Firmware Support Package (FSP) Hand-off
334 Block. This is only available on platforms which use FSP, mostly
335 Atom.
336iod - Display I/O memory
337iow - Write I/O memory
338mtrr - List and set the Memory Type Range Registers (MTRR). These are used to
339 tell the CPU whether memory is cacheable and if so the cache write
340 mode to use. U-Boot sets up some reasonable values but you can
341 adjust then with this command.
342
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343Booting Ubuntu
344--------------
345As an example of how to set up your boot flow with U-Boot, here are
346instructions for starting Ubuntu from U-Boot. These instructions have been
347tested on Minnowboard MAX with a SATA driver but are equally applicable on
348other platforms and other media. There are really only four steps and its a
349very simple script, but a more detailed explanation is provided here for
350completeness.
351
352Note: It is possible to set up U-Boot to boot automatically using syslinux.
353It could also use the grub.cfg file (/efi/ubuntu/grub.cfg) to obtain the
354GUID. If you figure these out, please post patches to this README.
355
356Firstly, you will need Ubunutu installed on an available disk. It should be
357possible to make U-Boot start a USB start-up disk but for now let's assume
358that you used another boot loader to install Ubuntu.
359
360Use the U-Boot command line to find the UUID of the partition you want to
361boot. For example our disk is SCSI device 0:
362
363=> part list scsi 0
364
365Partition Map for SCSI device 0 -- Partition Type: EFI
366
367 Part Start LBA End LBA Name
368 Attributes
369 Type GUID
370 Partition GUID
371 1 0x00000800 0x001007ff ""
372 attrs: 0x0000000000000000
373 type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b
374 guid: 9d02e8e4-4d59-408f-a9b0-fd497bc9291c
375 2 0x00100800 0x037d8fff ""
376 attrs: 0x0000000000000000
377 type: 0fc63daf-8483-4772-8e79-3d69d8477de4
378 guid: 965c59ee-1822-4326-90d2-b02446050059
379 3 0x037d9000 0x03ba27ff ""
380 attrs: 0x0000000000000000
381 type: 0657fd6d-a4ab-43c4-84e5-0933c84b4f4f
382 guid: 2c4282bd-1e82-4bcf-a5ff-51dedbf39f17
383 =>
384
385This shows that your SCSI disk has three partitions. The really long hex
386strings are called Globally Unique Identifiers (GUIDs). You can look up the
387'type' ones here [11]. On this disk the first partition is for EFI and is in
388VFAT format (DOS/Windows):
389
390 => fatls scsi 0:1
391 efi/
392
393 0 file(s), 1 dir(s)
394
395
396Partition 2 is 'Linux filesystem data' so that will be our root disk. It is
397in ext2 format:
398
399 => ext2ls scsi 0:2
400 <DIR> 4096 .
401 <DIR> 4096 ..
402 <DIR> 16384 lost+found
403 <DIR> 4096 boot
404 <DIR> 12288 etc
405 <DIR> 4096 media
406 <DIR> 4096 bin
407 <DIR> 4096 dev
408 <DIR> 4096 home
409 <DIR> 4096 lib
410 <DIR> 4096 lib64
411 <DIR> 4096 mnt
412 <DIR> 4096 opt
413 <DIR> 4096 proc
414 <DIR> 4096 root
415 <DIR> 4096 run
416 <DIR> 12288 sbin
417 <DIR> 4096 srv
418 <DIR> 4096 sys
419 <DIR> 4096 tmp
420 <DIR> 4096 usr
421 <DIR> 4096 var
422 <SYM> 33 initrd.img
423 <SYM> 30 vmlinuz
424 <DIR> 4096 cdrom
425 <SYM> 33 initrd.img.old
426 =>
427
428and if you look in the /boot directory you will see the kernel:
429
430 => ext2ls scsi 0:2 /boot
431 <DIR> 4096 .
432 <DIR> 4096 ..
433 <DIR> 4096 efi
434 <DIR> 4096 grub
435 3381262 System.map-3.13.0-32-generic
436 1162712 abi-3.13.0-32-generic
437 165611 config-3.13.0-32-generic
438 176500 memtest86+.bin
439 178176 memtest86+.elf
440 178680 memtest86+_multiboot.bin
441 5798112 vmlinuz-3.13.0-32-generic
442 165762 config-3.13.0-58-generic
443 1165129 abi-3.13.0-58-generic
444 5823136 vmlinuz-3.13.0-58-generic
445 19215259 initrd.img-3.13.0-58-generic
446 3391763 System.map-3.13.0-58-generic
447 5825048 vmlinuz-3.13.0-58-generic.efi.signed
448 28304443 initrd.img-3.13.0-32-generic
449 =>
450
451The 'vmlinuz' files contain a packaged Linux kernel. The format is a kind of
452self-extracting compressed file mixed with some 'setup' configuration data.
453Despite its size (uncompressed it is >10MB) this only includes a basic set of
454device drivers, enough to boot on most hardware types.
455
456The 'initrd' files contain a RAM disk. This is something that can be loaded
457into RAM and will appear to Linux like a disk. Ubuntu uses this to hold lots
458of drivers for whatever hardware you might have. It is loaded before the
459real root disk is accessed.
460
461The numbers after the end of each file are the version. Here it is Linux
462version 3.13. You can find the source code for this in the Linux tree with
463the tag v3.13. The '.0' allows for additional Linux releases to fix problems,
464but normally this is not needed. The '-58' is used by Ubuntu. Each time they
465release a new kernel they increment this number. New Ubuntu versions might
466include kernel patches to fix reported bugs. Stable kernels can exist for
467some years so this number can get quite high.
468
469The '.efi.signed' kernel is signed for EFI's secure boot. U-Boot has its own
470secure boot mechanism - see [12] [13] and cannot read .efi files at present.
471
472To boot Ubuntu from U-Boot the steps are as follows:
473
4741. Set up the boot arguments. Use the GUID for the partition you want to
475boot:
476
477 => setenv bootargs root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro
478
479Here root= tells Linux the location of its root disk. The disk is specified
480by its GUID, using '/dev/disk/by-partuuid/', a Linux path to a 'directory'
481containing all the GUIDs Linux has found. When it starts up, there will be a
482file in that directory with this name in it. It is also possible to use a
483device name here, see later.
484
4852. Load the kernel. Since it is an ext2/4 filesystem we can do:
486
487 => ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic
488
489The address 30000000 is arbitrary, but there seem to be problems with using
490small addresses (sometimes Linux cannot find the ramdisk). This is 48MB into
491the start of RAM (which is at 0 on x86).
492
4933. Load the ramdisk (to 64MB):
494
495 => ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic
496
4974. Start up the kernel. We need to know the size of the ramdisk, but can use
498a variable for that. U-Boot sets 'filesize' to the size of the last file it
499loaded.
500
501 => zboot 03000000 0 04000000 ${filesize}
502
503Type 'help zboot' if you want to see what the arguments are. U-Boot on x86 is
504quite verbose when it boots a kernel. You should see these messages from
505U-Boot:
506
507 Valid Boot Flag
508 Setup Size = 0x00004400
509 Magic signature found
510 Using boot protocol version 2.0c
511 Linux kernel version 3.13.0-58-generic (buildd@allspice) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015
512 Building boot_params at 0x00090000
513 Loading bzImage at address 100000 (5805728 bytes)
514 Magic signature found
515 Initial RAM disk at linear address 0x04000000, size 19215259 bytes
516 Kernel command line: "console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro"
517
518 Starting kernel ...
519
520U-Boot prints out some bootstage timing. This is more useful if you put the
521above commands into a script since then it will be faster.
522
523 Timer summary in microseconds:
524 Mark Elapsed Stage
525 0 0 reset
526 241,535 241,535 board_init_r
527 2,421,611 2,180,076 id=64
528 2,421,790 179 id=65
529 2,428,215 6,425 main_loop
530 48,860,584 46,432,369 start_kernel
531
532 Accumulated time:
533 240,329 ahci
534 1,422,704 vesa display
535
536Now the kernel actually starts:
537
538 [ 0.000000] Initializing cgroup subsys cpuset
539 [ 0.000000] Initializing cgroup subsys cpu
540 [ 0.000000] Initializing cgroup subsys cpuacct
541 [ 0.000000] Linux version 3.13.0-58-generic (buildd@allspice) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 (Ubuntu 3.13.0-58.97-generic 3.13.11-ckt22)
542 [ 0.000000] Command line: console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro
543
544It continues for a long time. Along the way you will see it pick up your
545ramdisk:
546
547 [ 0.000000] RAMDISK: [mem 0x04000000-0x05253fff]
548...
549 [ 0.788540] Trying to unpack rootfs image as initramfs...
550 [ 1.540111] Freeing initrd memory: 18768K (ffff880004000000 - ffff880005254000)
551...
552
553Later it actually starts using it:
554
555 Begin: Running /scripts/local-premount ... done.
556
557You should also see your boot disk turn up:
558
559 [ 4.357243] scsi 1:0:0:0: Direct-Access ATA ADATA SP310 5.2 PQ: 0 ANSI: 5
560 [ 4.366860] sd 1:0:0:0: [sda] 62533296 512-byte logical blocks: (32.0 GB/29.8 GiB)
561 [ 4.375677] sd 1:0:0:0: Attached scsi generic sg0 type 0
562 [ 4.381859] sd 1:0:0:0: [sda] Write Protect is off
563 [ 4.387452] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
564 [ 4.399535] sda: sda1 sda2 sda3
565
566Linux has found the three partitions (sda1-3). Mercifully it doesn't print out
567the GUIDs. In step 1 above we could have used:
568
569 setenv bootargs root=/dev/sda2 ro
570
571instead of the GUID. However if you add another drive to your board the
572numbering may change whereas the GUIDs will not. So if your boot partition
573becomes sdb2, it will still boot. For embedded systems where you just want to
574boot the first disk, you have that option.
575
576The last thing you will see on the console is mention of plymouth (which
577displays the Ubuntu start-up screen) and a lot of 'Starting' messages:
578
579 * Starting Mount filesystems on boot [ OK ]
580
581After a pause you should see a login screen on your display and you are done.
582
583If you want to put this in a script you can use something like this:
584
585 setenv bootargs root=UUID=b2aaf743-0418-4d90-94cc-3e6108d7d968 ro
586 setenv boot zboot 03000000 0 04000000 \${filesize}
587 setenv bootcmd "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; run boot"
588 saveenv
589
590The \ is to tell the shell not to evaluate ${filesize} as part of the setenv
591command.
592
593You will also need to add this to your board configuration file, e.g.
594include/configs/minnowmax.h:
595
596 #define CONFIG_BOOTDELAY 2
597
598Now when you reset your board it wait a few seconds (in case you want to
599interrupt) and then should boot straight into Ubuntu.
600
601You can also bake this behaviour into your build by hard-coding the
602environment variables if you add this to minnowmax.h:
603
604#undef CONFIG_BOOTARGS
605#undef CONFIG_BOOTCOMMAND
606
607#define CONFIG_BOOTARGS \
608 "root=/dev/sda2 ro"
609#define CONFIG_BOOTCOMMAND \
610 "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; " \
611 "ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; " \
612 "run boot"
613
614#undef CONFIG_EXTRA_ENV_SETTINGS
615#define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}"
616
617
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618Development Flow
619----------------
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620These notes are for those who want to port U-Boot to a new x86 platform.
621
622Since x86 CPUs boot from SPI flash, a SPI flash emulator is a good investment.
623The Dediprog em100 can be used on Linux. The em100 tool is available here:
624
625 http://review.coreboot.org/p/em100.git
626
627On Minnowboard Max the following command line can be used:
628
629 sudo em100 -s -p LOW -d u-boot.rom -c W25Q64DW -r
630
631A suitable clip for connecting over the SPI flash chip is here:
632
633 http://www.dediprog.com/pd/programmer-accessories/EM-TC-8
634
635This allows you to override the SPI flash contents for development purposes.
636Typically you can write to the em100 in around 1200ms, considerably faster
637than programming the real flash device each time. The only important
638limitation of the em100 is that it only supports SPI bus speeds up to 20MHz.
639This means that images must be set to boot with that speed. This is an
640Intel-specific feature - e.g. tools/ifttool has an option to set the SPI
641speed in the SPI descriptor region.
642
643If your chip/board uses an Intel Firmware Support Package (FSP) it is fairly
644easy to fit it in. You can follow the Minnowboard Max implementation, for
645example. Hopefully you will just need to create new files similar to those
646in arch/x86/cpu/baytrail which provide Bay Trail support.
647
648If you are not using an FSP you have more freedom and more responsibility.
649The ivybridge support works this way, although it still uses a ROM for
650graphics and still has binary blobs containing Intel code. You should aim to
651support all important peripherals on your platform including video and storage.
652Use the device tree for configuration where possible.
653
654For the microcode you can create a suitable device tree file using the
655microcode tool:
656
03e3c316 657 ./tools/microcode-tool -d microcode.dat -m <model> create
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658
659or if you only have header files and not the full Intel microcode.dat database:
660
661 ./tools/microcode-tool -H BAY_TRAIL_FSP_KIT/Microcode/M0130673322.h \
662 -H BAY_TRAIL_FSP_KIT/Microcode/M0130679901.h \
03e3c316 663 -m all create
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664
665These are written to arch/x86/dts/microcode/ by default.
666
667Note that it is possible to just add the micrcode for your CPU if you know its
668model. U-Boot prints this information when it starts
669
670 CPU: x86_64, vendor Intel, device 30673h
671
672so here we can use the M0130673322 file.
673
674If you platform can display POST codes on two little 7-segment displays on
675the board, then you can use post_code() calls from C or assembler to monitor
676boot progress. This can be good for debugging.
677
678If not, you can try to get serial working as early as possible. The early
679debug serial port may be useful here. See setup_early_uart() for an example.
680
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681During the U-Boot porting, one of the important steps is to write correct PIRQ
682routing information in the board device tree. Without it, device drivers in the
683Linux kernel won't function correctly due to interrupt is not working. Please
684refer to U-Boot doc [14] for the device tree bindings of Intel interrupt router.
685Here we have more details on the intel,pirq-routing property below.
686
687 intel,pirq-routing = <
688 PCI_BDF(0, 2, 0) INTA PIRQA
689 ...
690 >;
691
692As you see each entry has 3 cells. For the first one, we need describe all pci
693devices mounted on the board. For SoC devices, normally there is a chapter on
694the chipset datasheet which lists all the available PCI devices. For example on
695Bay Trail, this is chapter 4.3 (PCI configuration space). For the second one, we
696can get the interrupt pin either from datasheet or hardware via U-Boot shell.
697The reliable source is the hardware as sometimes chipset datasheet is not 100%
698up-to-date. Type 'pci header' plus the device's pci bus/device/function number
699from U-Boot shell below.
700
701 => pci header 0.1e.1
702 vendor ID = 0x8086
703 device ID = 0x0f08
704 ...
705 interrupt line = 0x09
706 interrupt pin = 0x04
707 ...
708
709It shows this PCI device is using INTD pin as it reports 4 in the interrupt pin
710register. Repeat this until you get interrupt pins for all the devices. The last
711cell is the PIRQ line which a particular interrupt pin is mapped to. On Intel
712chipset, the power-up default mapping is INTA/B/C/D maps to PIRQA/B/C/D. This
713can be changed by registers in LPC bridge. So far Intel FSP does not touch those
714registers so we can write down the PIRQ according to the default mapping rule.
715
716Once we get the PIRQ routing information in the device tree, the interrupt
717allocation and assignment will be done by U-Boot automatically. Now you can
718enable CONFIG_GENERATE_PIRQ_TABLE for testing Linux kernel using i8259 PIC and
719CONFIG_GENERATE_MP_TABLE for testing Linux kernel using local APIC and I/O APIC.
720
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721This script might be useful. If you feed it the output of 'pci long' from
722U-Boot then it will generate a device tree fragment with the interrupt
723configuration for each device (note it needs gawk 4.0.0):
724
725 $ cat console_output |awk '/PCI/ {device=$4} /interrupt line/ {line=$4} \
726 /interrupt pin/ {pin = $4; if (pin != "0x00" && pin != "0xff") \
727 {patsplit(device, bdf, "[0-9a-f]+"); \
728 printf "PCI_BDF(%d, %d, %d) INT%c PIRQ%c\n", strtonum("0x" bdf[1]), \
729 strtonum("0x" bdf[2]), bdf[3], strtonum(pin) + 64, 64 + strtonum(pin)}}'
730
731Example output:
732 PCI_BDF(0, 2, 0) INTA PIRQA
733 PCI_BDF(0, 3, 0) INTA PIRQA
734...
735
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736TODO List
737---------
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738- Audio
739- Chrome OS verified boot
740- SMI and ACPI support, to provide platform info and facilities to Linux
741
742References
743----------
744[1] http://www.coreboot.org
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745[2] http://www.qemu.org
746[3] http://www.coreboot.org/~stepan/pci8086,0166.rom
747[4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
748[5] http://www.intel.com/fsp
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749[6] http://www.intel.com/content/www/us/en/secure/intelligent-systems/privileged/e6xx-35-b1-cmc22211.html
750[7] http://www.ami.com/products/bios-uefi-tools-and-utilities/bios-uefi-utilities/
751[8] http://en.wikipedia.org/wiki/Microcode
752[9] http://simplefirmware.org
753[10] http://www.intel.com/design/archives/processors/pro/docs/242016.htm
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754[11] https://en.wikipedia.org/wiki/GUID_Partition_Table
755[12] http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf
756[13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf
12c7510f 757[14] doc/device-tree-bindings/misc/intel,irq-router.txt