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acpi, nfit: Collect shutdown status
[thirdparty/kernel/stable.git] / drivers / acpi / nfit / core.c
CommitLineData
b94d5230
DW		 1/*
2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
13#include <linux/list_sort.h>
14#include <linux/libnvdimm.h>
15#include <linux/module.h>
047fc8a1 16#include <linux/mutex.h>
62232e45 17#include <linux/ndctl.h>
37b137ff 18#include <linux/sysfs.h>
0caeef63 19#include <linux/delay.h>
b94d5230
DW		 20#include <linux/list.h>
21#include <linux/acpi.h>
eaf96153 22#include <linux/sort.h>
047fc8a1 23#include <linux/io.h>
1cf03c00 24#include <linux/nd.h>
96601adb 25#include <asm/cacheflush.h>
23222f8f 26#include <acpi/nfit.h>
b94d5230 27#include "nfit.h"
0ead1118 28#include "intel.h"
b94d5230 29
047fc8a1
RZ		 30/*
31 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
32 * irrelevant.
33 */
2f8e2c87 34#include <linux/io-64-nonatomic-hi-lo.h>
047fc8a1 35
4d88a97a
DW		 36static bool force_enable_dimms;
37module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR);
38MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status");
39
87554098
DW		 40static bool disable_vendor_specific;
41module_param(disable_vendor_specific, bool, S_IRUGO);
42MODULE_PARM_DESC(disable_vendor_specific,
f2668fa7 43 "Limit commands to the publicly specified set");
87554098 44
095ab4b3
LK		 45static unsigned long override_dsm_mask;
46module_param(override_dsm_mask, ulong, S_IRUGO);
47MODULE_PARM_DESC(override_dsm_mask, "Bitmask of allowed NVDIMM DSM functions");
48
ba650cfc
LK		 49static int default_dsm_family = -1;
50module_param(default_dsm_family, int, S_IRUGO);
51MODULE_PARM_DESC(default_dsm_family,
52 "Try this DSM type first when identifying NVDIMM family");
53
bca811a7
DW		 54static bool no_init_ars;
55module_param(no_init_ars, bool, 0644);
56MODULE_PARM_DESC(no_init_ars, "Skip ARS run at nfit init time");
57
6839a6d9
VV		 58LIST_HEAD(acpi_descs);
59DEFINE_MUTEX(acpi_desc_lock);
60
7ae0fa43
DW		 61static struct workqueue_struct *nfit_wq;
62
20985164
VV		 63struct nfit_table_prev {
64 struct list_head spas;
65 struct list_head memdevs;
66 struct list_head dcrs;
67 struct list_head bdws;
68 struct list_head idts;
69 struct list_head flushes;
70};
71
41c8bdb3 72static guid_t nfit_uuid[NFIT_UUID_MAX];
b94d5230 73
41c8bdb3 74const guid_t *to_nfit_uuid(enum nfit_uuids id)
b94d5230 75{
41c8bdb3 76 return &nfit_uuid[id];
b94d5230 77}
6bc75619 78EXPORT_SYMBOL(to_nfit_uuid);
b94d5230 79
62232e45
DW		 80static struct acpi_nfit_desc *to_acpi_nfit_desc(
81 struct nvdimm_bus_descriptor *nd_desc)
82{
83 return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
84}
85
86static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc)
87{
88 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
89
90 /*
91 * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct
92 * acpi_device.
93 */
94 if (!nd_desc->provider_name
95 || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0)
96 return NULL;
97
98 return to_acpi_device(acpi_desc->dev);
99}
100
d6eb270c 101static int xlat_bus_status(void *buf, unsigned int cmd, u32 status)
aef25338 102{
d4f32367 103 struct nd_cmd_clear_error *clear_err;
aef25338 104 struct nd_cmd_ars_status *ars_status;
aef25338
DW		 105 u16 flags;
106
107 switch (cmd) {
108 case ND_CMD_ARS_CAP:
11294d63 109 if ((status & 0xffff) == NFIT_ARS_CAP_NONE)
aef25338
DW		 110 return -ENOTTY;
111
112 /* Command failed */
11294d63 113 if (status & 0xffff)
aef25338
DW		 114 return -EIO;
115
116 /* No supported scan types for this range */
117 flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE;
11294d63 118 if ((status >> 16 & flags) == 0)
aef25338 119 return -ENOTTY;
9a901f54 120 return 0;
aef25338 121 case ND_CMD_ARS_START:
aef25338 122 /* ARS is in progress */
11294d63 123 if ((status & 0xffff) == NFIT_ARS_START_BUSY)
aef25338
DW		 124 return -EBUSY;
125
126 /* Command failed */
11294d63 127 if (status & 0xffff)
aef25338 128 return -EIO;
9a901f54 129 return 0;
aef25338
DW		 130 case ND_CMD_ARS_STATUS:
131 ars_status = buf;
132 /* Command failed */
11294d63 133 if (status & 0xffff)
aef25338
DW		 134 return -EIO;
135 /* Check extended status (Upper two bytes) */
11294d63 136 if (status == NFIT_ARS_STATUS_DONE)
aef25338
DW		 137 return 0;
138
139 /* ARS is in progress */
11294d63 140 if (status == NFIT_ARS_STATUS_BUSY)
aef25338
DW		 141 return -EBUSY;
142
143 /* No ARS performed for the current boot */
11294d63 144 if (status == NFIT_ARS_STATUS_NONE)
aef25338
DW		 145 return -EAGAIN;
146
147 /*
148 * ARS interrupted, either we overflowed or some other
149 * agent wants the scan to stop. If we didn't overflow
150 * then just continue with the returned results.
151 */
11294d63 152 if (status == NFIT_ARS_STATUS_INTR) {
82aa37cf
DW		 153 if (ars_status->out_length >= 40 && (ars_status->flags
154 & NFIT_ARS_F_OVERFLOW))
aef25338
DW		 155 return -ENOSPC;
156 return 0;
157 }
158
159 /* Unknown status */
11294d63 160 if (status >> 16)
aef25338 161 return -EIO;
9a901f54 162 return 0;
d4f32367
DW		 163 case ND_CMD_CLEAR_ERROR:
164 clear_err = buf;
11294d63 165 if (status & 0xffff)
d4f32367
DW		 166 return -EIO;
167 if (!clear_err->cleared)
168 return -EIO;
169 if (clear_err->length > clear_err->cleared)
170 return clear_err->cleared;
9a901f54 171 return 0;
aef25338
DW		 172 default:
173 break;
174 }
175
11294d63
DW		 176 /* all other non-zero status results in an error */
177 if (status)
178 return -EIO;
aef25338
DW		 179 return 0;
180}
181
4b27db7e
DW		 182#define ACPI_LABELS_LOCKED 3
183
184static int xlat_nvdimm_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd,
185 u32 status)
9d62ed96 186{
4b27db7e
DW		 187 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
188
9d62ed96
DW		 189 switch (cmd) {
190 case ND_CMD_GET_CONFIG_SIZE:
4b27db7e
DW		 191 /*
192 * In the _LSI, _LSR, _LSW case the locked status is
193 * communicated via the read/write commands
194 */
6f07f86c 195 if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags))
4b27db7e
DW		 196 break;
197
9d62ed96
DW		 198 if (status >> 16 & ND_CONFIG_LOCKED)
199 return -EACCES;
200 break;
4b27db7e 201 case ND_CMD_GET_CONFIG_DATA:
6f07f86c
DW		 202 if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags)
203 && status == ACPI_LABELS_LOCKED)
4b27db7e
DW		 204 return -EACCES;
205 break;
206 case ND_CMD_SET_CONFIG_DATA:
6f07f86c
DW		 207 if (test_bit(NFIT_MEM_LSW, &nfit_mem->flags)
208 && status == ACPI_LABELS_LOCKED)
4b27db7e
DW		 209 return -EACCES;
210 break;
9d62ed96
DW		 211 default:
212 break;
213 }
214
215 /* all other non-zero status results in an error */
216 if (status)
217 return -EIO;
218 return 0;
219}
220
d6eb270c
DW		 221static int xlat_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd,
222 u32 status)
223{
224 if (!nvdimm)
225 return xlat_bus_status(buf, cmd, status);
4b27db7e
DW		 226 return xlat_nvdimm_status(nvdimm, buf, cmd, status);
227}
228
229/* convert _LS{I,R} packages to the buffer object acpi_nfit_ctl expects */
230static union acpi_object *pkg_to_buf(union acpi_object *pkg)
231{
232 int i;
233 void *dst;
234 size_t size = 0;
235 union acpi_object *buf = NULL;
236
237 if (pkg->type != ACPI_TYPE_PACKAGE) {
238 WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n",
239 pkg->type);
240 goto err;
241 }
242
243 for (i = 0; i < pkg->package.count; i++) {
244 union acpi_object *obj = &pkg->package.elements[i];
245
246 if (obj->type == ACPI_TYPE_INTEGER)
247 size += 4;
248 else if (obj->type == ACPI_TYPE_BUFFER)
249 size += obj->buffer.length;
250 else {
251 WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n",
252 obj->type);
253 goto err;
254 }
255 }
256
257 buf = ACPI_ALLOCATE(sizeof(*buf) + size);
258 if (!buf)
259 goto err;
260
261 dst = buf + 1;
262 buf->type = ACPI_TYPE_BUFFER;
263 buf->buffer.length = size;
264 buf->buffer.pointer = dst;
265 for (i = 0; i < pkg->package.count; i++) {
266 union acpi_object *obj = &pkg->package.elements[i];
267
268 if (obj->type == ACPI_TYPE_INTEGER) {
269 memcpy(dst, &obj->integer.value, 4);
270 dst += 4;
271 } else if (obj->type == ACPI_TYPE_BUFFER) {
272 memcpy(dst, obj->buffer.pointer, obj->buffer.length);
273 dst += obj->buffer.length;
274 }
275 }
276err:
277 ACPI_FREE(pkg);
278 return buf;
279}
280
281static union acpi_object *int_to_buf(union acpi_object *integer)
282{
283 union acpi_object *buf = ACPI_ALLOCATE(sizeof(*buf) + 4);
284 void *dst = NULL;
285
286 if (!buf)
287 goto err;
288
289 if (integer->type != ACPI_TYPE_INTEGER) {
290 WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n",
291 integer->type);
292 goto err;
293 }
294
295 dst = buf + 1;
296 buf->type = ACPI_TYPE_BUFFER;
297 buf->buffer.length = 4;
298 buf->buffer.pointer = dst;
299 memcpy(dst, &integer->integer.value, 4);
300err:
301 ACPI_FREE(integer);
302 return buf;
303}
304
305static union acpi_object *acpi_label_write(acpi_handle handle, u32 offset,
306 u32 len, void *data)
307{
308 acpi_status rc;
309 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
310 struct acpi_object_list input = {
311 .count = 3,
312 .pointer = (union acpi_object []) {
313 [0] = {
314 .integer.type = ACPI_TYPE_INTEGER,
315 .integer.value = offset,
316 },
317 [1] = {
318 .integer.type = ACPI_TYPE_INTEGER,
319 .integer.value = len,
320 },
321 [2] = {
322 .buffer.type = ACPI_TYPE_BUFFER,
323 .buffer.pointer = data,
324 .buffer.length = len,
325 },
326 },
327 };
328
329 rc = acpi_evaluate_object(handle, "_LSW", &input, &buf);
330 if (ACPI_FAILURE(rc))
331 return NULL;
332 return int_to_buf(buf.pointer);
333}
334
335static union acpi_object *acpi_label_read(acpi_handle handle, u32 offset,
336 u32 len)
337{
338 acpi_status rc;
339 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
340 struct acpi_object_list input = {
341 .count = 2,
342 .pointer = (union acpi_object []) {
343 [0] = {
344 .integer.type = ACPI_TYPE_INTEGER,
345 .integer.value = offset,
346 },
347 [1] = {
348 .integer.type = ACPI_TYPE_INTEGER,
349 .integer.value = len,
350 },
351 },
352 };
353
354 rc = acpi_evaluate_object(handle, "_LSR", &input, &buf);
355 if (ACPI_FAILURE(rc))
356 return NULL;
357 return pkg_to_buf(buf.pointer);
358}
359
360static union acpi_object *acpi_label_info(acpi_handle handle)
361{
362 acpi_status rc;
363 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
364
365 rc = acpi_evaluate_object(handle, "_LSI", NULL, &buf);
366 if (ACPI_FAILURE(rc))
367 return NULL;
368 return pkg_to_buf(buf.pointer);
d6eb270c
DW		 369}
370
11e14270
DW		 371static u8 nfit_dsm_revid(unsigned family, unsigned func)
372{
373 static const u8 revid_table[NVDIMM_FAMILY_MAX+1][32] = {
374 [NVDIMM_FAMILY_INTEL] = {
375 [NVDIMM_INTEL_GET_MODES] = 2,
376 [NVDIMM_INTEL_GET_FWINFO] = 2,
377 [NVDIMM_INTEL_START_FWUPDATE] = 2,
378 [NVDIMM_INTEL_SEND_FWUPDATE] = 2,
379 [NVDIMM_INTEL_FINISH_FWUPDATE] = 2,
380 [NVDIMM_INTEL_QUERY_FWUPDATE] = 2,
381 [NVDIMM_INTEL_SET_THRESHOLD] = 2,
382 [NVDIMM_INTEL_INJECT_ERROR] = 2,
383 },
384 };
385 u8 id;
386
387 if (family > NVDIMM_FAMILY_MAX)
388 return 0;
389 if (func > 31)
390 return 0;
391 id = revid_table[family][func];
392 if (id == 0)
393 return 1; /* default */
394 return id;
395}
396
a7de92da
DW		 397int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm,
398 unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc)
b94d5230 399{
62232e45 400 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
4b27db7e 401 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
62232e45 402 union acpi_object in_obj, in_buf, *out_obj;
31eca76b 403 const struct nd_cmd_desc *desc = NULL;
62232e45 404 struct device *dev = acpi_desc->dev;
31eca76b 405 struct nd_cmd_pkg *call_pkg = NULL;
62232e45 406 const char *cmd_name, *dimm_name;
31eca76b 407 unsigned long cmd_mask, dsm_mask;
11294d63 408 u32 offset, fw_status = 0;
62232e45 409 acpi_handle handle;
31eca76b 410 unsigned int func;
41c8bdb3 411 const guid_t *guid;
62232e45
DW		 412 int rc, i;
413
ee6581ce
DJ		 414 if (cmd_rc)
415 *cmd_rc = -EINVAL;
31eca76b
DW		 416 func = cmd;
417 if (cmd == ND_CMD_CALL) {
418 call_pkg = buf;
419 func = call_pkg->nd_command;
9edcad53
MX		 420
421 for (i = 0; i < ARRAY_SIZE(call_pkg->nd_reserved2); i++)
422 if (call_pkg->nd_reserved2[i])
423 return -EINVAL;
31eca76b
DW		 424 }
425
62232e45 426 if (nvdimm) {
62232e45
DW		 427 struct acpi_device *adev = nfit_mem->adev;
428
429 if (!adev)
430 return -ENOTTY;
31eca76b
DW		 431 if (call_pkg && nfit_mem->family != call_pkg->nd_family)
432 return -ENOTTY;
433
047fc8a1 434 dimm_name = nvdimm_name(nvdimm);
62232e45 435 cmd_name = nvdimm_cmd_name(cmd);
e3654eca 436 cmd_mask = nvdimm_cmd_mask(nvdimm);
62232e45
DW		 437 dsm_mask = nfit_mem->dsm_mask;
438 desc = nd_cmd_dimm_desc(cmd);
41c8bdb3 439 guid = to_nfit_uuid(nfit_mem->family);
62232e45
DW		 440 handle = adev->handle;
441 } else {
442 struct acpi_device *adev = to_acpi_dev(acpi_desc);
443
444 cmd_name = nvdimm_bus_cmd_name(cmd);
e3654eca 445 cmd_mask = nd_desc->cmd_mask;
31eca76b 446 dsm_mask = cmd_mask;
7db5bb33
JH		 447 if (cmd == ND_CMD_CALL)
448 dsm_mask = nd_desc->bus_dsm_mask;
62232e45 449 desc = nd_cmd_bus_desc(cmd);
41c8bdb3 450 guid = to_nfit_uuid(NFIT_DEV_BUS);
62232e45
DW		 451 handle = adev->handle;
452 dimm_name = "bus";
453 }
454
455 if (!desc || (cmd && (desc->out_num + desc->in_num == 0)))
456 return -ENOTTY;
457
31eca76b 458 if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask))
62232e45
DW		 459 return -ENOTTY;
460
461 in_obj.type = ACPI_TYPE_PACKAGE;
462 in_obj.package.count = 1;
463 in_obj.package.elements = &in_buf;
464 in_buf.type = ACPI_TYPE_BUFFER;
465 in_buf.buffer.pointer = buf;
466 in_buf.buffer.length = 0;
467
468 /* libnvdimm has already validated the input envelope */
469 for (i = 0; i < desc->in_num; i++)
470 in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc,
471 i, buf);
472
31eca76b
DW		 473 if (call_pkg) {
474 /* skip over package wrapper */
475 in_buf.buffer.pointer = (void *) &call_pkg->nd_payload;
476 in_buf.buffer.length = call_pkg->nd_size_in;
477 }
478
b814735f
JT		 479 dev_dbg(dev, "%s cmd: %d: func: %d input length: %d\n",
480 dimm_name, cmd, func, in_buf.buffer.length);
7699a6a3 481 print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4,
31eca76b
DW		 482 in_buf.buffer.pointer,
483 min_t(u32, 256, in_buf.buffer.length), true);
62232e45 484
4b27db7e 485 /* call the BIOS, prefer the named methods over _DSM if available */
6f07f86c
DW		 486 if (nvdimm && cmd == ND_CMD_GET_CONFIG_SIZE
487 && test_bit(NFIT_MEM_LSR, &nfit_mem->flags))
4b27db7e 488 out_obj = acpi_label_info(handle);
6f07f86c
DW		 489 else if (nvdimm && cmd == ND_CMD_GET_CONFIG_DATA
490 && test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) {
4b27db7e
DW		 491 struct nd_cmd_get_config_data_hdr *p = buf;
492
493 out_obj = acpi_label_read(handle, p->in_offset, p->in_length);
0e7f0741 494 } else if (nvdimm && cmd == ND_CMD_SET_CONFIG_DATA
6f07f86c 495 && test_bit(NFIT_MEM_LSW, &nfit_mem->flags)) {
4b27db7e
DW		 496 struct nd_cmd_set_config_hdr *p = buf;
497
498 out_obj = acpi_label_write(handle, p->in_offset, p->in_length,
499 p->in_buf);
11e14270
DW		 500 } else {
501 u8 revid;
502
0e7f0741 503 if (nvdimm)
11e14270
DW		 504 revid = nfit_dsm_revid(nfit_mem->family, func);
505 else
506 revid = 1;
507 out_obj = acpi_evaluate_dsm(handle, guid, revid, func, &in_obj);
508 }
4b27db7e 509
62232e45 510 if (!out_obj) {
b814735f 511 dev_dbg(dev, "%s _DSM failed cmd: %s\n", dimm_name, cmd_name);
62232e45
DW		 512 return -EINVAL;
513 }
514
31eca76b
DW		 515 if (call_pkg) {
516 call_pkg->nd_fw_size = out_obj->buffer.length;
517 memcpy(call_pkg->nd_payload + call_pkg->nd_size_in,
518 out_obj->buffer.pointer,
519 min(call_pkg->nd_fw_size, call_pkg->nd_size_out));
520
521 ACPI_FREE(out_obj);
522 /*
523 * Need to support FW function w/o known size in advance.
524 * Caller can determine required size based upon nd_fw_size.
525 * If we return an error (like elsewhere) then caller wouldn't
526 * be able to rely upon data returned to make calculation.
527 */
ee6581ce
DJ		 528 if (cmd_rc)
529 *cmd_rc = 0;
31eca76b
DW		 530 return 0;
531 }
532
62232e45 533 if (out_obj->package.type != ACPI_TYPE_BUFFER) {
b814735f
JT		 534 dev_dbg(dev, "%s unexpected output object type cmd: %s type: %d\n",
535 dimm_name, cmd_name, out_obj->type);
62232e45
DW		 536 rc = -EINVAL;
537 goto out;
538 }
539
b814735f 540 dev_dbg(dev, "%s cmd: %s output length: %d\n", dimm_name,
7699a6a3
DW		 541 cmd_name, out_obj->buffer.length);
542 print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, 4,
543 out_obj->buffer.pointer,
544 min_t(u32, 128, out_obj->buffer.length), true);
62232e45
DW		 545
546 for (i = 0, offset = 0; i < desc->out_num; i++) {
547 u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf,
efda1b5d
DW		 548 (u32 *) out_obj->buffer.pointer,
549 out_obj->buffer.length - offset);
62232e45
DW		 550
551 if (offset + out_size > out_obj->buffer.length) {
b814735f
JT		 552 dev_dbg(dev, "%s output object underflow cmd: %s field: %d\n",
553 dimm_name, cmd_name, i);
62232e45
DW		 554 break;
555 }
556
557 if (in_buf.buffer.length + offset + out_size > buf_len) {
b814735f
JT		 558 dev_dbg(dev, "%s output overrun cmd: %s field: %d\n",
559 dimm_name, cmd_name, i);
62232e45
DW		 560 rc = -ENXIO;
561 goto out;
562 }
563 memcpy(buf + in_buf.buffer.length + offset,
564 out_obj->buffer.pointer + offset, out_size);
565 offset += out_size;
566 }
11294d63
DW		 567
568 /*
569 * Set fw_status for all the commands with a known format to be
570 * later interpreted by xlat_status().
571 */
0e7f0741
DW		 572 if (i >= 1 && ((!nvdimm && cmd >= ND_CMD_ARS_CAP
573 && cmd <= ND_CMD_CLEAR_ERROR)
574 || (nvdimm && cmd >= ND_CMD_SMART
575 && cmd <= ND_CMD_VENDOR)))
11294d63
DW		 576 fw_status = *(u32 *) out_obj->buffer.pointer;
577
62232e45
DW		 578 if (offset + in_buf.buffer.length < buf_len) {
579 if (i >= 1) {
580 /*
581 * status valid, return the number of bytes left
582 * unfilled in the output buffer
583 */
584 rc = buf_len - offset - in_buf.buffer.length;
aef25338 585 if (cmd_rc)
d6eb270c
DW		 586 *cmd_rc = xlat_status(nvdimm, buf, cmd,
587 fw_status);
62232e45
DW		 588 } else {
589 dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n",
590 __func__, dimm_name, cmd_name, buf_len,
591 offset);
592 rc = -ENXIO;
593 }
2eea6582 594 } else {
62232e45 595 rc = 0;
2eea6582 596 if (cmd_rc)
d6eb270c 597 *cmd_rc = xlat_status(nvdimm, buf, cmd, fw_status);
2eea6582 598 }
62232e45
DW		 599
600 out:
601 ACPI_FREE(out_obj);
602
603 return rc;
b94d5230 604}
a7de92da 605EXPORT_SYMBOL_GPL(acpi_nfit_ctl);
b94d5230
DW		 606
607static const char *spa_type_name(u16 type)
608{
609 static const char *to_name[] = {
610 [NFIT_SPA_VOLATILE] = "volatile",
611 [NFIT_SPA_PM] = "pmem",
612 [NFIT_SPA_DCR] = "dimm-control-region",
613 [NFIT_SPA_BDW] = "block-data-window",
614 [NFIT_SPA_VDISK] = "volatile-disk",
615 [NFIT_SPA_VCD] = "volatile-cd",
616 [NFIT_SPA_PDISK] = "persistent-disk",
617 [NFIT_SPA_PCD] = "persistent-cd",
618
619 };
620
621 if (type > NFIT_SPA_PCD)
622 return "unknown";
623
624 return to_name[type];
625}
626
6839a6d9 627int nfit_spa_type(struct acpi_nfit_system_address *spa)
b94d5230
DW		 628{
629 int i;
630
631 for (i = 0; i < NFIT_UUID_MAX; i++)
41c8bdb3 632 if (guid_equal(to_nfit_uuid(i), (guid_t *)&spa->range_guid))
b94d5230
DW		 633 return i;
634 return -1;
635}
636
637static bool add_spa(struct acpi_nfit_desc *acpi_desc,
20985164 638 struct nfit_table_prev *prev,
b94d5230
DW		 639 struct acpi_nfit_system_address *spa)
640{
641 struct device *dev = acpi_desc->dev;
20985164
VV		 642 struct nfit_spa *nfit_spa;
643
31932041
DW		 644 if (spa->header.length != sizeof(*spa))
645 return false;
646
20985164 647 list_for_each_entry(nfit_spa, &prev->spas, list) {
31932041 648 if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) {
20985164
VV		 649 list_move_tail(&nfit_spa->list, &acpi_desc->spas);
650 return true;
651 }
652 }
b94d5230 653
31932041
DW		 654 nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa),
655 GFP_KERNEL);
b94d5230
DW		 656 if (!nfit_spa)
657 return false;
658 INIT_LIST_HEAD(&nfit_spa->list);
31932041 659 memcpy(nfit_spa->spa, spa, sizeof(*spa));
b94d5230 660 list_add_tail(&nfit_spa->list, &acpi_desc->spas);
b814735f 661 dev_dbg(dev, "spa index: %d type: %s\n",
b94d5230
DW		 662 spa->range_index,
663 spa_type_name(nfit_spa_type(spa)));
664 return true;
665}
666
667static bool add_memdev(struct acpi_nfit_desc *acpi_desc,
20985164 668 struct nfit_table_prev *prev,
b94d5230
DW		 669 struct acpi_nfit_memory_map *memdev)
670{
671 struct device *dev = acpi_desc->dev;
20985164 672 struct nfit_memdev *nfit_memdev;
b94d5230 673
31932041
DW		 674 if (memdev->header.length != sizeof(*memdev))
675 return false;
676
20985164 677 list_for_each_entry(nfit_memdev, &prev->memdevs, list)
31932041 678 if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) {
20985164
VV		 679 list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs);
680 return true;
681 }
682
31932041
DW		 683 nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev),
684 GFP_KERNEL);
b94d5230
DW		 685 if (!nfit_memdev)
686 return false;
687 INIT_LIST_HEAD(&nfit_memdev->list);
31932041 688 memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev));
b94d5230 689 list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs);
b814735f
JT		 690 dev_dbg(dev, "memdev handle: %#x spa: %d dcr: %d flags: %#x\n",
691 memdev->device_handle, memdev->range_index,
caa603aa 692 memdev->region_index, memdev->flags);
b94d5230
DW		 693 return true;
694}
695
23222f8f
TL		 696int nfit_get_smbios_id(u32 device_handle, u16 *flags)
697{
698 struct acpi_nfit_memory_map *memdev;
699 struct acpi_nfit_desc *acpi_desc;
700 struct nfit_mem *nfit_mem;
701
702 mutex_lock(&acpi_desc_lock);
703 list_for_each_entry(acpi_desc, &acpi_descs, list) {
704 mutex_lock(&acpi_desc->init_mutex);
705 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
706 memdev = __to_nfit_memdev(nfit_mem);
707 if (memdev->device_handle == device_handle) {
708 mutex_unlock(&acpi_desc->init_mutex);
709 mutex_unlock(&acpi_desc_lock);
710 *flags = memdev->flags;
711 return memdev->physical_id;
712 }
713 }
714 mutex_unlock(&acpi_desc->init_mutex);
715 }
716 mutex_unlock(&acpi_desc_lock);
717
718 return -ENODEV;
719}
720EXPORT_SYMBOL_GPL(nfit_get_smbios_id);
721
31932041
DW		 722/*
723 * An implementation may provide a truncated control region if no block windows
724 * are defined.
725 */
726static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr)
727{
728 if (dcr->header.length < offsetof(struct acpi_nfit_control_region,
729 window_size))
730 return 0;
731 if (dcr->windows)
732 return sizeof(*dcr);
733 return offsetof(struct acpi_nfit_control_region, window_size);
734}
735
b94d5230 736static bool add_dcr(struct acpi_nfit_desc *acpi_desc,
20985164 737 struct nfit_table_prev *prev,
b94d5230
DW		 738 struct acpi_nfit_control_region *dcr)
739{
740 struct device *dev = acpi_desc->dev;
20985164
VV		 741 struct nfit_dcr *nfit_dcr;
742
31932041
DW		 743 if (!sizeof_dcr(dcr))
744 return false;
745
20985164 746 list_for_each_entry(nfit_dcr, &prev->dcrs, list)
31932041 747 if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) {
20985164
VV		 748 list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs);
749 return true;
750 }
b94d5230 751
31932041
DW		 752 nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr),
753 GFP_KERNEL);
b94d5230
DW		 754 if (!nfit_dcr)
755 return false;
756 INIT_LIST_HEAD(&nfit_dcr->list);
31932041 757 memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr));
b94d5230 758 list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs);
b814735f 759 dev_dbg(dev, "dcr index: %d windows: %d\n",
b94d5230
DW		 760 dcr->region_index, dcr->windows);
761 return true;
762}
763
764static bool add_bdw(struct acpi_nfit_desc *acpi_desc,
20985164 765 struct nfit_table_prev *prev,
b94d5230
DW		 766 struct acpi_nfit_data_region *bdw)
767{
768 struct device *dev = acpi_desc->dev;
20985164
VV		 769 struct nfit_bdw *nfit_bdw;
770
31932041
DW		 771 if (bdw->header.length != sizeof(*bdw))
772 return false;
20985164 773 list_for_each_entry(nfit_bdw, &prev->bdws, list)
31932041 774 if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) {
20985164
VV		 775 list_move_tail(&nfit_bdw->list, &acpi_desc->bdws);
776 return true;
777 }
b94d5230 778
31932041
DW		 779 nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw),
780 GFP_KERNEL);
b94d5230
DW		 781 if (!nfit_bdw)
782 return false;
783 INIT_LIST_HEAD(&nfit_bdw->list);
31932041 784 memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw));
b94d5230 785 list_add_tail(&nfit_bdw->list, &acpi_desc->bdws);
b814735f 786 dev_dbg(dev, "bdw dcr: %d windows: %d\n",
b94d5230
DW		 787 bdw->region_index, bdw->windows);
788 return true;
789}
790
31932041
DW		 791static size_t sizeof_idt(struct acpi_nfit_interleave *idt)
792{
793 if (idt->header.length < sizeof(*idt))
794 return 0;
795 return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1);
796}
797
047fc8a1 798static bool add_idt(struct acpi_nfit_desc *acpi_desc,
20985164 799 struct nfit_table_prev *prev,
047fc8a1
RZ		 800 struct acpi_nfit_interleave *idt)
801{
802 struct device *dev = acpi_desc->dev;
20985164
VV		 803 struct nfit_idt *nfit_idt;
804
31932041
DW		 805 if (!sizeof_idt(idt))
806 return false;
807
808 list_for_each_entry(nfit_idt, &prev->idts, list) {
809 if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt))
810 continue;
811
812 if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) {
20985164
VV		 813 list_move_tail(&nfit_idt->list, &acpi_desc->idts);
814 return true;
815 }
31932041 816 }
047fc8a1 817
31932041
DW		 818 nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt),
819 GFP_KERNEL);
047fc8a1
RZ		 820 if (!nfit_idt)
821 return false;
822 INIT_LIST_HEAD(&nfit_idt->list);
31932041 823 memcpy(nfit_idt->idt, idt, sizeof_idt(idt));
047fc8a1 824 list_add_tail(&nfit_idt->list, &acpi_desc->idts);
b814735f 825 dev_dbg(dev, "idt index: %d num_lines: %d\n",
047fc8a1
RZ		 826 idt->interleave_index, idt->line_count);
827 return true;
828}
829
31932041
DW		 830static size_t sizeof_flush(struct acpi_nfit_flush_address *flush)
831{
832 if (flush->header.length < sizeof(*flush))
833 return 0;
834 return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1);
835}
836
c2ad2954 837static bool add_flush(struct acpi_nfit_desc *acpi_desc,
20985164 838 struct nfit_table_prev *prev,
c2ad2954
RZ		 839 struct acpi_nfit_flush_address *flush)
840{
841 struct device *dev = acpi_desc->dev;
20985164 842 struct nfit_flush *nfit_flush;
c2ad2954 843
31932041
DW		 844 if (!sizeof_flush(flush))
845 return false;
846
847 list_for_each_entry(nfit_flush, &prev->flushes, list) {
848 if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush))
849 continue;
850
851 if (memcmp(nfit_flush->flush, flush,
852 sizeof_flush(flush)) == 0) {
20985164
VV		 853 list_move_tail(&nfit_flush->list, &acpi_desc->flushes);
854 return true;
855 }
31932041 856 }
20985164 857
31932041
DW		 858 nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush)
859 + sizeof_flush(flush), GFP_KERNEL);
c2ad2954
RZ		 860 if (!nfit_flush)
861 return false;
862 INIT_LIST_HEAD(&nfit_flush->list);
31932041 863 memcpy(nfit_flush->flush, flush, sizeof_flush(flush));
c2ad2954 864 list_add_tail(&nfit_flush->list, &acpi_desc->flushes);
b814735f 865 dev_dbg(dev, "nfit_flush handle: %d hint_count: %d\n",
c2ad2954
RZ		 866 flush->device_handle, flush->hint_count);
867 return true;
868}
869
06e8ccda
DJ		 870static bool add_platform_cap(struct acpi_nfit_desc *acpi_desc,
871 struct acpi_nfit_capabilities *pcap)
872{
873 struct device *dev = acpi_desc->dev;
874 u32 mask;
875
876 mask = (1 << (pcap->highest_capability + 1)) - 1;
877 acpi_desc->platform_cap = pcap->capabilities & mask;
b814735f 878 dev_dbg(dev, "cap: %#x\n", acpi_desc->platform_cap);
06e8ccda
DJ		 879 return true;
880}
881
20985164
VV		 882static void *add_table(struct acpi_nfit_desc *acpi_desc,
883 struct nfit_table_prev *prev, void *table, const void *end)
b94d5230
DW		 884{
885 struct device *dev = acpi_desc->dev;
886 struct acpi_nfit_header *hdr;
887 void *err = ERR_PTR(-ENOMEM);
888
889 if (table >= end)
890 return NULL;
891
892 hdr = table;
564d5011
VV		 893 if (!hdr->length) {
894 dev_warn(dev, "found a zero length table '%d' parsing nfit\n",
895 hdr->type);
896 return NULL;
897 }
898
b94d5230
DW		 899 switch (hdr->type) {
900 case ACPI_NFIT_TYPE_SYSTEM_ADDRESS:
20985164 901 if (!add_spa(acpi_desc, prev, table))
b94d5230
DW		 902 return err;
903 break;
904 case ACPI_NFIT_TYPE_MEMORY_MAP:
20985164 905 if (!add_memdev(acpi_desc, prev, table))
b94d5230
DW		 906 return err;
907 break;
908 case ACPI_NFIT_TYPE_CONTROL_REGION:
20985164 909 if (!add_dcr(acpi_desc, prev, table))
b94d5230
DW		 910 return err;
911 break;
912 case ACPI_NFIT_TYPE_DATA_REGION:
20985164 913 if (!add_bdw(acpi_desc, prev, table))
b94d5230
DW		 914 return err;
915 break;
b94d5230 916 case ACPI_NFIT_TYPE_INTERLEAVE:
20985164 917 if (!add_idt(acpi_desc, prev, table))
047fc8a1 918 return err;
b94d5230
DW		 919 break;
920 case ACPI_NFIT_TYPE_FLUSH_ADDRESS:
20985164 921 if (!add_flush(acpi_desc, prev, table))
c2ad2954 922 return err;
b94d5230
DW		 923 break;
924 case ACPI_NFIT_TYPE_SMBIOS:
b814735f 925 dev_dbg(dev, "smbios\n");
b94d5230 926 break;
06e8ccda
DJ		 927 case ACPI_NFIT_TYPE_CAPABILITIES:
928 if (!add_platform_cap(acpi_desc, table))
929 return err;
930 break;
b94d5230
DW		 931 default:
932 dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type);
933 break;
934 }
935
936 return table + hdr->length;
937}
938
939static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc,
940 struct nfit_mem *nfit_mem)
941{
942 u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
943 u16 dcr = nfit_mem->dcr->region_index;
944 struct nfit_spa *nfit_spa;
945
946 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
947 u16 range_index = nfit_spa->spa->range_index;
948 int type = nfit_spa_type(nfit_spa->spa);
949 struct nfit_memdev *nfit_memdev;
950
951 if (type != NFIT_SPA_BDW)
952 continue;
953
954 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
955 if (nfit_memdev->memdev->range_index != range_index)
956 continue;
957 if (nfit_memdev->memdev->device_handle != device_handle)
958 continue;
959 if (nfit_memdev->memdev->region_index != dcr)
960 continue;
961
962 nfit_mem->spa_bdw = nfit_spa->spa;
963 return;
964 }
965 }
966
967 dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n",
968 nfit_mem->spa_dcr->range_index);
969 nfit_mem->bdw = NULL;
970}
971
6697b2cf 972static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc,
b94d5230
DW		 973 struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa)
974{
975 u16 dcr = __to_nfit_memdev(nfit_mem)->region_index;
047fc8a1 976 struct nfit_memdev *nfit_memdev;
b94d5230 977 struct nfit_bdw *nfit_bdw;
047fc8a1
RZ		 978 struct nfit_idt *nfit_idt;
979 u16 idt_idx, range_index;
b94d5230 980
b94d5230
DW		 981 list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) {
982 if (nfit_bdw->bdw->region_index != dcr)
983 continue;
984 nfit_mem->bdw = nfit_bdw->bdw;
985 break;
986 }
987
988 if (!nfit_mem->bdw)
6697b2cf 989 return;
b94d5230
DW		 990
991 nfit_mem_find_spa_bdw(acpi_desc, nfit_mem);
047fc8a1
RZ		 992
993 if (!nfit_mem->spa_bdw)
6697b2cf 994 return;
047fc8a1
RZ		 995
996 range_index = nfit_mem->spa_bdw->range_index;
997 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
998 if (nfit_memdev->memdev->range_index != range_index ||
999 nfit_memdev->memdev->region_index != dcr)
1000 continue;
1001 nfit_mem->memdev_bdw = nfit_memdev->memdev;
1002 idt_idx = nfit_memdev->memdev->interleave_index;
1003 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
1004 if (nfit_idt->idt->interleave_index != idt_idx)
1005 continue;
1006 nfit_mem->idt_bdw = nfit_idt->idt;
1007 break;
1008 }
1009 break;
1010 }
b94d5230
DW		 1011}
1012
1499934d 1013static int __nfit_mem_init(struct acpi_nfit_desc *acpi_desc,
b94d5230
DW		 1014 struct acpi_nfit_system_address *spa)
1015{
1016 struct nfit_mem *nfit_mem, *found;
1017 struct nfit_memdev *nfit_memdev;
1499934d 1018 int type = spa ? nfit_spa_type(spa) : 0;
b94d5230
DW		 1019
1020 switch (type) {
1021 case NFIT_SPA_DCR:
1022 case NFIT_SPA_PM:
1023 break;
1024 default:
1499934d
DW		 1025 if (spa)
1026 return 0;
b94d5230
DW		 1027 }
1028
1499934d
DW		 1029 /*
1030 * This loop runs in two modes, when a dimm is mapped the loop
1031 * adds memdev associations to an existing dimm, or creates a
1032 * dimm. In the unmapped dimm case this loop sweeps for memdev
1033 * instances with an invalid / zero range_index and adds those
1034 * dimms without spa associations.
1035 */
b94d5230 1036 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
ad9ac5e1 1037 struct nfit_flush *nfit_flush;
6697b2cf
DW		 1038 struct nfit_dcr *nfit_dcr;
1039 u32 device_handle;
1040 u16 dcr;
b94d5230 1041
1499934d
DW		 1042 if (spa && nfit_memdev->memdev->range_index != spa->range_index)
1043 continue;
1044 if (!spa && nfit_memdev->memdev->range_index)
b94d5230
DW		 1045 continue;
1046 found = NULL;
1047 dcr = nfit_memdev->memdev->region_index;
6697b2cf 1048 device_handle = nfit_memdev->memdev->device_handle;
b94d5230 1049 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
6697b2cf
DW		 1050 if (__to_nfit_memdev(nfit_mem)->device_handle
1051 == device_handle) {
b94d5230
DW		 1052 found = nfit_mem;
1053 break;
1054 }
1055
1056 if (found)
1057 nfit_mem = found;
1058 else {
1059 nfit_mem = devm_kzalloc(acpi_desc->dev,
1060 sizeof(*nfit_mem), GFP_KERNEL);
1061 if (!nfit_mem)
1062 return -ENOMEM;
1063 INIT_LIST_HEAD(&nfit_mem->list);
8cc6ddfc 1064 nfit_mem->acpi_desc = acpi_desc;
6697b2cf
DW		 1065 list_add(&nfit_mem->list, &acpi_desc->dimms);
1066 }
1067
1068 list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
1069 if (nfit_dcr->dcr->region_index != dcr)
1070 continue;
1071 /*
1072 * Record the control region for the dimm. For
1073 * the ACPI 6.1 case, where there are separate
1074 * control regions for the pmem vs blk
1075 * interfaces, be sure to record the extended
1076 * blk details.
1077 */
1078 if (!nfit_mem->dcr)
1079 nfit_mem->dcr = nfit_dcr->dcr;
1080 else if (nfit_mem->dcr->windows == 0
1081 && nfit_dcr->dcr->windows)
1082 nfit_mem->dcr = nfit_dcr->dcr;
1083 break;
1084 }
1085
ad9ac5e1 1086 list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) {
e5ae3b25
DW		 1087 struct acpi_nfit_flush_address *flush;
1088 u16 i;
1089
ad9ac5e1
DW		 1090 if (nfit_flush->flush->device_handle != device_handle)
1091 continue;
1092 nfit_mem->nfit_flush = nfit_flush;
e5ae3b25 1093 flush = nfit_flush->flush;
a86854d0
KC		 1094 nfit_mem->flush_wpq = devm_kcalloc(acpi_desc->dev,
1095 flush->hint_count,
1096 sizeof(struct resource),
1097 GFP_KERNEL);
e5ae3b25
DW		 1098 if (!nfit_mem->flush_wpq)
1099 return -ENOMEM;
1100 for (i = 0; i < flush->hint_count; i++) {
1101 struct resource *res = &nfit_mem->flush_wpq[i];
1102
1103 res->start = flush->hint_address[i];
1104 res->end = res->start + 8 - 1;
1105 }
ad9ac5e1
DW		 1106 break;
1107 }
1108
6697b2cf
DW		 1109 if (dcr && !nfit_mem->dcr) {
1110 dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n",
1111 spa->range_index, dcr);
1112 return -ENODEV;
b94d5230
DW		 1113 }
1114
1115 if (type == NFIT_SPA_DCR) {
047fc8a1
RZ		 1116 struct nfit_idt *nfit_idt;
1117 u16 idt_idx;
1118
b94d5230
DW		 1119 /* multiple dimms may share a SPA when interleaved */
1120 nfit_mem->spa_dcr = spa;
1121 nfit_mem->memdev_dcr = nfit_memdev->memdev;
047fc8a1
RZ		 1122 idt_idx = nfit_memdev->memdev->interleave_index;
1123 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
1124 if (nfit_idt->idt->interleave_index != idt_idx)
1125 continue;
1126 nfit_mem->idt_dcr = nfit_idt->idt;
1127 break;
1128 }
6697b2cf 1129 nfit_mem_init_bdw(acpi_desc, nfit_mem, spa);
1499934d 1130 } else if (type == NFIT_SPA_PM) {
b94d5230
DW		 1131 /*
1132 * A single dimm may belong to multiple SPA-PM
1133 * ranges, record at least one in addition to
1134 * any SPA-DCR range.
1135 */
1136 nfit_mem->memdev_pmem = nfit_memdev->memdev;
1499934d
DW		 1137 } else
1138 nfit_mem->memdev_dcr = nfit_memdev->memdev;
b94d5230
DW		 1139 }
1140
1141 return 0;
1142}
1143
1144static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b)
1145{
1146 struct nfit_mem *a = container_of(_a, typeof(*a), list);
1147 struct nfit_mem *b = container_of(_b, typeof(*b), list);
1148 u32 handleA, handleB;
1149
1150 handleA = __to_nfit_memdev(a)->device_handle;
1151 handleB = __to_nfit_memdev(b)->device_handle;
1152 if (handleA < handleB)
1153 return -1;
1154 else if (handleA > handleB)
1155 return 1;
1156 return 0;
1157}
1158
1159static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc)
1160{
1161 struct nfit_spa *nfit_spa;
1499934d
DW		 1162 int rc;
1163
b94d5230
DW		 1164
1165 /*
1166 * For each SPA-DCR or SPA-PMEM address range find its
1167 * corresponding MEMDEV(s). From each MEMDEV find the
1168 * corresponding DCR. Then, if we're operating on a SPA-DCR,
1169 * try to find a SPA-BDW and a corresponding BDW that references
1170 * the DCR. Throw it all into an nfit_mem object. Note, that
1171 * BDWs are optional.
1172 */
1173 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
1499934d 1174 rc = __nfit_mem_init(acpi_desc, nfit_spa->spa);
b94d5230
DW		 1175 if (rc)
1176 return rc;
1177 }
1178
1499934d
DW		 1179 /*
1180 * If a DIMM has failed to be mapped into SPA there will be no
1181 * SPA entries above. Find and register all the unmapped DIMMs
1182 * for reporting and recovery purposes.
1183 */
1184 rc = __nfit_mem_init(acpi_desc, NULL);
1185 if (rc)
1186 return rc;
1187
b94d5230
DW		 1188 list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp);
1189
1190 return 0;
1191}
1192
41f95db7
JH		 1193static ssize_t bus_dsm_mask_show(struct device *dev,
1194 struct device_attribute *attr, char *buf)
1195{
1196 struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
1197 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1198
1199 return sprintf(buf, "%#lx\n", nd_desc->bus_dsm_mask);
1200}
1201static struct device_attribute dev_attr_bus_dsm_mask =
1202 __ATTR(dsm_mask, 0444, bus_dsm_mask_show, NULL);
1203
45def22c
DW		 1204static ssize_t revision_show(struct device *dev,
1205 struct device_attribute *attr, char *buf)
1206{
1207 struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
1208 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1209 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1210
6b577c9d 1211 return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision);
45def22c
DW		 1212}
1213static DEVICE_ATTR_RO(revision);
1214
9ffd6350
VV		 1215static ssize_t hw_error_scrub_show(struct device *dev,
1216 struct device_attribute *attr, char *buf)
1217{
1218 struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
1219 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1220 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1221
1222 return sprintf(buf, "%d\n", acpi_desc->scrub_mode);
1223}
1224
1225/*
1226 * The 'hw_error_scrub' attribute can have the following values written to it:
1227 * '0': Switch to the default mode where an exception will only insert
1228 * the address of the memory error into the poison and badblocks lists.
1229 * '1': Enable a full scrub to happen if an exception for a memory error is
1230 * received.
1231 */
1232static ssize_t hw_error_scrub_store(struct device *dev,
1233 struct device_attribute *attr, const char *buf, size_t size)
1234{
1235 struct nvdimm_bus_descriptor *nd_desc;
1236 ssize_t rc;
1237 long val;
1238
1239 rc = kstrtol(buf, 0, &val);
1240 if (rc)
1241 return rc;
1242
1243 device_lock(dev);
1244 nd_desc = dev_get_drvdata(dev);
1245 if (nd_desc) {
1246 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1247
1248 switch (val) {
1249 case HW_ERROR_SCRUB_ON:
1250 acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON;
1251 break;
1252 case HW_ERROR_SCRUB_OFF:
1253 acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF;
1254 break;
1255 default:
1256 rc = -EINVAL;
1257 break;
1258 }
1259 }
1260 device_unlock(dev);
1261 if (rc)
1262 return rc;
1263 return size;
1264}
1265static DEVICE_ATTR_RW(hw_error_scrub);
1266
37b137ff
VV		 1267/*
1268 * This shows the number of full Address Range Scrubs that have been
1269 * completed since driver load time. Userspace can wait on this using
1270 * select/poll etc. A '+' at the end indicates an ARS is in progress
1271 */
1272static ssize_t scrub_show(struct device *dev,
1273 struct device_attribute *attr, char *buf)
1274{
1275 struct nvdimm_bus_descriptor *nd_desc;
1276 ssize_t rc = -ENXIO;
1277
1278 device_lock(dev);
1279 nd_desc = dev_get_drvdata(dev);
1280 if (nd_desc) {
1281 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1282
78727137 1283 mutex_lock(&acpi_desc->init_mutex);
37b137ff 1284 rc = sprintf(buf, "%d%s", acpi_desc->scrub_count,
33cc2c96 1285 acpi_desc->scrub_busy
78727137
DW		 1286 && !acpi_desc->cancel ? "+\n" : "\n");
1287 mutex_unlock(&acpi_desc->init_mutex);
37b137ff
VV		 1288 }
1289 device_unlock(dev);
1290 return rc;
1291}
1292
37b137ff
VV		 1293static ssize_t scrub_store(struct device *dev,
1294 struct device_attribute *attr, const char *buf, size_t size)
1295{
1296 struct nvdimm_bus_descriptor *nd_desc;
1297 ssize_t rc;
1298 long val;
1299
1300 rc = kstrtol(buf, 0, &val);
1301 if (rc)
1302 return rc;
1303 if (val != 1)
1304 return -EINVAL;
1305
1306 device_lock(dev);
1307 nd_desc = dev_get_drvdata(dev);
1308 if (nd_desc) {
1309 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1310
80790039 1311 rc = acpi_nfit_ars_rescan(acpi_desc, 0);
37b137ff
VV		 1312 }
1313 device_unlock(dev);
1314 if (rc)
1315 return rc;
1316 return size;
1317}
1318static DEVICE_ATTR_RW(scrub);
1319
1320static bool ars_supported(struct nvdimm_bus *nvdimm_bus)
1321{
1322 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1323 const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START
1324 | 1 << ND_CMD_ARS_STATUS;
1325
1326 return (nd_desc->cmd_mask & mask) == mask;
1327}
1328
1329static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n)
1330{
1331 struct device *dev = container_of(kobj, struct device, kobj);
1332 struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
1333
1334 if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus))
1335 return 0;
1336 return a->mode;
1337}
1338
45def22c
DW		 1339static struct attribute *acpi_nfit_attributes[] = {
1340 &dev_attr_revision.attr,
37b137ff 1341 &dev_attr_scrub.attr,
9ffd6350 1342 &dev_attr_hw_error_scrub.attr,
41f95db7 1343 &dev_attr_bus_dsm_mask.attr,
45def22c
DW		 1344 NULL,
1345};
1346
5e93746f 1347static const struct attribute_group acpi_nfit_attribute_group = {
45def22c
DW		 1348 .name = "nfit",
1349 .attrs = acpi_nfit_attributes,
37b137ff 1350 .is_visible = nfit_visible,
45def22c
DW		 1351};
1352
a61fe6f7 1353static const struct attribute_group *acpi_nfit_attribute_groups[] = {
45def22c
DW		 1354 &nvdimm_bus_attribute_group,
1355 &acpi_nfit_attribute_group,
1356 NULL,
1357};
1358
e6dfb2de
DW		 1359static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev)
1360{
1361 struct nvdimm *nvdimm = to_nvdimm(dev);
1362 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1363
1364 return __to_nfit_memdev(nfit_mem);
1365}
1366
1367static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev)
1368{
1369 struct nvdimm *nvdimm = to_nvdimm(dev);
1370 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1371
1372 return nfit_mem->dcr;
1373}
1374
1375static ssize_t handle_show(struct device *dev,
1376 struct device_attribute *attr, char *buf)
1377{
1378 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
1379
1380 return sprintf(buf, "%#x\n", memdev->device_handle);
1381}
1382static DEVICE_ATTR_RO(handle);
1383
1384static ssize_t phys_id_show(struct device *dev,
1385 struct device_attribute *attr, char *buf)
1386{
1387 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
1388
1389 return sprintf(buf, "%#x\n", memdev->physical_id);
1390}
1391static DEVICE_ATTR_RO(phys_id);
1392
1393static ssize_t vendor_show(struct device *dev,
1394 struct device_attribute *attr, char *buf)
1395{
1396 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
1397
5ad9a7fd 1398 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id));
e6dfb2de
DW		 1399}
1400static DEVICE_ATTR_RO(vendor);
1401
1402static ssize_t rev_id_show(struct device *dev,
1403 struct device_attribute *attr, char *buf)
1404{
1405 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
1406
5ad9a7fd 1407 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id));
e6dfb2de
DW		 1408}
1409static DEVICE_ATTR_RO(rev_id);
1410
1411static ssize_t device_show(struct device *dev,
1412 struct device_attribute *attr, char *buf)
1413{
1414 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
1415
5ad9a7fd 1416 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id));
e6dfb2de
DW		 1417}
1418static DEVICE_ATTR_RO(device);
1419
6ca72085
DW		 1420static ssize_t subsystem_vendor_show(struct device *dev,
1421 struct device_attribute *attr, char *buf)
1422{
1423 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
1424
1425 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id));
1426}
1427static DEVICE_ATTR_RO(subsystem_vendor);
1428
1429static ssize_t subsystem_rev_id_show(struct device *dev,
1430 struct device_attribute *attr, char *buf)
1431{
1432 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
1433
1434 return sprintf(buf, "0x%04x\n",
1435 be16_to_cpu(dcr->subsystem_revision_id));
1436}
1437static DEVICE_ATTR_RO(subsystem_rev_id);
1438
1439static ssize_t subsystem_device_show(struct device *dev,
1440 struct device_attribute *attr, char *buf)
1441{
1442 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
1443
1444 return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id));
1445}
1446static DEVICE_ATTR_RO(subsystem_device);
1447
8cc6ddfc
DW		 1448static int num_nvdimm_formats(struct nvdimm *nvdimm)
1449{
1450 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1451 int formats = 0;
1452
1453 if (nfit_mem->memdev_pmem)
1454 formats++;
1455 if (nfit_mem->memdev_bdw)
1456 formats++;
1457 return formats;
1458}
1459
e6dfb2de
DW		 1460static ssize_t format_show(struct device *dev,
1461 struct device_attribute *attr, char *buf)
1462{
1463 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
1464
1bcbf42d 1465 return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code));
e6dfb2de
DW		 1466}
1467static DEVICE_ATTR_RO(format);
1468
8cc6ddfc
DW		 1469static ssize_t format1_show(struct device *dev,
1470 struct device_attribute *attr, char *buf)
1471{
1472 u32 handle;
1473 ssize_t rc = -ENXIO;
1474 struct nfit_mem *nfit_mem;
1475 struct nfit_memdev *nfit_memdev;
1476 struct acpi_nfit_desc *acpi_desc;
1477 struct nvdimm *nvdimm = to_nvdimm(dev);
1478 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
1479
1480 nfit_mem = nvdimm_provider_data(nvdimm);
1481 acpi_desc = nfit_mem->acpi_desc;
1482 handle = to_nfit_memdev(dev)->device_handle;
1483
1484 /* assumes DIMMs have at most 2 published interface codes */
1485 mutex_lock(&acpi_desc->init_mutex);
1486 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
1487 struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
1488 struct nfit_dcr *nfit_dcr;
1489
1490 if (memdev->device_handle != handle)
1491 continue;
1492
1493 list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
1494 if (nfit_dcr->dcr->region_index != memdev->region_index)
1495 continue;
1496 if (nfit_dcr->dcr->code == dcr->code)
1497 continue;
1bcbf42d
DW		 1498 rc = sprintf(buf, "0x%04x\n",
1499 le16_to_cpu(nfit_dcr->dcr->code));
8cc6ddfc
DW		 1500 break;
1501 }
1502 if (rc != ENXIO)
1503 break;
1504 }
1505 mutex_unlock(&acpi_desc->init_mutex);
1506 return rc;
1507}
1508static DEVICE_ATTR_RO(format1);
1509
1510static ssize_t formats_show(struct device *dev,
1511 struct device_attribute *attr, char *buf)
1512{
1513 struct nvdimm *nvdimm = to_nvdimm(dev);
1514
1515 return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm));
1516}
1517static DEVICE_ATTR_RO(formats);
1518
e6dfb2de
DW		 1519static ssize_t serial_show(struct device *dev,
1520 struct device_attribute *attr, char *buf)
1521{
1522 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
1523
5ad9a7fd 1524 return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number));
e6dfb2de
DW		 1525}
1526static DEVICE_ATTR_RO(serial);
1527
a94e3fbe
DW		 1528static ssize_t family_show(struct device *dev,
1529 struct device_attribute *attr, char *buf)
1530{
1531 struct nvdimm *nvdimm = to_nvdimm(dev);
1532 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1533
1534 if (nfit_mem->family < 0)
1535 return -ENXIO;
1536 return sprintf(buf, "%d\n", nfit_mem->family);
1537}
1538static DEVICE_ATTR_RO(family);
1539
1540static ssize_t dsm_mask_show(struct device *dev,
1541 struct device_attribute *attr, char *buf)
1542{
1543 struct nvdimm *nvdimm = to_nvdimm(dev);
1544 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1545
1546 if (nfit_mem->family < 0)
1547 return -ENXIO;
1548 return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask);
1549}
1550static DEVICE_ATTR_RO(dsm_mask);
1551
58138820
DW		 1552static ssize_t flags_show(struct device *dev,
1553 struct device_attribute *attr, char *buf)
1554{
0ead1118
DW		 1555 struct nvdimm *nvdimm = to_nvdimm(dev);
1556 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1557 u16 flags = __to_nfit_memdev(nfit_mem)->flags;
1558
1559 if (test_bit(NFIT_MEM_DIRTY, &nfit_mem->flags))
1560 flags |= ACPI_NFIT_MEM_FLUSH_FAILED;
58138820 1561
ffab9385 1562 return sprintf(buf, "%s%s%s%s%s%s%s\n",
402bae59
TK		 1563 flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "",
1564 flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "",
1565 flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "",
ca321d1c 1566 flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "",
ffab9385
DW		 1567 flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "",
1568 flags & ACPI_NFIT_MEM_MAP_FAILED ? "map_fail " : "",
1569 flags & ACPI_NFIT_MEM_HEALTH_ENABLED ? "smart_notify " : "");
58138820
DW		 1570}
1571static DEVICE_ATTR_RO(flags);
1572
38a879ba
TK		 1573static ssize_t id_show(struct device *dev,
1574 struct device_attribute *attr, char *buf)
1575{
1576 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
1577
1578 if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID)
1579 return sprintf(buf, "%04x-%02x-%04x-%08x\n",
1580 be16_to_cpu(dcr->vendor_id),
1581 dcr->manufacturing_location,
1582 be16_to_cpu(dcr->manufacturing_date),
1583 be32_to_cpu(dcr->serial_number));
1584 else
1585 return sprintf(buf, "%04x-%08x\n",
1586 be16_to_cpu(dcr->vendor_id),
1587 be32_to_cpu(dcr->serial_number));
1588}
1589static DEVICE_ATTR_RO(id);
1590
0ead1118
DW		 1591static ssize_t dirty_shutdown_show(struct device *dev,
1592 struct device_attribute *attr, char *buf)
1593{
1594 struct nvdimm *nvdimm = to_nvdimm(dev);
1595 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
1596
1597 return sprintf(buf, "%d\n", nfit_mem->dirty_shutdown);
1598}
1599static DEVICE_ATTR_RO(dirty_shutdown);
1600
e6dfb2de
DW		 1601static struct attribute *acpi_nfit_dimm_attributes[] = {
1602 &dev_attr_handle.attr,
1603 &dev_attr_phys_id.attr,
1604 &dev_attr_vendor.attr,
1605 &dev_attr_device.attr,
6ca72085
DW		 1606 &dev_attr_rev_id.attr,
1607 &dev_attr_subsystem_vendor.attr,
1608 &dev_attr_subsystem_device.attr,
1609 &dev_attr_subsystem_rev_id.attr,
e6dfb2de 1610 &dev_attr_format.attr,
8cc6ddfc
DW		 1611 &dev_attr_formats.attr,
1612 &dev_attr_format1.attr,
e6dfb2de 1613 &dev_attr_serial.attr,
58138820 1614 &dev_attr_flags.attr,
38a879ba 1615 &dev_attr_id.attr,
a94e3fbe
DW		 1616 &dev_attr_family.attr,
1617 &dev_attr_dsm_mask.attr,
0ead1118 1618 &dev_attr_dirty_shutdown.attr,
e6dfb2de
DW		 1619 NULL,
1620};
1621
1622static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj,
1623 struct attribute *a, int n)
1624{
1625 struct device *dev = container_of(kobj, struct device, kobj);
8cc6ddfc 1626 struct nvdimm *nvdimm = to_nvdimm(dev);
0ead1118 1627 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
e6dfb2de 1628
1499934d
DW		 1629 if (!to_nfit_dcr(dev)) {
1630 /* Without a dcr only the memdev attributes can be surfaced */
1631 if (a == &dev_attr_handle.attr || a == &dev_attr_phys_id.attr
1632 || a == &dev_attr_flags.attr
1633 || a == &dev_attr_family.attr
1634 || a == &dev_attr_dsm_mask.attr)
1635 return a->mode;
8cc6ddfc 1636 return 0;
1499934d
DW		 1637 }
1638
8cc6ddfc 1639 if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1)
e6dfb2de 1640 return 0;
0ead1118
DW		 1641
1642 if (!test_bit(NFIT_MEM_DIRTY_COUNT, &nfit_mem->flags)
1643 && a == &dev_attr_dirty_shutdown.attr)
1644 return 0;
1645
8cc6ddfc 1646 return a->mode;
e6dfb2de
DW		 1647}
1648
5e93746f 1649static const struct attribute_group acpi_nfit_dimm_attribute_group = {
e6dfb2de
DW		 1650 .name = "nfit",
1651 .attrs = acpi_nfit_dimm_attributes,
1652 .is_visible = acpi_nfit_dimm_attr_visible,
1653};
1654
1655static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = {
62232e45 1656 &nvdimm_attribute_group,
4d88a97a 1657 &nd_device_attribute_group,
e6dfb2de
DW		 1658 &acpi_nfit_dimm_attribute_group,
1659 NULL,
1660};
1661
1662static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc,
1663 u32 device_handle)
1664{
1665 struct nfit_mem *nfit_mem;
1666
1667 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
1668 if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle)
1669 return nfit_mem->nvdimm;
1670
1671 return NULL;
1672}
1673
231bf117 1674void __acpi_nvdimm_notify(struct device *dev, u32 event)
ba9c8dd3
DW		 1675{
1676 struct nfit_mem *nfit_mem;
1677 struct acpi_nfit_desc *acpi_desc;
1678
b814735f 1679 dev_dbg(dev->parent, "%s: event: %d\n", dev_name(dev),
ba9c8dd3
DW		 1680 event);
1681
1682 if (event != NFIT_NOTIFY_DIMM_HEALTH) {
1683 dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev),
1684 event);
1685 return;
1686 }
1687
1688 acpi_desc = dev_get_drvdata(dev->parent);
1689 if (!acpi_desc)
1690 return;
1691
1692 /*
1693 * If we successfully retrieved acpi_desc, then we know nfit_mem data
1694 * is still valid.
1695 */
1696 nfit_mem = dev_get_drvdata(dev);
1697 if (nfit_mem && nfit_mem->flags_attr)
1698 sysfs_notify_dirent(nfit_mem->flags_attr);
1699}
231bf117 1700EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify);
ba9c8dd3
DW		 1701
1702static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data)
1703{
1704 struct acpi_device *adev = data;
1705 struct device *dev = &adev->dev;
1706
1707 device_lock(dev->parent);
1708 __acpi_nvdimm_notify(dev, event);
1709 device_unlock(dev->parent);
1710}
1711
466d1493
DW		 1712static bool acpi_nvdimm_has_method(struct acpi_device *adev, char *method)
1713{
1714 acpi_handle handle;
1715 acpi_status status;
1716
1717 status = acpi_get_handle(adev->handle, method, &handle);
1718
1719 if (ACPI_SUCCESS(status))
1720 return true;
1721 return false;
1722}
1723
0ead1118
DW		 1724static void nfit_intel_shutdown_status(struct nfit_mem *nfit_mem)
1725{
1726 struct nd_intel_smart smart = { 0 };
1727 union acpi_object in_buf = {
1728 .type = ACPI_TYPE_BUFFER,
1729 .buffer.pointer = (char *) &smart,
1730 .buffer.length = sizeof(smart),
1731 };
1732 union acpi_object in_obj = {
1733 .type = ACPI_TYPE_PACKAGE,
1734 .package.count = 1,
1735 .package.elements = &in_buf,
1736 };
1737 const u8 func = ND_INTEL_SMART;
1738 const guid_t *guid = to_nfit_uuid(nfit_mem->family);
1739 u8 revid = nfit_dsm_revid(nfit_mem->family, func);
1740 struct acpi_device *adev = nfit_mem->adev;
1741 acpi_handle handle = adev->handle;
1742 union acpi_object *out_obj;
1743
1744 if ((nfit_mem->dsm_mask & (1 << func)) == 0)
1745 return;
1746
1747 out_obj = acpi_evaluate_dsm(handle, guid, revid, func, &in_obj);
1748 if (!out_obj)
1749 return;
1750
1751 if (smart.flags & ND_INTEL_SMART_SHUTDOWN_VALID) {
1752 if (smart.shutdown_state)
1753 set_bit(NFIT_MEM_DIRTY, &nfit_mem->flags);
1754 }
1755
1756 if (smart.flags & ND_INTEL_SMART_SHUTDOWN_COUNT_VALID) {
1757 set_bit(NFIT_MEM_DIRTY_COUNT, &nfit_mem->flags);
1758 nfit_mem->dirty_shutdown = smart.shutdown_count;
1759 }
1760 ACPI_FREE(out_obj);
1761}
1762
1763static void populate_shutdown_status(struct nfit_mem *nfit_mem)
1764{
1765 /*
1766 * For DIMMs that provide a dynamic facility to retrieve a
1767 * dirty-shutdown status and/or a dirty-shutdown count, cache
1768 * these values in nfit_mem.
1769 */
1770 if (nfit_mem->family == NVDIMM_FAMILY_INTEL)
1771 nfit_intel_shutdown_status(nfit_mem);
1772}
1773
62232e45
DW		 1774static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
1775 struct nfit_mem *nfit_mem, u32 device_handle)
1776{
1777 struct acpi_device *adev, *adev_dimm;
1778 struct device *dev = acpi_desc->dev;
099b07a2 1779 unsigned long dsm_mask, label_mask;
41c8bdb3 1780 const guid_t *guid;
60e95f43 1781 int i;
ba650cfc 1782 int family = -1;
62232e45 1783
e3654eca
DW		 1784 /* nfit test assumes 1:1 relationship between commands and dsms */
1785 nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en;
31eca76b 1786 nfit_mem->family = NVDIMM_FAMILY_INTEL;
62232e45
DW		 1787 adev = to_acpi_dev(acpi_desc);
1788 if (!adev)
1789 return 0;
1790
1791 adev_dimm = acpi_find_child_device(adev, device_handle, false);
1792 nfit_mem->adev = adev_dimm;
1793 if (!adev_dimm) {
1794 dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n",
1795 device_handle);
4d88a97a 1796 return force_enable_dimms ? 0 : -ENODEV;
62232e45
DW		 1797 }
1798
ba9c8dd3
DW		 1799 if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle,
1800 ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) {
1801 dev_err(dev, "%s: notification registration failed\n",
1802 dev_name(&adev_dimm->dev));
1803 return -ENXIO;
1804 }
adf68957
DW		 1805 /*
1806 * Record nfit_mem for the notification path to track back to
1807 * the nfit sysfs attributes for this dimm device object.
1808 */
1809 dev_set_drvdata(&adev_dimm->dev, nfit_mem);
ba9c8dd3 1810
31eca76b 1811 /*
e02fb726 1812 * Until standardization materializes we need to consider 4
a7225598 1813 * different command sets. Note, that checking for function0 (bit0)
41c8bdb3 1814 * tells us if any commands are reachable through this GUID.
31eca76b 1815 */
11e14270 1816 for (i = 0; i <= NVDIMM_FAMILY_MAX; i++)
a7225598 1817 if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1))
ba650cfc
LK		 1818 if (family < 0 || i == default_dsm_family)
1819 family = i;
31eca76b
DW		 1820
1821 /* limit the supported commands to those that are publicly documented */
ba650cfc 1822 nfit_mem->family = family;
095ab4b3
LK		 1823 if (override_dsm_mask && !disable_vendor_specific)
1824 dsm_mask = override_dsm_mask;
1825 else if (nfit_mem->family == NVDIMM_FAMILY_INTEL) {
11e14270 1826 dsm_mask = NVDIMM_INTEL_CMDMASK;
87554098
DW		 1827 if (disable_vendor_specific)
1828 dsm_mask &= ~(1 << ND_CMD_VENDOR);
e02fb726 1829 } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) {
31eca76b 1830 dsm_mask = 0x1c3c76;
e02fb726 1831 } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) {
31eca76b 1832 dsm_mask = 0x1fe;
87554098
DW		 1833 if (disable_vendor_specific)
1834 dsm_mask &= ~(1 << 8);
e02fb726 1835 } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) {
1836 dsm_mask = 0xffffffff;
87554098 1837 } else {
a7225598 1838 dev_dbg(dev, "unknown dimm command family\n");
31eca76b 1839 nfit_mem->family = -1;
a7225598
DW		 1840 /* DSMs are optional, continue loading the driver... */
1841 return 0;
31eca76b
DW		 1842 }
1843
41c8bdb3 1844 guid = to_nfit_uuid(nfit_mem->family);
31eca76b 1845 for_each_set_bit(i, &dsm_mask, BITS_PER_LONG)
11e14270
DW		 1846 if (acpi_check_dsm(adev_dimm->handle, guid,
1847 nfit_dsm_revid(nfit_mem->family, i),
1848 1ULL << i))
62232e45
DW		 1849 set_bit(i, &nfit_mem->dsm_mask);
1850
099b07a2
DW		 1851 /*
1852 * Prefer the NVDIMM_FAMILY_INTEL label read commands if present
1853 * due to their better semantics handling locked capacity.
1854 */
1855 label_mask = 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA
1856 | 1 << ND_CMD_SET_CONFIG_DATA;
1857 if (family == NVDIMM_FAMILY_INTEL
1858 && (dsm_mask & label_mask) == label_mask)
1859 return 0;
1860
466d1493
DW		 1861 if (acpi_nvdimm_has_method(adev_dimm, "_LSI")
1862 && acpi_nvdimm_has_method(adev_dimm, "_LSR")) {
4b27db7e 1863 dev_dbg(dev, "%s: has _LSR\n", dev_name(&adev_dimm->dev));
6f07f86c 1864 set_bit(NFIT_MEM_LSR, &nfit_mem->flags);
4b27db7e
DW		 1865 }
1866
6f07f86c
DW		 1867 if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags)
1868 && acpi_nvdimm_has_method(adev_dimm, "_LSW")) {
4b27db7e 1869 dev_dbg(dev, "%s: has _LSW\n", dev_name(&adev_dimm->dev));
6f07f86c 1870 set_bit(NFIT_MEM_LSW, &nfit_mem->flags);
4b27db7e
DW		 1871 }
1872
0ead1118
DW		 1873 populate_shutdown_status(nfit_mem);
1874
60e95f43 1875 return 0;
62232e45
DW		 1876}
1877
ba9c8dd3
DW		 1878static void shutdown_dimm_notify(void *data)
1879{
1880 struct acpi_nfit_desc *acpi_desc = data;
1881 struct nfit_mem *nfit_mem;
1882
1883 mutex_lock(&acpi_desc->init_mutex);
1884 /*
1885 * Clear out the nfit_mem->flags_attr and shut down dimm event
1886 * notifications.
1887 */
1888 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
231bf117
DW		 1889 struct acpi_device *adev_dimm = nfit_mem->adev;
1890
ba9c8dd3
DW		 1891 if (nfit_mem->flags_attr) {
1892 sysfs_put(nfit_mem->flags_attr);
1893 nfit_mem->flags_attr = NULL;
1894 }
adf68957 1895 if (adev_dimm) {
231bf117
DW		 1896 acpi_remove_notify_handler(adev_dimm->handle,
1897 ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify);
adf68957
DW		 1898 dev_set_drvdata(&adev_dimm->dev, NULL);
1899 }
ba9c8dd3
DW		 1900 }
1901 mutex_unlock(&acpi_desc->init_mutex);
1902}
1903
e6dfb2de
DW		 1904static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc)
1905{
1906 struct nfit_mem *nfit_mem;
ba9c8dd3
DW		 1907 int dimm_count = 0, rc;
1908 struct nvdimm *nvdimm;
e6dfb2de
DW		 1909
1910 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
e5ae3b25 1911 struct acpi_nfit_flush_address *flush;
31eca76b 1912 unsigned long flags = 0, cmd_mask;
caa603aa 1913 struct nfit_memdev *nfit_memdev;
e6dfb2de 1914 u32 device_handle;
58138820 1915 u16 mem_flags;
e6dfb2de
DW		 1916
1917 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
1918 nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle);
1919 if (nvdimm) {
20985164 1920 dimm_count++;
e6dfb2de
DW		 1921 continue;
1922 }
1923
1924 if (nfit_mem->bdw && nfit_mem->memdev_pmem)
8f078b38 1925 set_bit(NDD_ALIASING, &flags);
e6dfb2de 1926
caa603aa
DW		 1927 /* collate flags across all memdevs for this dimm */
1928 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
1929 struct acpi_nfit_memory_map *dimm_memdev;
1930
1931 dimm_memdev = __to_nfit_memdev(nfit_mem);
1932 if (dimm_memdev->device_handle
1933 != nfit_memdev->memdev->device_handle)
1934 continue;
1935 dimm_memdev->flags |= nfit_memdev->memdev->flags;
1936 }
1937
58138820 1938 mem_flags = __to_nfit_memdev(nfit_mem)->flags;
ca321d1c 1939 if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED)
8f078b38 1940 set_bit(NDD_UNARMED, &flags);
58138820 1941
62232e45
DW		 1942 rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle);
1943 if (rc)
1944 continue;
1945
e3654eca 1946 /*
31eca76b
DW		 1947 * TODO: provide translation for non-NVDIMM_FAMILY_INTEL
1948 * devices (i.e. from nd_cmd to acpi_dsm) to standardize the
1949 * userspace interface.
e3654eca 1950 */
31eca76b 1951 cmd_mask = 1UL << ND_CMD_CALL;
b9b1504d
DW		 1952 if (nfit_mem->family == NVDIMM_FAMILY_INTEL) {
1953 /*
1954 * These commands have a 1:1 correspondence
1955 * between DSM payload and libnvdimm ioctl
1956 * payload format.
1957 */
1958 cmd_mask |= nfit_mem->dsm_mask & NVDIMM_STANDARD_CMDMASK;
1959 }
31eca76b 1960
6f07f86c 1961 if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) {
4b27db7e 1962 set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask);
4b27db7e 1963 set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask);
466d1493 1964 }
6f07f86c 1965 if (test_bit(NFIT_MEM_LSW, &nfit_mem->flags))
4b27db7e
DW		 1966 set_bit(ND_CMD_SET_CONFIG_DATA, &cmd_mask);
1967
e5ae3b25
DW		 1968 flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush
1969 : NULL;
e6dfb2de 1970 nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem,
62232e45 1971 acpi_nfit_dimm_attribute_groups,
e5ae3b25
DW		 1972 flags, cmd_mask, flush ? flush->hint_count : 0,
1973 nfit_mem->flush_wpq);
e6dfb2de
DW		 1974 if (!nvdimm)
1975 return -ENOMEM;
1976
1977 nfit_mem->nvdimm = nvdimm;
4d88a97a 1978 dimm_count++;
58138820
DW		 1979
1980 if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0)
1981 continue;
1982
1499934d 1983 dev_info(acpi_desc->dev, "%s flags:%s%s%s%s%s\n",
58138820 1984 nvdimm_name(nvdimm),
402bae59
TK		 1985 mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "",
1986 mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"",
1987 mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "",
1499934d
DW		 1988 mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "",
1989 mem_flags & ACPI_NFIT_MEM_MAP_FAILED ? " map_fail" : "");
58138820 1990
e6dfb2de
DW		 1991 }
1992
ba9c8dd3
DW		 1993 rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count);
1994 if (rc)
1995 return rc;
1996
1997 /*
1998 * Now that dimms are successfully registered, and async registration
1999 * is flushed, attempt to enable event notification.
2000 */
2001 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
2002 struct kernfs_node *nfit_kernfs;
2003
2004 nvdimm = nfit_mem->nvdimm;
23fbd7c7
TK		 2005 if (!nvdimm)
2006 continue;
2007
ba9c8dd3
DW		 2008 nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit");
2009 if (nfit_kernfs)
2010 nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs,
2011 "flags");
2012 sysfs_put(nfit_kernfs);
2013 if (!nfit_mem->flags_attr)
2014 dev_warn(acpi_desc->dev, "%s: notifications disabled\n",
2015 nvdimm_name(nvdimm));
2016 }
2017
2018 return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify,
2019 acpi_desc);
e6dfb2de
DW		 2020}
2021
7db5bb33
JH		 2022/*
2023 * These constants are private because there are no kernel consumers of
2024 * these commands.
2025 */
2026enum nfit_aux_cmds {
2027 NFIT_CMD_TRANSLATE_SPA = 5,
2028 NFIT_CMD_ARS_INJECT_SET = 7,
2029 NFIT_CMD_ARS_INJECT_CLEAR = 8,
2030 NFIT_CMD_ARS_INJECT_GET = 9,
2031};
2032
62232e45
DW		 2033static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc)
2034{
2035 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
41c8bdb3 2036 const guid_t *guid = to_nfit_uuid(NFIT_DEV_BUS);
62232e45 2037 struct acpi_device *adev;
7db5bb33 2038 unsigned long dsm_mask;
62232e45
DW		 2039 int i;
2040
e3654eca 2041 nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en;
b37b3fd3 2042 nd_desc->bus_dsm_mask = acpi_desc->bus_nfit_cmd_force_en;
62232e45
DW		 2043 adev = to_acpi_dev(acpi_desc);
2044 if (!adev)
2045 return;
2046
d4f32367 2047 for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++)
94116f81 2048 if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i))
e3654eca 2049 set_bit(i, &nd_desc->cmd_mask);
37d74841 2050 set_bit(ND_CMD_CALL, &nd_desc->cmd_mask);
7db5bb33
JH		 2051
2052 dsm_mask =
2053 (1 << ND_CMD_ARS_CAP) |
2054 (1 << ND_CMD_ARS_START) |
2055 (1 << ND_CMD_ARS_STATUS) |
2056 (1 << ND_CMD_CLEAR_ERROR) |
2057 (1 << NFIT_CMD_TRANSLATE_SPA) |
2058 (1 << NFIT_CMD_ARS_INJECT_SET) |
2059 (1 << NFIT_CMD_ARS_INJECT_CLEAR) |
2060 (1 << NFIT_CMD_ARS_INJECT_GET);
2061 for_each_set_bit(i, &dsm_mask, BITS_PER_LONG)
2062 if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i))
2063 set_bit(i, &nd_desc->bus_dsm_mask);
62232e45
DW		 2064}
2065
1f7df6f8
DW		 2066static ssize_t range_index_show(struct device *dev,
2067 struct device_attribute *attr, char *buf)
2068{
2069 struct nd_region *nd_region = to_nd_region(dev);
2070 struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region);
2071
2072 return sprintf(buf, "%d\n", nfit_spa->spa->range_index);
2073}
2074static DEVICE_ATTR_RO(range_index);
2075
2076static struct attribute *acpi_nfit_region_attributes[] = {
2077 &dev_attr_range_index.attr,
2078 NULL,
2079};
2080
5e93746f 2081static const struct attribute_group acpi_nfit_region_attribute_group = {
1f7df6f8
DW		 2082 .name = "nfit",
2083 .attrs = acpi_nfit_region_attributes,
2084};
2085
2086static const struct attribute_group *acpi_nfit_region_attribute_groups[] = {
2087 &nd_region_attribute_group,
2088 &nd_mapping_attribute_group,
3d88002e 2089 &nd_device_attribute_group,
74ae66c3 2090 &nd_numa_attribute_group,
1f7df6f8
DW		 2091 &acpi_nfit_region_attribute_group,
2092 NULL,
2093};
2094
eaf96153
DW		 2095/* enough info to uniquely specify an interleave set */
2096struct nfit_set_info {
2097 struct nfit_set_info_map {
2098 u64 region_offset;
2099 u32 serial_number;
2100 u32 pad;
2101 } mapping[0];
2102};
2103
c12c48ce
DW		 2104struct nfit_set_info2 {
2105 struct nfit_set_info_map2 {
2106 u64 region_offset;
2107 u32 serial_number;
2108 u16 vendor_id;
2109 u16 manufacturing_date;
2110 u8 manufacturing_location;
2111 u8 reserved[31];
2112 } mapping[0];
2113};
2114
eaf96153
DW		 2115static size_t sizeof_nfit_set_info(int num_mappings)
2116{
2117 return sizeof(struct nfit_set_info)
2118 + num_mappings * sizeof(struct nfit_set_info_map);
2119}
2120
c12c48ce
DW		 2121static size_t sizeof_nfit_set_info2(int num_mappings)
2122{
2123 return sizeof(struct nfit_set_info2)
2124 + num_mappings * sizeof(struct nfit_set_info_map2);
2125}
2126
86ef58a4 2127static int cmp_map_compat(const void *m0, const void *m1)
eaf96153
DW		 2128{
2129 const struct nfit_set_info_map *map0 = m0;
2130 const struct nfit_set_info_map *map1 = m1;
2131
2132 return memcmp(&map0->region_offset, &map1->region_offset,
2133 sizeof(u64));
2134}
2135
86ef58a4
DW		 2136static int cmp_map(const void *m0, const void *m1)
2137{
2138 const struct nfit_set_info_map *map0 = m0;
2139 const struct nfit_set_info_map *map1 = m1;
2140
b03b99a3
DW		 2141 if (map0->region_offset < map1->region_offset)
2142 return -1;
2143 else if (map0->region_offset > map1->region_offset)
2144 return 1;
2145 return 0;
86ef58a4
DW		 2146}
2147
c12c48ce
DW		 2148static int cmp_map2(const void *m0, const void *m1)
2149{
2150 const struct nfit_set_info_map2 *map0 = m0;
2151 const struct nfit_set_info_map2 *map1 = m1;
2152
2153 if (map0->region_offset < map1->region_offset)
2154 return -1;
2155 else if (map0->region_offset > map1->region_offset)
2156 return 1;
2157 return 0;
2158}
2159
eaf96153
DW		 2160/* Retrieve the nth entry referencing this spa */
2161static struct acpi_nfit_memory_map *memdev_from_spa(
2162 struct acpi_nfit_desc *acpi_desc, u16 range_index, int n)
2163{
2164 struct nfit_memdev *nfit_memdev;
2165
2166 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list)
2167 if (nfit_memdev->memdev->range_index == range_index)
2168 if (n-- == 0)
2169 return nfit_memdev->memdev;
2170 return NULL;
2171}
2172
2173static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc,
2174 struct nd_region_desc *ndr_desc,
2175 struct acpi_nfit_system_address *spa)
2176{
eaf96153
DW		 2177 struct device *dev = acpi_desc->dev;
2178 struct nd_interleave_set *nd_set;
2179 u16 nr = ndr_desc->num_mappings;
c12c48ce 2180 struct nfit_set_info2 *info2;
eaf96153 2181 struct nfit_set_info *info;
8f2bc243 2182 int i;
eaf96153 2183
faec6f8a
DW		 2184 nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
2185 if (!nd_set)
2186 return -ENOMEM;
2187 ndr_desc->nd_set = nd_set;
2188 guid_copy(&nd_set->type_guid, (guid_t *) spa->range_guid);
2189
eaf96153
DW		 2190 info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL);
2191 if (!info)
2192 return -ENOMEM;
c12c48ce
DW		 2193
2194 info2 = devm_kzalloc(dev, sizeof_nfit_set_info2(nr), GFP_KERNEL);
2195 if (!info2)
2196 return -ENOMEM;
2197
eaf96153 2198 for (i = 0; i < nr; i++) {
44c462eb 2199 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
eaf96153 2200 struct nfit_set_info_map *map = &info->mapping[i];
c12c48ce 2201 struct nfit_set_info_map2 *map2 = &info2->mapping[i];
44c462eb 2202 struct nvdimm *nvdimm = mapping->nvdimm;
eaf96153
DW		 2203 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
2204 struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc,
2205 spa->range_index, i);
dcb79b15 2206 struct acpi_nfit_control_region *dcr = nfit_mem->dcr;
eaf96153
DW		 2207
2208 if (!memdev || !nfit_mem->dcr) {
2209 dev_err(dev, "%s: failed to find DCR\n", __func__);
2210 return -ENODEV;
2211 }
2212
2213 map->region_offset = memdev->region_offset;
dcb79b15 2214 map->serial_number = dcr->serial_number;
c12c48ce
DW		 2215
2216 map2->region_offset = memdev->region_offset;
dcb79b15
DW		 2217 map2->serial_number = dcr->serial_number;
2218 map2->vendor_id = dcr->vendor_id;
2219 map2->manufacturing_date = dcr->manufacturing_date;
2220 map2->manufacturing_location = dcr->manufacturing_location;
eaf96153
DW		 2221 }
2222
c12c48ce 2223 /* v1.1 namespaces */
eaf96153
DW		 2224 sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
2225 cmp_map, NULL);
c12c48ce
DW		 2226 nd_set->cookie1 = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
2227
2228 /* v1.2 namespaces */
2229 sort(&info2->mapping[0], nr, sizeof(struct nfit_set_info_map2),
2230 cmp_map2, NULL);
2231 nd_set->cookie2 = nd_fletcher64(info2, sizeof_nfit_set_info2(nr), 0);
86ef58a4 2232
c12c48ce 2233 /* support v1.1 namespaces created with the wrong sort order */
86ef58a4
DW		 2234 sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
2235 cmp_map_compat, NULL);
2236 nd_set->altcookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
2237
401c0a19
DW		 2238 /* record the result of the sort for the mapping position */
2239 for (i = 0; i < nr; i++) {
2240 struct nfit_set_info_map2 *map2 = &info2->mapping[i];
2241 int j;
2242
2243 for (j = 0; j < nr; j++) {
2244 struct nd_mapping_desc *mapping = &ndr_desc->mapping[j];
2245 struct nvdimm *nvdimm = mapping->nvdimm;
2246 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
dcb79b15 2247 struct acpi_nfit_control_region *dcr = nfit_mem->dcr;
401c0a19 2248
dcb79b15
DW		 2249 if (map2->serial_number == dcr->serial_number &&
2250 map2->vendor_id == dcr->vendor_id &&
2251 map2->manufacturing_date == dcr->manufacturing_date &&
401c0a19 2252 map2->manufacturing_location
dcb79b15 2253 == dcr->manufacturing_location) {
401c0a19
DW		 2254 mapping->position = i;
2255 break;
2256 }
2257 }
2258 }
2259
eaf96153
DW		 2260 ndr_desc->nd_set = nd_set;
2261 devm_kfree(dev, info);
c12c48ce 2262 devm_kfree(dev, info2);
eaf96153
DW		 2263
2264 return 0;
2265}
2266
047fc8a1
RZ		 2267static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio)
2268{
2269 struct acpi_nfit_interleave *idt = mmio->idt;
2270 u32 sub_line_offset, line_index, line_offset;
2271 u64 line_no, table_skip_count, table_offset;
2272
2273 line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset);
2274 table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index);
2275 line_offset = idt->line_offset[line_index]
2276 * mmio->line_size;
2277 table_offset = table_skip_count * mmio->table_size;
2278
2279 return mmio->base_offset + line_offset + table_offset + sub_line_offset;
2280}
2281
de4a196c 2282static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw)
047fc8a1
RZ		 2283{
2284 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
2285 u64 offset = nfit_blk->stat_offset + mmio->size * bw;
68202c9f 2286 const u32 STATUS_MASK = 0x80000037;
047fc8a1
RZ		 2287
2288 if (mmio->num_lines)
2289 offset = to_interleave_offset(offset, mmio);
2290
68202c9f 2291 return readl(mmio->addr.base + offset) & STATUS_MASK;
047fc8a1
RZ		 2292}
2293
2294static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,
2295 resource_size_t dpa, unsigned int len, unsigned int write)
2296{
2297 u64 cmd, offset;
2298 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
2299
2300 enum {
2301 BCW_OFFSET_MASK = (1ULL << 48)-1,
2302 BCW_LEN_SHIFT = 48,
2303 BCW_LEN_MASK = (1ULL << 8) - 1,
2304 BCW_CMD_SHIFT = 56,
2305 };
2306
2307 cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK;
2308 len = len >> L1_CACHE_SHIFT;
2309 cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT;
2310 cmd |= ((u64) write) << BCW_CMD_SHIFT;
2311
2312 offset = nfit_blk->cmd_offset + mmio->size * bw;
2313 if (mmio->num_lines)
2314 offset = to_interleave_offset(offset, mmio);
2315
67a3e8fe 2316 writeq(cmd, mmio->addr.base + offset);
f284a4f2 2317 nvdimm_flush(nfit_blk->nd_region);
f0f2c072 2318
aef25338 2319 if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH)
67a3e8fe 2320 readq(mmio->addr.base + offset);
047fc8a1
RZ		 2321}
2322
2323static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk,
2324 resource_size_t dpa, void *iobuf, size_t len, int rw,
2325 unsigned int lane)
2326{
2327 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
2328 unsigned int copied = 0;
2329 u64 base_offset;
2330 int rc;
2331
2332 base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES
2333 + lane * mmio->size;
047fc8a1
RZ		 2334 write_blk_ctl(nfit_blk, lane, dpa, len, rw);
2335 while (len) {
2336 unsigned int c;
2337 u64 offset;
2338
2339 if (mmio->num_lines) {
2340 u32 line_offset;
2341
2342 offset = to_interleave_offset(base_offset + copied,
2343 mmio);
2344 div_u64_rem(offset, mmio->line_size, &line_offset);
2345 c = min_t(size_t, len, mmio->line_size - line_offset);
2346 } else {
2347 offset = base_offset + nfit_blk->bdw_offset;
2348 c = len;
2349 }
2350
2351 if (rw)
0aed55af 2352 memcpy_flushcache(mmio->addr.aperture + offset, iobuf + copied, c);
67a3e8fe 2353 else {
aef25338 2354 if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH)
5deb67f7 2355 arch_invalidate_pmem((void __force *)
67a3e8fe
RZ		 2356 mmio->addr.aperture + offset, c);
2357
6abccd1b 2358 memcpy(iobuf + copied, mmio->addr.aperture + offset, c);
67a3e8fe 2359 }
047fc8a1
RZ		 2360
2361 copied += c;
2362 len -= c;
2363 }
c2ad2954
RZ		 2364
2365 if (rw)
f284a4f2 2366 nvdimm_flush(nfit_blk->nd_region);
c2ad2954 2367
047fc8a1
RZ		 2368 rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0;
2369 return rc;
2370}
2371
2372static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr,
2373 resource_size_t dpa, void *iobuf, u64 len, int rw)
2374{
2375 struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
2376 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
2377 struct nd_region *nd_region = nfit_blk->nd_region;
2378 unsigned int lane, copied = 0;
2379 int rc = 0;
2380
2381 lane = nd_region_acquire_lane(nd_region);
2382 while (len) {
2383 u64 c = min(len, mmio->size);
2384
2385 rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied,
2386 iobuf + copied, c, rw, lane);
2387 if (rc)
2388 break;
2389
2390 copied += c;
2391 len -= c;
2392 }
2393 nd_region_release_lane(nd_region, lane);
2394
2395 return rc;
2396}
2397
047fc8a1
RZ		 2398static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio,
2399 struct acpi_nfit_interleave *idt, u16 interleave_ways)
2400{
2401 if (idt) {
2402 mmio->num_lines = idt->line_count;
2403 mmio->line_size = idt->line_size;
2404 if (interleave_ways == 0)
2405 return -ENXIO;
2406 mmio->table_size = mmio->num_lines * interleave_ways
2407 * mmio->line_size;
2408 }
2409
2410 return 0;
2411}
2412
f0f2c072
RZ		 2413static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc,
2414 struct nvdimm *nvdimm, struct nfit_blk *nfit_blk)
2415{
2416 struct nd_cmd_dimm_flags flags;
2417 int rc;
2418
2419 memset(&flags, 0, sizeof(flags));
2420 rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags,
aef25338 2421 sizeof(flags), NULL);
f0f2c072
RZ		 2422
2423 if (rc >= 0 && flags.status == 0)
2424 nfit_blk->dimm_flags = flags.flags;
2425 else if (rc == -ENOTTY) {
2426 /* fall back to a conservative default */
aef25338 2427 nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH;
f0f2c072
RZ		 2428 rc = 0;
2429 } else
2430 rc = -ENXIO;
2431
2432 return rc;
2433}
2434
047fc8a1
RZ		 2435static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus,
2436 struct device *dev)
2437{
2438 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
047fc8a1
RZ		 2439 struct nd_blk_region *ndbr = to_nd_blk_region(dev);
2440 struct nfit_blk_mmio *mmio;
2441 struct nfit_blk *nfit_blk;
2442 struct nfit_mem *nfit_mem;
2443 struct nvdimm *nvdimm;
2444 int rc;
2445
2446 nvdimm = nd_blk_region_to_dimm(ndbr);
2447 nfit_mem = nvdimm_provider_data(nvdimm);
2448 if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) {
b814735f 2449 dev_dbg(dev, "missing%s%s%s\n",
047fc8a1 2450 nfit_mem ? "" : " nfit_mem",
193ccca4
DW		 2451 (nfit_mem && nfit_mem->dcr) ? "" : " dcr",
2452 (nfit_mem && nfit_mem->bdw) ? "" : " bdw");
047fc8a1
RZ		 2453 return -ENXIO;
2454 }
2455
2456 nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL);
2457 if (!nfit_blk)
2458 return -ENOMEM;
2459 nd_blk_region_set_provider_data(ndbr, nfit_blk);
2460 nfit_blk->nd_region = to_nd_region(dev);
2461
2462 /* map block aperture memory */
2463 nfit_blk->bdw_offset = nfit_mem->bdw->offset;
2464 mmio = &nfit_blk->mmio[BDW];
29b9aa0a 2465 mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address,
ca6a4657 2466 nfit_mem->spa_bdw->length, nd_blk_memremap_flags(ndbr));
67a3e8fe 2467 if (!mmio->addr.base) {
b814735f 2468 dev_dbg(dev, "%s failed to map bdw\n",
047fc8a1
RZ		 2469 nvdimm_name(nvdimm));
2470 return -ENOMEM;
2471 }
2472 mmio->size = nfit_mem->bdw->size;
2473 mmio->base_offset = nfit_mem->memdev_bdw->region_offset;
2474 mmio->idt = nfit_mem->idt_bdw;
2475 mmio->spa = nfit_mem->spa_bdw;
2476 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw,
2477 nfit_mem->memdev_bdw->interleave_ways);
2478 if (rc) {
b814735f
JT		 2479 dev_dbg(dev, "%s failed to init bdw interleave\n",
2480 nvdimm_name(nvdimm));
047fc8a1
RZ		 2481 return rc;
2482 }
2483
2484 /* map block control memory */
2485 nfit_blk->cmd_offset = nfit_mem->dcr->command_offset;
2486 nfit_blk->stat_offset = nfit_mem->dcr->status_offset;
2487 mmio = &nfit_blk->mmio[DCR];
29b9aa0a
DW		 2488 mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address,
2489 nfit_mem->spa_dcr->length);
67a3e8fe 2490 if (!mmio->addr.base) {
b814735f 2491 dev_dbg(dev, "%s failed to map dcr\n",
047fc8a1
RZ		 2492 nvdimm_name(nvdimm));
2493 return -ENOMEM;
2494 }
2495 mmio->size = nfit_mem->dcr->window_size;
2496 mmio->base_offset = nfit_mem->memdev_dcr->region_offset;
2497 mmio->idt = nfit_mem->idt_dcr;
2498 mmio->spa = nfit_mem->spa_dcr;
2499 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr,
2500 nfit_mem->memdev_dcr->interleave_ways);
2501 if (rc) {
b814735f
JT		 2502 dev_dbg(dev, "%s failed to init dcr interleave\n",
2503 nvdimm_name(nvdimm));
047fc8a1
RZ		 2504 return rc;
2505 }
2506
f0f2c072
RZ		 2507 rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk);
2508 if (rc < 0) {
b814735f
JT		 2509 dev_dbg(dev, "%s failed get DIMM flags\n",
2510 nvdimm_name(nvdimm));
f0f2c072
RZ		 2511 return rc;
2512 }
2513
f284a4f2 2514 if (nvdimm_has_flush(nfit_blk->nd_region) < 0)
c2ad2954
RZ		 2515 dev_warn(dev, "unable to guarantee persistence of writes\n");
2516
047fc8a1
RZ		 2517 if (mmio->line_size == 0)
2518 return 0;
2519
2520 if ((u32) nfit_blk->cmd_offset % mmio->line_size
2521 + 8 > mmio->line_size) {
2522 dev_dbg(dev, "cmd_offset crosses interleave boundary\n");
2523 return -ENXIO;
2524 } else if ((u32) nfit_blk->stat_offset % mmio->line_size
2525 + 8 > mmio->line_size) {
2526 dev_dbg(dev, "stat_offset crosses interleave boundary\n");
2527 return -ENXIO;
2528 }
2529
2530 return 0;
2531}
2532
aef25338 2533static int ars_get_cap(struct acpi_nfit_desc *acpi_desc,
1cf03c00 2534 struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa)
0caeef63 2535{
aef25338 2536 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
1cf03c00 2537 struct acpi_nfit_system_address *spa = nfit_spa->spa;
aef25338
DW		 2538 int cmd_rc, rc;
2539
1cf03c00
DW		 2540 cmd->address = spa->address;
2541 cmd->length = spa->length;
aef25338
DW		 2542 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd,
2543 sizeof(*cmd), &cmd_rc);
2544 if (rc < 0)
2545 return rc;
1cf03c00 2546 return cmd_rc;
0caeef63
VV		 2547}
2548
1cf03c00 2549static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa)
0caeef63
VV		 2550{
2551 int rc;
1cf03c00
DW		 2552 int cmd_rc;
2553 struct nd_cmd_ars_start ars_start;
2554 struct acpi_nfit_system_address *spa = nfit_spa->spa;
2555 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
0caeef63 2556
1cf03c00
DW		 2557 memset(&ars_start, 0, sizeof(ars_start));
2558 ars_start.address = spa->address;
2559 ars_start.length = spa->length;
bc6ba808
DW		 2560 if (test_bit(ARS_SHORT, &nfit_spa->ars_state))
2561 ars_start.flags = ND_ARS_RETURN_PREV_DATA;
1cf03c00
DW		 2562 if (nfit_spa_type(spa) == NFIT_SPA_PM)
2563 ars_start.type = ND_ARS_PERSISTENT;
2564 else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE)
2565 ars_start.type = ND_ARS_VOLATILE;
2566 else
2567 return -ENOTTY;
aef25338 2568
1cf03c00
DW		 2569 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
2570 sizeof(ars_start), &cmd_rc);
aef25338 2571
1cf03c00
DW		 2572 if (rc < 0)
2573 return rc;
2574 return cmd_rc;
0caeef63
VV		 2575}
2576
1cf03c00 2577static int ars_continue(struct acpi_nfit_desc *acpi_desc)
0caeef63 2578{
aef25338 2579 int rc, cmd_rc;
1cf03c00
DW		 2580 struct nd_cmd_ars_start ars_start;
2581 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
2582 struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
2583
2584 memset(&ars_start, 0, sizeof(ars_start));
2585 ars_start.address = ars_status->restart_address;
2586 ars_start.length = ars_status->restart_length;
2587 ars_start.type = ars_status->type;
80790039 2588 ars_start.flags = acpi_desc->ars_start_flags;
1cf03c00
DW		 2589 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
2590 sizeof(ars_start), &cmd_rc);
2591 if (rc < 0)
2592 return rc;
2593 return cmd_rc;
2594}
0caeef63 2595
1cf03c00
DW		 2596static int ars_get_status(struct acpi_nfit_desc *acpi_desc)
2597{
2598 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
2599 struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
2600 int rc, cmd_rc;
aef25338 2601
1cf03c00 2602 rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status,
459d0ddb 2603 acpi_desc->max_ars, &cmd_rc);
1cf03c00
DW		 2604 if (rc < 0)
2605 return rc;
2606 return cmd_rc;
0caeef63
VV		 2607}
2608
bc6ba808
DW		 2609static void ars_complete(struct acpi_nfit_desc *acpi_desc,
2610 struct nfit_spa *nfit_spa)
2611{
2612 struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
2613 struct acpi_nfit_system_address *spa = nfit_spa->spa;
2614 struct nd_region *nd_region = nfit_spa->nd_region;
2615 struct device *dev;
2616
2617 if ((ars_status->address >= spa->address && ars_status->address
2618 < spa->address + spa->length)
2619 || (ars_status->address < spa->address)) {
2620 /*
2621 * Assume that if a scrub starts at an offset from the
2622 * start of nfit_spa that we are in the continuation
2623 * case.
2624 *
2625 * Otherwise, if the scrub covers the spa range, mark
2626 * any pending request complete.
2627 */
2628 if (ars_status->address + ars_status->length
2629 >= spa->address + spa->length)
2630 /* complete */;
2631 else
2632 return;
2633 } else
2634 return;
2635
2636 if (test_bit(ARS_DONE, &nfit_spa->ars_state))
2637 return;
2638
2639 if (!test_and_clear_bit(ARS_REQ, &nfit_spa->ars_state))
2640 return;
2641
2642 if (nd_region) {
2643 dev = nd_region_dev(nd_region);
2644 nvdimm_region_notify(nd_region, NVDIMM_REVALIDATE_POISON);
2645 } else
2646 dev = acpi_desc->dev;
2647
2648 dev_dbg(dev, "ARS: range %d %s complete\n", spa->range_index,
2649 test_bit(ARS_SHORT, &nfit_spa->ars_state)
2650 ? "short" : "long");
2651 clear_bit(ARS_SHORT, &nfit_spa->ars_state);
cc3d3458
DJ		 2652 if (test_and_clear_bit(ARS_REQ_REDO, &nfit_spa->ars_state)) {
2653 set_bit(ARS_SHORT, &nfit_spa->ars_state);
2654 set_bit(ARS_REQ, &nfit_spa->ars_state);
2655 dev_dbg(dev, "ARS: processing scrub request received while in progress\n");
2656 } else
2657 set_bit(ARS_DONE, &nfit_spa->ars_state);
bc6ba808
DW		 2658}
2659
459d0ddb 2660static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc)
0caeef63 2661{
82aa37cf 2662 struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus;
459d0ddb 2663 struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
0caeef63
VV		 2664 int rc;
2665 u32 i;
2666
82aa37cf
DW		 2667 /*
2668 * First record starts at 44 byte offset from the start of the
2669 * payload.
2670 */
2671 if (ars_status->out_length < 44)
2672 return 0;
0caeef63 2673 for (i = 0; i < ars_status->num_records; i++) {
82aa37cf
DW		 2674 /* only process full records */
2675 if (ars_status->out_length
2676 < 44 + sizeof(struct nd_ars_record) * (i + 1))
2677 break;
aa9ad44a 2678 rc = nvdimm_bus_add_badrange(nvdimm_bus,
0caeef63
VV		 2679 ars_status->records[i].err_address,
2680 ars_status->records[i].length);
2681 if (rc)
2682 return rc;
2683 }
82aa37cf
DW		 2684 if (i < ars_status->num_records)
2685 dev_warn(acpi_desc->dev, "detected truncated ars results\n");
0caeef63
VV		 2686
2687 return 0;
2688}
2689
af1996ef
TK		 2690static void acpi_nfit_remove_resource(void *data)
2691{
2692 struct resource *res = data;
2693
2694 remove_resource(res);
2695}
2696
2697static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc,
2698 struct nd_region_desc *ndr_desc)
2699{
2700 struct resource *res, *nd_res = ndr_desc->res;
2701 int is_pmem, ret;
2702
2703 /* No operation if the region is already registered as PMEM */
2704 is_pmem = region_intersects(nd_res->start, resource_size(nd_res),
2705 IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY);
2706 if (is_pmem == REGION_INTERSECTS)
2707 return 0;
2708
2709 res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL);
2710 if (!res)
2711 return -ENOMEM;
2712
2713 res->name = "Persistent Memory";
2714 res->start = nd_res->start;
2715 res->end = nd_res->end;
2716 res->flags = IORESOURCE_MEM;
2717 res->desc = IORES_DESC_PERSISTENT_MEMORY;
2718
2719 ret = insert_resource(&iomem_resource, res);
2720 if (ret)
2721 return ret;
2722
d932dd2c
SV		 2723 ret = devm_add_action_or_reset(acpi_desc->dev,
2724 acpi_nfit_remove_resource,
2725 res);
2726 if (ret)
af1996ef 2727 return ret;
af1996ef
TK		 2728
2729 return 0;
2730}
2731
1f7df6f8 2732static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc,
44c462eb 2733 struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc,
1f7df6f8 2734 struct acpi_nfit_memory_map *memdev,
1cf03c00 2735 struct nfit_spa *nfit_spa)
1f7df6f8
DW		 2736{
2737 struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc,
2738 memdev->device_handle);
1cf03c00 2739 struct acpi_nfit_system_address *spa = nfit_spa->spa;
047fc8a1 2740 struct nd_blk_region_desc *ndbr_desc;
1f7df6f8 2741 struct nfit_mem *nfit_mem;
0731de47 2742 int rc;
1f7df6f8
DW		 2743
2744 if (!nvdimm) {
2745 dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n",
2746 spa->range_index, memdev->device_handle);
2747 return -ENODEV;
2748 }
2749
44c462eb 2750 mapping->nvdimm = nvdimm;
1f7df6f8
DW		 2751 switch (nfit_spa_type(spa)) {
2752 case NFIT_SPA_PM:
2753 case NFIT_SPA_VOLATILE:
44c462eb
DW		 2754 mapping->start = memdev->address;
2755 mapping->size = memdev->region_size;
1f7df6f8
DW		 2756 break;
2757 case NFIT_SPA_DCR:
2758 nfit_mem = nvdimm_provider_data(nvdimm);
2759 if (!nfit_mem || !nfit_mem->bdw) {
2760 dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n",
2761 spa->range_index, nvdimm_name(nvdimm));
0731de47 2762 break;
1f7df6f8
DW		 2763 }
2764
0731de47
DW		 2765 mapping->size = nfit_mem->bdw->capacity;
2766 mapping->start = nfit_mem->bdw->start_address;
2767 ndr_desc->num_lanes = nfit_mem->bdw->windows;
44c462eb 2768 ndr_desc->mapping = mapping;
0731de47 2769 ndr_desc->num_mappings = 1;
047fc8a1
RZ		 2770 ndbr_desc = to_blk_region_desc(ndr_desc);
2771 ndbr_desc->enable = acpi_nfit_blk_region_enable;
6bc75619 2772 ndbr_desc->do_io = acpi_desc->blk_do_io;
faec6f8a
DW		 2773 rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
2774 if (rc)
2775 return rc;
1cf03c00
DW		 2776 nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus,
2777 ndr_desc);
2778 if (!nfit_spa->nd_region)
1f7df6f8
DW		 2779 return -ENOMEM;
2780 break;
2781 }
2782
2783 return 0;
2784}
2785
c2f32acd
LCY		 2786static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa)
2787{
2788 return (nfit_spa_type(spa) == NFIT_SPA_VDISK ||
2789 nfit_spa_type(spa) == NFIT_SPA_VCD ||
2790 nfit_spa_type(spa) == NFIT_SPA_PDISK ||
2791 nfit_spa_type(spa) == NFIT_SPA_PCD);
2792}
2793
c9e582aa
DW		 2794static bool nfit_spa_is_volatile(struct acpi_nfit_system_address *spa)
2795{
2796 return (nfit_spa_type(spa) == NFIT_SPA_VDISK ||
2797 nfit_spa_type(spa) == NFIT_SPA_VCD ||
2798 nfit_spa_type(spa) == NFIT_SPA_VOLATILE);
2799}
2800
1f7df6f8
DW		 2801static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc,
2802 struct nfit_spa *nfit_spa)
2803{
44c462eb 2804 static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS];
1f7df6f8 2805 struct acpi_nfit_system_address *spa = nfit_spa->spa;
047fc8a1
RZ		 2806 struct nd_blk_region_desc ndbr_desc;
2807 struct nd_region_desc *ndr_desc;
1f7df6f8 2808 struct nfit_memdev *nfit_memdev;
1f7df6f8
DW		 2809 struct nvdimm_bus *nvdimm_bus;
2810 struct resource res;
eaf96153 2811 int count = 0, rc;
1f7df6f8 2812
1cf03c00 2813 if (nfit_spa->nd_region)
20985164
VV		 2814 return 0;
2815
c2f32acd 2816 if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) {
b814735f 2817 dev_dbg(acpi_desc->dev, "detected invalid spa index\n");
1f7df6f8
DW		 2818 return 0;
2819 }
2820
2821 memset(&res, 0, sizeof(res));
44c462eb 2822 memset(&mappings, 0, sizeof(mappings));
047fc8a1 2823 memset(&ndbr_desc, 0, sizeof(ndbr_desc));
1f7df6f8
DW		 2824 res.start = spa->address;
2825 res.end = res.start + spa->length - 1;
047fc8a1
RZ		 2826 ndr_desc = &ndbr_desc.ndr_desc;
2827 ndr_desc->res = &res;
2828 ndr_desc->provider_data = nfit_spa;
2829 ndr_desc->attr_groups = acpi_nfit_region_attribute_groups;
41d7a6d6
TK		 2830 if (spa->flags & ACPI_NFIT_PROXIMITY_VALID)
2831 ndr_desc->numa_node = acpi_map_pxm_to_online_node(
2832 spa->proximity_domain);
2833 else
2834 ndr_desc->numa_node = NUMA_NO_NODE;
2835
fe9a552e
DW		 2836 /*
2837 * Persistence domain bits are hierarchical, if
2838 * ACPI_NFIT_CAPABILITY_CACHE_FLUSH is set then
2839 * ACPI_NFIT_CAPABILITY_MEM_FLUSH is implied.
2840 */
2841 if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_CACHE_FLUSH)
06e8ccda 2842 set_bit(ND_REGION_PERSIST_CACHE, &ndr_desc->flags);
fe9a552e 2843 else if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_MEM_FLUSH)
30e6d7bf
DJ		 2844 set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc->flags);
2845
1f7df6f8
DW		 2846 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
2847 struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
44c462eb 2848 struct nd_mapping_desc *mapping;
1f7df6f8
DW		 2849
2850 if (memdev->range_index != spa->range_index)
2851 continue;
2852 if (count >= ND_MAX_MAPPINGS) {
2853 dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n",
2854 spa->range_index, ND_MAX_MAPPINGS);
2855 return -ENXIO;
2856 }
44c462eb
DW		 2857 mapping = &mappings[count++];
2858 rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc,
1cf03c00 2859 memdev, nfit_spa);
1f7df6f8 2860 if (rc)
1cf03c00 2861 goto out;
1f7df6f8
DW		 2862 }
2863
44c462eb 2864 ndr_desc->mapping = mappings;
047fc8a1
RZ		 2865 ndr_desc->num_mappings = count;
2866 rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
eaf96153 2867 if (rc)
1cf03c00 2868 goto out;
eaf96153 2869
1f7df6f8
DW		 2870 nvdimm_bus = acpi_desc->nvdimm_bus;
2871 if (nfit_spa_type(spa) == NFIT_SPA_PM) {
af1996ef 2872 rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc);
48901165 2873 if (rc) {
af1996ef
TK		 2874 dev_warn(acpi_desc->dev,
2875 "failed to insert pmem resource to iomem: %d\n",
2876 rc);
48901165 2877 goto out;
0caeef63 2878 }
48901165 2879
1cf03c00
DW		 2880 nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
2881 ndr_desc);
2882 if (!nfit_spa->nd_region)
2883 rc = -ENOMEM;
c9e582aa 2884 } else if (nfit_spa_is_volatile(spa)) {
1cf03c00
DW		 2885 nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus,
2886 ndr_desc);
2887 if (!nfit_spa->nd_region)
2888 rc = -ENOMEM;
c2f32acd
LCY		 2889 } else if (nfit_spa_is_virtual(spa)) {
2890 nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
2891 ndr_desc);
2892 if (!nfit_spa->nd_region)
2893 rc = -ENOMEM;
1f7df6f8 2894 }
20985164 2895
1cf03c00
DW		 2896 out:
2897 if (rc)
2898 dev_err(acpi_desc->dev, "failed to register spa range %d\n",
2899 nfit_spa->spa->range_index);
2900 return rc;
2901}
2902
459d0ddb 2903static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc)
1cf03c00
DW		 2904{
2905 struct device *dev = acpi_desc->dev;
2906 struct nd_cmd_ars_status *ars_status;
2907
459d0ddb
DW		 2908 if (acpi_desc->ars_status) {
2909 memset(acpi_desc->ars_status, 0, acpi_desc->max_ars);
1cf03c00
DW		 2910 return 0;
2911 }
2912
459d0ddb 2913 ars_status = devm_kzalloc(dev, acpi_desc->max_ars, GFP_KERNEL);
1cf03c00
DW		 2914 if (!ars_status)
2915 return -ENOMEM;
2916 acpi_desc->ars_status = ars_status;
1f7df6f8
DW		 2917 return 0;
2918}
2919
459d0ddb 2920static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc)
1cf03c00 2921{
1cf03c00
DW		 2922 int rc;
2923
459d0ddb 2924 if (ars_status_alloc(acpi_desc))
1cf03c00
DW		 2925 return -ENOMEM;
2926
2927 rc = ars_get_status(acpi_desc);
bc6ba808 2928
1cf03c00
DW		 2929 if (rc < 0 && rc != -ENOSPC)
2930 return rc;
2931
459d0ddb 2932 if (ars_status_process_records(acpi_desc))
1cf03c00
DW		 2933 return -ENOMEM;
2934
2935 return 0;
2936}
2937
bc6ba808
DW		 2938static int ars_register(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa,
2939 int *query_rc)
1cf03c00 2940{
bc6ba808 2941 int rc = *query_rc;
1cf03c00 2942
bca811a7
DW		 2943 if (no_init_ars)
2944 return acpi_nfit_register_region(acpi_desc, nfit_spa);
1cf03c00 2945
bc6ba808
DW		 2946 set_bit(ARS_REQ, &nfit_spa->ars_state);
2947 set_bit(ARS_SHORT, &nfit_spa->ars_state);
1cf03c00 2948
bc6ba808
DW		 2949 switch (rc) {
2950 case 0:
2951 case -EAGAIN:
2952 rc = ars_start(acpi_desc, nfit_spa);
1cf03c00 2953 if (rc == -EBUSY) {
bc6ba808 2954 *query_rc = rc;
1cf03c00 2955 break;
bc6ba808
DW		 2956 } else if (rc == 0) {
2957 rc = acpi_nfit_query_poison(acpi_desc);
1cf03c00 2958 } else {
bc6ba808
DW		 2959 set_bit(ARS_FAILED, &nfit_spa->ars_state);
2960 break;
1cf03c00 2961 }
bc6ba808
DW		 2962 if (rc == -EAGAIN)
2963 clear_bit(ARS_SHORT, &nfit_spa->ars_state);
2964 else if (rc == 0)
2965 ars_complete(acpi_desc, nfit_spa);
1cf03c00 2966 break;
bc6ba808
DW		 2967 case -EBUSY:
2968 case -ENOSPC:
1cf03c00 2969 break;
bc6ba808
DW		 2970 default:
2971 set_bit(ARS_FAILED, &nfit_spa->ars_state);
2972 break;
2973 }
2974
2975 if (test_and_clear_bit(ARS_DONE, &nfit_spa->ars_state))
2976 set_bit(ARS_REQ, &nfit_spa->ars_state);
2977
2978 return acpi_nfit_register_region(acpi_desc, nfit_spa);
1cf03c00
DW		 2979}
2980
bc6ba808 2981static void ars_complete_all(struct acpi_nfit_desc *acpi_desc)
1f7df6f8
DW		 2982{
2983 struct nfit_spa *nfit_spa;
1cf03c00 2984
1f7df6f8 2985 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
bc6ba808 2986 if (test_bit(ARS_FAILED, &nfit_spa->ars_state))
1cf03c00 2987 continue;
bc6ba808
DW		 2988 ars_complete(acpi_desc, nfit_spa);
2989 }
2990}
1cf03c00 2991
bc6ba808
DW		 2992static unsigned int __acpi_nfit_scrub(struct acpi_nfit_desc *acpi_desc,
2993 int query_rc)
2994{
2995 unsigned int tmo = acpi_desc->scrub_tmo;
2996 struct device *dev = acpi_desc->dev;
2997 struct nfit_spa *nfit_spa;
1cf03c00 2998
bc6ba808
DW		 2999 if (acpi_desc->cancel)
3000 return 0;
1cf03c00 3001
bc6ba808
DW		 3002 if (query_rc == -EBUSY) {
3003 dev_dbg(dev, "ARS: ARS busy\n");
3004 return min(30U * 60U, tmo * 2);
3005 }
3006 if (query_rc == -ENOSPC) {
3007 dev_dbg(dev, "ARS: ARS continue\n");
3008 ars_continue(acpi_desc);
3009 return 1;
3010 }
3011 if (query_rc && query_rc != -EAGAIN) {
3012 unsigned long long addr, end;
1cf03c00 3013
bc6ba808
DW		 3014 addr = acpi_desc->ars_status->address;
3015 end = addr + acpi_desc->ars_status->length;
3016 dev_dbg(dev, "ARS: %llx-%llx failed (%d)\n", addr, end,
3017 query_rc);
1f7df6f8 3018 }
1cf03c00 3019
bc6ba808 3020 ars_complete_all(acpi_desc);
1cf03c00 3021 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
bc6ba808
DW		 3022 if (test_bit(ARS_FAILED, &nfit_spa->ars_state))
3023 continue;
3024 if (test_bit(ARS_REQ, &nfit_spa->ars_state)) {
3025 int rc = ars_start(acpi_desc, nfit_spa);
3026
3027 clear_bit(ARS_DONE, &nfit_spa->ars_state);
3028 dev = nd_region_dev(nfit_spa->nd_region);
3029 dev_dbg(dev, "ARS: range %d ARS start (%d)\n",
3030 nfit_spa->spa->range_index, rc);
3031 if (rc == 0 || rc == -EBUSY)
3032 return 1;
3033 dev_err(dev, "ARS: range %d ARS failed (%d)\n",
3034 nfit_spa->spa->range_index, rc);
3035 set_bit(ARS_FAILED, &nfit_spa->ars_state);
37b137ff 3036 }
1cf03c00 3037 }
bc6ba808
DW		 3038 return 0;
3039}
1cf03c00 3040
33cc2c96
DW		 3041static void __sched_ars(struct acpi_nfit_desc *acpi_desc, unsigned int tmo)
3042{
3043 lockdep_assert_held(&acpi_desc->init_mutex);
3044
3045 acpi_desc->scrub_busy = 1;
3046 /* note this should only be set from within the workqueue */
3047 if (tmo)
3048 acpi_desc->scrub_tmo = tmo;
3049 queue_delayed_work(nfit_wq, &acpi_desc->dwork, tmo * HZ);
3050}
3051
3052static void sched_ars(struct acpi_nfit_desc *acpi_desc)
3053{
3054 __sched_ars(acpi_desc, 0);
3055}
3056
3057static void notify_ars_done(struct acpi_nfit_desc *acpi_desc)
3058{
3059 lockdep_assert_held(&acpi_desc->init_mutex);
3060
3061 acpi_desc->scrub_busy = 0;
3062 acpi_desc->scrub_count++;
3063 if (acpi_desc->scrub_count_state)
3064 sysfs_notify_dirent(acpi_desc->scrub_count_state);
3065}
3066
bc6ba808
DW		 3067static void acpi_nfit_scrub(struct work_struct *work)
3068{
3069 struct acpi_nfit_desc *acpi_desc;
3070 unsigned int tmo;
3071 int query_rc;
3072
3073 acpi_desc = container_of(work, typeof(*acpi_desc), dwork.work);
3074 mutex_lock(&acpi_desc->init_mutex);
3075 query_rc = acpi_nfit_query_poison(acpi_desc);
3076 tmo = __acpi_nfit_scrub(acpi_desc, query_rc);
33cc2c96
DW		 3077 if (tmo)
3078 __sched_ars(acpi_desc, tmo);
3079 else
3080 notify_ars_done(acpi_desc);
bc6ba808 3081 memset(acpi_desc->ars_status, 0, acpi_desc->max_ars);
1cf03c00
DW		 3082 mutex_unlock(&acpi_desc->init_mutex);
3083}
3084
459d0ddb
DW		 3085static void acpi_nfit_init_ars(struct acpi_nfit_desc *acpi_desc,
3086 struct nfit_spa *nfit_spa)
3087{
3088 int type = nfit_spa_type(nfit_spa->spa);
3089 struct nd_cmd_ars_cap ars_cap;
3090 int rc;
3091
3092 memset(&ars_cap, 0, sizeof(ars_cap));
3093 rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa);
3094 if (rc < 0)
3095 return;
3096 /* check that the supported scrub types match the spa type */
3097 if (type == NFIT_SPA_VOLATILE && ((ars_cap.status >> 16)
3098 & ND_ARS_VOLATILE) == 0)
3099 return;
3100 if (type == NFIT_SPA_PM && ((ars_cap.status >> 16)
3101 & ND_ARS_PERSISTENT) == 0)
3102 return;
3103
3104 nfit_spa->max_ars = ars_cap.max_ars_out;
3105 nfit_spa->clear_err_unit = ars_cap.clear_err_unit;
3106 acpi_desc->max_ars = max(nfit_spa->max_ars, acpi_desc->max_ars);
bc6ba808
DW		 3107 clear_bit(ARS_FAILED, &nfit_spa->ars_state);
3108 set_bit(ARS_REQ, &nfit_spa->ars_state);
459d0ddb
DW		 3109}
3110
1cf03c00
DW		 3111static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc)
3112{
3113 struct nfit_spa *nfit_spa;
bc6ba808 3114 int rc, query_rc;
1cf03c00 3115
8d0d8ed3 3116 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
bc6ba808
DW		 3117 set_bit(ARS_FAILED, &nfit_spa->ars_state);
3118 switch (nfit_spa_type(nfit_spa->spa)) {
3119 case NFIT_SPA_VOLATILE:
3120 case NFIT_SPA_PM:
459d0ddb 3121 acpi_nfit_init_ars(acpi_desc, nfit_spa);
bc6ba808 3122 break;
459d0ddb 3123 }
8d0d8ed3 3124 }
1cf03c00 3125
bc6ba808
DW		 3126 /*
3127 * Reap any results that might be pending before starting new
3128 * short requests.
3129 */
3130 query_rc = acpi_nfit_query_poison(acpi_desc);
3131 if (query_rc == 0)
3132 ars_complete_all(acpi_desc);
1cf03c00
DW		 3133
3134 list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
bc6ba808
DW		 3135 switch (nfit_spa_type(nfit_spa->spa)) {
3136 case NFIT_SPA_VOLATILE:
3137 case NFIT_SPA_PM:
3138 /* register regions and kick off initial ARS run */
3139 rc = ars_register(acpi_desc, nfit_spa, &query_rc);
3140 if (rc)
3141 return rc;
3142 break;
3143 case NFIT_SPA_BDW:
3144 /* nothing to register */
3145 break;
3146 case NFIT_SPA_DCR:
3147 case NFIT_SPA_VDISK:
3148 case NFIT_SPA_VCD:
3149 case NFIT_SPA_PDISK:
3150 case NFIT_SPA_PCD:
3151 /* register known regions that don't support ARS */
1cf03c00
DW		 3152 rc = acpi_nfit_register_region(acpi_desc, nfit_spa);
3153 if (rc)
3154 return rc;
bc6ba808
DW		 3155 break;
3156 default:
3157 /* don't register unknown regions */
3158 break;
1cf03c00
DW		 3159 }
3160
33cc2c96 3161 sched_ars(acpi_desc);
1f7df6f8
DW		 3162 return 0;
3163}
3164
20985164
VV		 3165static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc,
3166 struct nfit_table_prev *prev)
3167{
3168 struct device *dev = acpi_desc->dev;
3169
3170 if (!list_empty(&prev->spas) ||
3171 !list_empty(&prev->memdevs) ||
3172 !list_empty(&prev->dcrs) ||
3173 !list_empty(&prev->bdws) ||
3174 !list_empty(&prev->idts) ||
3175 !list_empty(&prev->flushes)) {
3176 dev_err(dev, "new nfit deletes entries (unsupported)\n");
3177 return -ENXIO;
3178 }
3179 return 0;
3180}
3181
37b137ff
VV		 3182static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc)
3183{
3184 struct device *dev = acpi_desc->dev;
3185 struct kernfs_node *nfit;
3186 struct device *bus_dev;
3187
3188 if (!ars_supported(acpi_desc->nvdimm_bus))
3189 return 0;
3190
3191 bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus);
3192 nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit");
3193 if (!nfit) {
3194 dev_err(dev, "sysfs_get_dirent 'nfit' failed\n");
3195 return -ENODEV;
3196 }
3197 acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub");
3198 sysfs_put(nfit);
3199 if (!acpi_desc->scrub_count_state) {
3200 dev_err(dev, "sysfs_get_dirent 'scrub' failed\n");
3201 return -ENODEV;
3202 }
3203
3204 return 0;
3205}
3206
fbabd829 3207static void acpi_nfit_unregister(void *data)
58cd71b4
DW		 3208{
3209 struct acpi_nfit_desc *acpi_desc = data;
3210
58cd71b4 3211 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
58cd71b4
DW		 3212}
3213
e7a11b44 3214int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz)
b94d5230
DW		 3215{
3216 struct device *dev = acpi_desc->dev;
20985164 3217 struct nfit_table_prev prev;
b94d5230 3218 const void *end;
1f7df6f8 3219 int rc;
b94d5230 3220
58cd71b4 3221 if (!acpi_desc->nvdimm_bus) {
37b137ff
VV		 3222 acpi_nfit_init_dsms(acpi_desc);
3223
58cd71b4
DW		 3224 acpi_desc->nvdimm_bus = nvdimm_bus_register(dev,
3225 &acpi_desc->nd_desc);
3226 if (!acpi_desc->nvdimm_bus)
3227 return -ENOMEM;
37b137ff 3228
fbabd829 3229 rc = devm_add_action_or_reset(dev, acpi_nfit_unregister,
58cd71b4
DW		 3230 acpi_desc);
3231 if (rc)
3232 return rc;
37b137ff
VV		 3233
3234 rc = acpi_nfit_desc_init_scrub_attr(acpi_desc);
3235 if (rc)
3236 return rc;
6839a6d9
VV		 3237
3238 /* register this acpi_desc for mce notifications */
3239 mutex_lock(&acpi_desc_lock);
3240 list_add_tail(&acpi_desc->list, &acpi_descs);
3241 mutex_unlock(&acpi_desc_lock);
58cd71b4
DW		 3242 }
3243
20985164
VV		 3244 mutex_lock(&acpi_desc->init_mutex);
3245
3246 INIT_LIST_HEAD(&prev.spas);
3247 INIT_LIST_HEAD(&prev.memdevs);
3248 INIT_LIST_HEAD(&prev.dcrs);
3249 INIT_LIST_HEAD(&prev.bdws);
3250 INIT_LIST_HEAD(&prev.idts);
3251 INIT_LIST_HEAD(&prev.flushes);
3252
3253 list_cut_position(&prev.spas, &acpi_desc->spas,
3254 acpi_desc->spas.prev);
3255 list_cut_position(&prev.memdevs, &acpi_desc->memdevs,
3256 acpi_desc->memdevs.prev);
3257 list_cut_position(&prev.dcrs, &acpi_desc->dcrs,
3258 acpi_desc->dcrs.prev);
3259 list_cut_position(&prev.bdws, &acpi_desc->bdws,
3260 acpi_desc->bdws.prev);
3261 list_cut_position(&prev.idts, &acpi_desc->idts,
3262 acpi_desc->idts.prev);
3263 list_cut_position(&prev.flushes, &acpi_desc->flushes,
3264 acpi_desc->flushes.prev);
b94d5230 3265
b94d5230 3266 end = data + sz;
b94d5230 3267 while (!IS_ERR_OR_NULL(data))
20985164 3268 data = add_table(acpi_desc, &prev, data, end);
b94d5230
DW		 3269
3270 if (IS_ERR(data)) {
b814735f 3271 dev_dbg(dev, "nfit table parsing error: %ld\n", PTR_ERR(data));
20985164
VV		 3272 rc = PTR_ERR(data);
3273 goto out_unlock;
b94d5230
DW		 3274 }
3275
20985164
VV		 3276 rc = acpi_nfit_check_deletions(acpi_desc, &prev);
3277 if (rc)
3278 goto out_unlock;
3279
81ed4e36
DW		 3280 rc = nfit_mem_init(acpi_desc);
3281 if (rc)
20985164 3282 goto out_unlock;
62232e45 3283
1f7df6f8
DW		 3284 rc = acpi_nfit_register_dimms(acpi_desc);
3285 if (rc)
20985164
VV		 3286 goto out_unlock;
3287
3288 rc = acpi_nfit_register_regions(acpi_desc);
1f7df6f8 3289
20985164
VV		 3290 out_unlock:
3291 mutex_unlock(&acpi_desc->init_mutex);
3292 return rc;
b94d5230 3293}
6bc75619 3294EXPORT_SYMBOL_GPL(acpi_nfit_init);
b94d5230 3295
7ae0fa43
DW		 3296static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc)
3297{
3298 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
3299 struct device *dev = acpi_desc->dev;
7ae0fa43 3300
bc6ba808 3301 /* Bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */
7ae0fa43
DW		 3302 device_lock(dev);
3303 device_unlock(dev);
3304
bc6ba808 3305 /* Bounce the init_mutex to complete initial registration */
9ccaed4b 3306 mutex_lock(&acpi_desc->init_mutex);
fbabd829 3307 mutex_unlock(&acpi_desc->init_mutex);
e471486c 3308
bc6ba808 3309 return 0;
7ae0fa43
DW		 3310}
3311
87bf572e
DW		 3312static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc,
3313 struct nvdimm *nvdimm, unsigned int cmd)
3314{
3315 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
3316
3317 if (nvdimm)
3318 return 0;
3319 if (cmd != ND_CMD_ARS_START)
3320 return 0;
3321
3322 /*
3323 * The kernel and userspace may race to initiate a scrub, but
3324 * the scrub thread is prepared to lose that initial race. It
3325 * just needs guarantees that any ars it initiates are not
3326 * interrupted by any intervening start reqeusts from userspace.
3327 */
bc6ba808 3328 if (work_busy(&acpi_desc->dwork.work))
87bf572e
DW		 3329 return -EBUSY;
3330
3331 return 0;
3332}
3333
14c73f99 3334int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, unsigned long flags)
37b137ff
VV		 3335{
3336 struct device *dev = acpi_desc->dev;
bc6ba808 3337 int scheduled = 0, busy = 0;
37b137ff
VV		 3338 struct nfit_spa *nfit_spa;
3339
fbabd829
DW		 3340 mutex_lock(&acpi_desc->init_mutex);
3341 if (acpi_desc->cancel) {
3342 mutex_unlock(&acpi_desc->init_mutex);
37b137ff 3343 return 0;
fbabd829 3344 }
37b137ff 3345
37b137ff 3346 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
bc6ba808 3347 int type = nfit_spa_type(nfit_spa->spa);
37b137ff 3348
bc6ba808
DW		 3349 if (type != NFIT_SPA_PM && type != NFIT_SPA_VOLATILE)
3350 continue;
3351 if (test_bit(ARS_FAILED, &nfit_spa->ars_state))
37b137ff
VV		 3352 continue;
3353
cc3d3458 3354 if (test_and_set_bit(ARS_REQ, &nfit_spa->ars_state)) {
bc6ba808 3355 busy++;
cc3d3458
DJ		 3356 set_bit(ARS_REQ_REDO, &nfit_spa->ars_state);
3357 } else {
bc6ba808
DW		 3358 if (test_bit(ARS_SHORT, &flags))
3359 set_bit(ARS_SHORT, &nfit_spa->ars_state);
3360 scheduled++;
3361 }
3362 }
3363 if (scheduled) {
33cc2c96 3364 sched_ars(acpi_desc);
bc6ba808 3365 dev_dbg(dev, "ars_scan triggered\n");
37b137ff 3366 }
37b137ff
VV		 3367 mutex_unlock(&acpi_desc->init_mutex);
3368
bc6ba808
DW		 3369 if (scheduled)
3370 return 0;
3371 if (busy)
3372 return -EBUSY;
3373 return -ENOTTY;
37b137ff
VV		 3374}
3375
a61fe6f7 3376void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev)
b94d5230
DW		 3377{
3378 struct nvdimm_bus_descriptor *nd_desc;
b94d5230
DW		 3379
3380 dev_set_drvdata(dev, acpi_desc);
3381 acpi_desc->dev = dev;
6bc75619 3382 acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io;
b94d5230
DW		 3383 nd_desc = &acpi_desc->nd_desc;
3384 nd_desc->provider_name = "ACPI.NFIT";
bc9775d8 3385 nd_desc->module = THIS_MODULE;
b94d5230 3386 nd_desc->ndctl = acpi_nfit_ctl;
7ae0fa43 3387 nd_desc->flush_probe = acpi_nfit_flush_probe;
87bf572e 3388 nd_desc->clear_to_send = acpi_nfit_clear_to_send;
45def22c 3389 nd_desc->attr_groups = acpi_nfit_attribute_groups;
b94d5230 3390
20985164
VV		 3391 INIT_LIST_HEAD(&acpi_desc->spas);
3392 INIT_LIST_HEAD(&acpi_desc->dcrs);
3393 INIT_LIST_HEAD(&acpi_desc->bdws);
3394 INIT_LIST_HEAD(&acpi_desc->idts);
3395 INIT_LIST_HEAD(&acpi_desc->flushes);
3396 INIT_LIST_HEAD(&acpi_desc->memdevs);
3397 INIT_LIST_HEAD(&acpi_desc->dimms);
6839a6d9 3398 INIT_LIST_HEAD(&acpi_desc->list);
20985164 3399 mutex_init(&acpi_desc->init_mutex);
bc6ba808
DW		 3400 acpi_desc->scrub_tmo = 1;
3401 INIT_DELAYED_WORK(&acpi_desc->dwork, acpi_nfit_scrub);
20985164 3402}
a61fe6f7 3403EXPORT_SYMBOL_GPL(acpi_nfit_desc_init);
20985164 3404
3c87f372
DW		 3405static void acpi_nfit_put_table(void *table)
3406{
3407 acpi_put_table(table);
3408}
3409
fbabd829
DW		 3410void acpi_nfit_shutdown(void *data)
3411{
3412 struct acpi_nfit_desc *acpi_desc = data;
3413 struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus);
3414
3415 /*
3416 * Destruct under acpi_desc_lock so that nfit_handle_mce does not
3417 * race teardown
3418 */
3419 mutex_lock(&acpi_desc_lock);
3420 list_del(&acpi_desc->list);
3421 mutex_unlock(&acpi_desc_lock);
3422
3423 mutex_lock(&acpi_desc->init_mutex);
3424 acpi_desc->cancel = 1;
bc6ba808 3425 cancel_delayed_work_sync(&acpi_desc->dwork);
fbabd829
DW		 3426 mutex_unlock(&acpi_desc->init_mutex);
3427
3428 /*
3429 * Bounce the nvdimm bus lock to make sure any in-flight
3430 * acpi_nfit_ars_rescan() submissions have had a chance to
3431 * either submit or see ->cancel set.
3432 */
3433 device_lock(bus_dev);
3434 device_unlock(bus_dev);
3435
3436 flush_workqueue(nfit_wq);
3437}
3438EXPORT_SYMBOL_GPL(acpi_nfit_shutdown);
3439
20985164
VV		 3440static int acpi_nfit_add(struct acpi_device *adev)
3441{
3442 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
3443 struct acpi_nfit_desc *acpi_desc;
3444 struct device *dev = &adev->dev;
3445 struct acpi_table_header *tbl;
3446 acpi_status status = AE_OK;
3447 acpi_size sz;
31932041 3448 int rc = 0;
20985164 3449
6b11d1d6 3450 status = acpi_get_table(ACPI_SIG_NFIT, 0, &tbl);
20985164
VV		 3451 if (ACPI_FAILURE(status)) {
3452 /* This is ok, we could have an nvdimm hotplugged later */
3453 dev_dbg(dev, "failed to find NFIT at startup\n");
3454 return 0;
3455 }
3c87f372
DW		 3456
3457 rc = devm_add_action_or_reset(dev, acpi_nfit_put_table, tbl);
3458 if (rc)
3459 return rc;
6b11d1d6 3460 sz = tbl->length;
20985164 3461
a61fe6f7
DW		 3462 acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
3463 if (!acpi_desc)
3464 return -ENOMEM;
3465 acpi_nfit_desc_init(acpi_desc, &adev->dev);
20985164 3466
e7a11b44 3467 /* Save the acpi header for exporting the revision via sysfs */
6b577c9d 3468 acpi_desc->acpi_header = *tbl;
20985164
VV		 3469
3470 /* Evaluate _FIT and override with that if present */
3471 status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
3472 if (ACPI_SUCCESS(status) && buf.length > 0) {
e7a11b44
DW		 3473 union acpi_object *obj = buf.pointer;
3474
3475 if (obj->type == ACPI_TYPE_BUFFER)
3476 rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer,
3477 obj->buffer.length);
3478 else
b814735f
JT		 3479 dev_dbg(dev, "invalid type %d, ignoring _FIT\n",
3480 (int) obj->type);
31932041
DW		 3481 kfree(buf.pointer);
3482 } else
e7a11b44
DW		 3483 /* skip over the lead-in header table */
3484 rc = acpi_nfit_init(acpi_desc, (void *) tbl
3485 + sizeof(struct acpi_table_nfit),
3486 sz - sizeof(struct acpi_table_nfit));
fbabd829
DW		 3487
3488 if (rc)
3489 return rc;
3490 return devm_add_action_or_reset(dev, acpi_nfit_shutdown, acpi_desc);
b94d5230
DW		 3491}
3492
3493static int acpi_nfit_remove(struct acpi_device *adev)
3494{
fbabd829 3495 /* see acpi_nfit_unregister */
b94d5230
DW		 3496 return 0;
3497}
3498
56b47fe6 3499static void acpi_nfit_update_notify(struct device *dev, acpi_handle handle)
20985164 3500{
c14a868a 3501 struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev);
20985164 3502 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
e7a11b44 3503 union acpi_object *obj;
20985164
VV		 3504 acpi_status status;
3505 int ret;
3506
20985164
VV		 3507 if (!dev->driver) {
3508 /* dev->driver may be null if we're being removed */
b814735f 3509 dev_dbg(dev, "no driver found for dev\n");
c14a868a 3510 return;
20985164
VV		 3511 }
3512
3513 if (!acpi_desc) {
a61fe6f7
DW		 3514 acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
3515 if (!acpi_desc)
c14a868a
DW		 3516 return;
3517 acpi_nfit_desc_init(acpi_desc, dev);
7ae0fa43
DW		 3518 } else {
3519 /*
3520 * Finish previous registration before considering new
3521 * regions.
3522 */
3523 flush_workqueue(nfit_wq);
20985164
VV		 3524 }
3525
3526 /* Evaluate _FIT */
c14a868a 3527 status = acpi_evaluate_object(handle, "_FIT", NULL, &buf);
20985164
VV		 3528 if (ACPI_FAILURE(status)) {
3529 dev_err(dev, "failed to evaluate _FIT\n");
c14a868a 3530 return;
20985164
VV		 3531 }
3532
6b577c9d
LK		 3533 obj = buf.pointer;
3534 if (obj->type == ACPI_TYPE_BUFFER) {
e7a11b44
DW		 3535 ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer,
3536 obj->buffer.length);
31932041 3537 if (ret)
6b577c9d 3538 dev_err(dev, "failed to merge updated NFIT\n");
31932041 3539 } else
6b577c9d 3540 dev_err(dev, "Invalid _FIT\n");
20985164 3541 kfree(buf.pointer);
c14a868a 3542}
56b47fe6
TK		 3543
3544static void acpi_nfit_uc_error_notify(struct device *dev, acpi_handle handle)
3545{
3546 struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev);
14c73f99
DW		 3547 unsigned long flags = (acpi_desc->scrub_mode == HW_ERROR_SCRUB_ON) ?
3548 0 : 1 << ARS_SHORT;
56b47fe6 3549
80790039 3550 acpi_nfit_ars_rescan(acpi_desc, flags);
56b47fe6
TK		 3551}
3552
3553void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event)
3554{
b814735f 3555 dev_dbg(dev, "event: 0x%x\n", event);
56b47fe6
TK		 3556
3557 switch (event) {
3558 case NFIT_NOTIFY_UPDATE:
3559 return acpi_nfit_update_notify(dev, handle);
3560 case NFIT_NOTIFY_UC_MEMORY_ERROR:
3561 return acpi_nfit_uc_error_notify(dev, handle);
3562 default:
3563 return;
3564 }
3565}
c14a868a 3566EXPORT_SYMBOL_GPL(__acpi_nfit_notify);
20985164 3567
c14a868a
DW		 3568static void acpi_nfit_notify(struct acpi_device *adev, u32 event)
3569{
3570 device_lock(&adev->dev);
3571 __acpi_nfit_notify(&adev->dev, adev->handle, event);
3572 device_unlock(&adev->dev);
20985164
VV		 3573}
3574
b94d5230
DW		 3575static const struct acpi_device_id acpi_nfit_ids[] = {
3576 { "ACPI0012", 0 },
3577 { "", 0 },
3578};
3579MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids);
3580
3581static struct acpi_driver acpi_nfit_driver = {
3582 .name = KBUILD_MODNAME,
3583 .ids = acpi_nfit_ids,
3584 .ops = {
3585 .add = acpi_nfit_add,
3586 .remove = acpi_nfit_remove,
20985164 3587 .notify = acpi_nfit_notify,
b94d5230
DW		 3588 },
3589};
3590
3591static __init int nfit_init(void)
3592{
7e700d2c
PB		 3593 int ret;
3594
b94d5230
DW		 3595 BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40);
3596 BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56);
3597 BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48);
3598 BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20);
3599 BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9);
3600 BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80);
3601 BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40);
06e8ccda 3602 BUILD_BUG_ON(sizeof(struct acpi_nfit_capabilities) != 16);
b94d5230 3603
41c8bdb3
AS		 3604 guid_parse(UUID_VOLATILE_MEMORY, &nfit_uuid[NFIT_SPA_VOLATILE]);
3605 guid_parse(UUID_PERSISTENT_MEMORY, &nfit_uuid[NFIT_SPA_PM]);
3606 guid_parse(UUID_CONTROL_REGION, &nfit_uuid[NFIT_SPA_DCR]);
3607 guid_parse(UUID_DATA_REGION, &nfit_uuid[NFIT_SPA_BDW]);
3608 guid_parse(UUID_VOLATILE_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_VDISK]);
3609 guid_parse(UUID_VOLATILE_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_VCD]);
3610 guid_parse(UUID_PERSISTENT_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_PDISK]);
3611 guid_parse(UUID_PERSISTENT_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_PCD]);
3612 guid_parse(UUID_NFIT_BUS, &nfit_uuid[NFIT_DEV_BUS]);
3613 guid_parse(UUID_NFIT_DIMM, &nfit_uuid[NFIT_DEV_DIMM]);
3614 guid_parse(UUID_NFIT_DIMM_N_HPE1, &nfit_uuid[NFIT_DEV_DIMM_N_HPE1]);
3615 guid_parse(UUID_NFIT_DIMM_N_HPE2, &nfit_uuid[NFIT_DEV_DIMM_N_HPE2]);
3616 guid_parse(UUID_NFIT_DIMM_N_MSFT, &nfit_uuid[NFIT_DEV_DIMM_N_MSFT]);
b94d5230 3617
7ae0fa43
DW		 3618 nfit_wq = create_singlethread_workqueue("nfit");
3619 if (!nfit_wq)
3620 return -ENOMEM;
3621
6839a6d9 3622 nfit_mce_register();
7e700d2c
PB		 3623 ret = acpi_bus_register_driver(&acpi_nfit_driver);
3624 if (ret) {
3625 nfit_mce_unregister();
3626 destroy_workqueue(nfit_wq);
3627 }
3628
3629 return ret;
6839a6d9 3630
b94d5230
DW		 3631}
3632
3633static __exit void nfit_exit(void)
3634{
6839a6d9 3635 nfit_mce_unregister();
b94d5230 3636 acpi_bus_unregister_driver(&acpi_nfit_driver);
7ae0fa43 3637 destroy_workqueue(nfit_wq);
6839a6d9 3638 WARN_ON(!list_empty(&acpi_descs));
b94d5230
DW		 3639}
3640
3641module_init(nfit_init);
3642module_exit(nfit_exit);
3643MODULE_LICENSE("GPL v2");
3644MODULE_AUTHOR("Intel Corporation");
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git