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5b497af4 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
b94d5230 DW |
2 | /* |
3 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
b94d5230 DW |
4 | */ |
5 | #include <linux/list_sort.h> | |
6 | #include <linux/libnvdimm.h> | |
7 | #include <linux/module.h> | |
9a7e3d7f | 8 | #include <linux/nospec.h> |
047fc8a1 | 9 | #include <linux/mutex.h> |
62232e45 | 10 | #include <linux/ndctl.h> |
37b137ff | 11 | #include <linux/sysfs.h> |
0caeef63 | 12 | #include <linux/delay.h> |
b94d5230 DW |
13 | #include <linux/list.h> |
14 | #include <linux/acpi.h> | |
eaf96153 | 15 | #include <linux/sort.h> |
047fc8a1 | 16 | #include <linux/io.h> |
1cf03c00 | 17 | #include <linux/nd.h> |
96601adb | 18 | #include <asm/cacheflush.h> |
23222f8f | 19 | #include <acpi/nfit.h> |
b3ed2ce0 | 20 | #include "intel.h" |
b94d5230 DW |
21 | #include "nfit.h" |
22 | ||
047fc8a1 RZ |
23 | /* |
24 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is | |
25 | * irrelevant. | |
26 | */ | |
2f8e2c87 | 27 | #include <linux/io-64-nonatomic-hi-lo.h> |
047fc8a1 | 28 | |
4d88a97a DW |
29 | static bool force_enable_dimms; |
30 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); | |
31 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); | |
32 | ||
87554098 DW |
33 | static bool disable_vendor_specific; |
34 | module_param(disable_vendor_specific, bool, S_IRUGO); | |
35 | MODULE_PARM_DESC(disable_vendor_specific, | |
f2668fa7 | 36 | "Limit commands to the publicly specified set"); |
87554098 | 37 | |
095ab4b3 LK |
38 | static unsigned long override_dsm_mask; |
39 | module_param(override_dsm_mask, ulong, S_IRUGO); | |
40 | MODULE_PARM_DESC(override_dsm_mask, "Bitmask of allowed NVDIMM DSM functions"); | |
41 | ||
ba650cfc LK |
42 | static int default_dsm_family = -1; |
43 | module_param(default_dsm_family, int, S_IRUGO); | |
44 | MODULE_PARM_DESC(default_dsm_family, | |
45 | "Try this DSM type first when identifying NVDIMM family"); | |
46 | ||
bca811a7 DW |
47 | static bool no_init_ars; |
48 | module_param(no_init_ars, bool, 0644); | |
49 | MODULE_PARM_DESC(no_init_ars, "Skip ARS run at nfit init time"); | |
50 | ||
0171b6b7 DW |
51 | static bool force_labels; |
52 | module_param(force_labels, bool, 0444); | |
53 | MODULE_PARM_DESC(force_labels, "Opt-in to labels despite missing methods"); | |
54 | ||
6839a6d9 VV |
55 | LIST_HEAD(acpi_descs); |
56 | DEFINE_MUTEX(acpi_desc_lock); | |
57 | ||
7ae0fa43 DW |
58 | static struct workqueue_struct *nfit_wq; |
59 | ||
20985164 VV |
60 | struct nfit_table_prev { |
61 | struct list_head spas; | |
62 | struct list_head memdevs; | |
63 | struct list_head dcrs; | |
64 | struct list_head bdws; | |
65 | struct list_head idts; | |
66 | struct list_head flushes; | |
67 | }; | |
68 | ||
41c8bdb3 | 69 | static guid_t nfit_uuid[NFIT_UUID_MAX]; |
b94d5230 | 70 | |
41c8bdb3 | 71 | const guid_t *to_nfit_uuid(enum nfit_uuids id) |
b94d5230 | 72 | { |
41c8bdb3 | 73 | return &nfit_uuid[id]; |
b94d5230 | 74 | } |
6bc75619 | 75 | EXPORT_SYMBOL(to_nfit_uuid); |
b94d5230 | 76 | |
6450ddbd DW |
77 | static const guid_t *to_nfit_bus_uuid(int family) |
78 | { | |
79 | if (WARN_ONCE(family == NVDIMM_BUS_FAMILY_NFIT, | |
80 | "only secondary bus families can be translated\n")) | |
81 | return NULL; | |
82 | /* | |
83 | * The index of bus UUIDs starts immediately following the last | |
84 | * NVDIMM/leaf family. | |
85 | */ | |
86 | return to_nfit_uuid(family + NVDIMM_FAMILY_MAX); | |
87 | } | |
88 | ||
62232e45 DW |
89 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) |
90 | { | |
91 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
92 | ||
93 | /* | |
94 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct | |
95 | * acpi_device. | |
96 | */ | |
97 | if (!nd_desc->provider_name | |
98 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) | |
99 | return NULL; | |
100 | ||
101 | return to_acpi_device(acpi_desc->dev); | |
102 | } | |
103 | ||
d6eb270c | 104 | static int xlat_bus_status(void *buf, unsigned int cmd, u32 status) |
aef25338 | 105 | { |
d4f32367 | 106 | struct nd_cmd_clear_error *clear_err; |
aef25338 | 107 | struct nd_cmd_ars_status *ars_status; |
aef25338 DW |
108 | u16 flags; |
109 | ||
110 | switch (cmd) { | |
111 | case ND_CMD_ARS_CAP: | |
11294d63 | 112 | if ((status & 0xffff) == NFIT_ARS_CAP_NONE) |
aef25338 DW |
113 | return -ENOTTY; |
114 | ||
115 | /* Command failed */ | |
11294d63 | 116 | if (status & 0xffff) |
aef25338 DW |
117 | return -EIO; |
118 | ||
119 | /* No supported scan types for this range */ | |
120 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; | |
11294d63 | 121 | if ((status >> 16 & flags) == 0) |
aef25338 | 122 | return -ENOTTY; |
9a901f54 | 123 | return 0; |
aef25338 | 124 | case ND_CMD_ARS_START: |
aef25338 | 125 | /* ARS is in progress */ |
11294d63 | 126 | if ((status & 0xffff) == NFIT_ARS_START_BUSY) |
aef25338 DW |
127 | return -EBUSY; |
128 | ||
129 | /* Command failed */ | |
11294d63 | 130 | if (status & 0xffff) |
aef25338 | 131 | return -EIO; |
9a901f54 | 132 | return 0; |
aef25338 DW |
133 | case ND_CMD_ARS_STATUS: |
134 | ars_status = buf; | |
135 | /* Command failed */ | |
11294d63 | 136 | if (status & 0xffff) |
aef25338 DW |
137 | return -EIO; |
138 | /* Check extended status (Upper two bytes) */ | |
11294d63 | 139 | if (status == NFIT_ARS_STATUS_DONE) |
aef25338 DW |
140 | return 0; |
141 | ||
142 | /* ARS is in progress */ | |
11294d63 | 143 | if (status == NFIT_ARS_STATUS_BUSY) |
aef25338 DW |
144 | return -EBUSY; |
145 | ||
146 | /* No ARS performed for the current boot */ | |
11294d63 | 147 | if (status == NFIT_ARS_STATUS_NONE) |
aef25338 DW |
148 | return -EAGAIN; |
149 | ||
150 | /* | |
151 | * ARS interrupted, either we overflowed or some other | |
152 | * agent wants the scan to stop. If we didn't overflow | |
153 | * then just continue with the returned results. | |
154 | */ | |
11294d63 | 155 | if (status == NFIT_ARS_STATUS_INTR) { |
82aa37cf DW |
156 | if (ars_status->out_length >= 40 && (ars_status->flags |
157 | & NFIT_ARS_F_OVERFLOW)) | |
aef25338 DW |
158 | return -ENOSPC; |
159 | return 0; | |
160 | } | |
161 | ||
162 | /* Unknown status */ | |
11294d63 | 163 | if (status >> 16) |
aef25338 | 164 | return -EIO; |
9a901f54 | 165 | return 0; |
d4f32367 DW |
166 | case ND_CMD_CLEAR_ERROR: |
167 | clear_err = buf; | |
11294d63 | 168 | if (status & 0xffff) |
d4f32367 DW |
169 | return -EIO; |
170 | if (!clear_err->cleared) | |
171 | return -EIO; | |
172 | if (clear_err->length > clear_err->cleared) | |
173 | return clear_err->cleared; | |
9a901f54 | 174 | return 0; |
aef25338 DW |
175 | default: |
176 | break; | |
177 | } | |
178 | ||
11294d63 DW |
179 | /* all other non-zero status results in an error */ |
180 | if (status) | |
181 | return -EIO; | |
aef25338 DW |
182 | return 0; |
183 | } | |
184 | ||
4b27db7e DW |
185 | #define ACPI_LABELS_LOCKED 3 |
186 | ||
187 | static int xlat_nvdimm_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, | |
188 | u32 status) | |
9d62ed96 | 189 | { |
4b27db7e DW |
190 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
191 | ||
9d62ed96 DW |
192 | switch (cmd) { |
193 | case ND_CMD_GET_CONFIG_SIZE: | |
4b27db7e DW |
194 | /* |
195 | * In the _LSI, _LSR, _LSW case the locked status is | |
196 | * communicated via the read/write commands | |
197 | */ | |
6f07f86c | 198 | if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) |
4b27db7e DW |
199 | break; |
200 | ||
9d62ed96 DW |
201 | if (status >> 16 & ND_CONFIG_LOCKED) |
202 | return -EACCES; | |
203 | break; | |
4b27db7e | 204 | case ND_CMD_GET_CONFIG_DATA: |
6f07f86c DW |
205 | if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags) |
206 | && status == ACPI_LABELS_LOCKED) | |
4b27db7e DW |
207 | return -EACCES; |
208 | break; | |
209 | case ND_CMD_SET_CONFIG_DATA: | |
6f07f86c DW |
210 | if (test_bit(NFIT_MEM_LSW, &nfit_mem->flags) |
211 | && status == ACPI_LABELS_LOCKED) | |
4b27db7e DW |
212 | return -EACCES; |
213 | break; | |
9d62ed96 DW |
214 | default: |
215 | break; | |
216 | } | |
217 | ||
218 | /* all other non-zero status results in an error */ | |
219 | if (status) | |
220 | return -EIO; | |
221 | return 0; | |
222 | } | |
223 | ||
d6eb270c DW |
224 | static int xlat_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, |
225 | u32 status) | |
226 | { | |
227 | if (!nvdimm) | |
228 | return xlat_bus_status(buf, cmd, status); | |
4b27db7e DW |
229 | return xlat_nvdimm_status(nvdimm, buf, cmd, status); |
230 | } | |
231 | ||
232 | /* convert _LS{I,R} packages to the buffer object acpi_nfit_ctl expects */ | |
233 | static union acpi_object *pkg_to_buf(union acpi_object *pkg) | |
234 | { | |
235 | int i; | |
236 | void *dst; | |
237 | size_t size = 0; | |
238 | union acpi_object *buf = NULL; | |
239 | ||
240 | if (pkg->type != ACPI_TYPE_PACKAGE) { | |
241 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", | |
242 | pkg->type); | |
243 | goto err; | |
244 | } | |
245 | ||
246 | for (i = 0; i < pkg->package.count; i++) { | |
247 | union acpi_object *obj = &pkg->package.elements[i]; | |
248 | ||
249 | if (obj->type == ACPI_TYPE_INTEGER) | |
250 | size += 4; | |
251 | else if (obj->type == ACPI_TYPE_BUFFER) | |
252 | size += obj->buffer.length; | |
253 | else { | |
254 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", | |
255 | obj->type); | |
256 | goto err; | |
257 | } | |
258 | } | |
259 | ||
260 | buf = ACPI_ALLOCATE(sizeof(*buf) + size); | |
261 | if (!buf) | |
262 | goto err; | |
263 | ||
264 | dst = buf + 1; | |
265 | buf->type = ACPI_TYPE_BUFFER; | |
266 | buf->buffer.length = size; | |
267 | buf->buffer.pointer = dst; | |
268 | for (i = 0; i < pkg->package.count; i++) { | |
269 | union acpi_object *obj = &pkg->package.elements[i]; | |
270 | ||
271 | if (obj->type == ACPI_TYPE_INTEGER) { | |
272 | memcpy(dst, &obj->integer.value, 4); | |
273 | dst += 4; | |
274 | } else if (obj->type == ACPI_TYPE_BUFFER) { | |
275 | memcpy(dst, obj->buffer.pointer, obj->buffer.length); | |
276 | dst += obj->buffer.length; | |
277 | } | |
278 | } | |
279 | err: | |
280 | ACPI_FREE(pkg); | |
281 | return buf; | |
282 | } | |
283 | ||
284 | static union acpi_object *int_to_buf(union acpi_object *integer) | |
285 | { | |
1a57b1a3 | 286 | union acpi_object *buf = NULL; |
4b27db7e DW |
287 | void *dst = NULL; |
288 | ||
4b27db7e DW |
289 | if (integer->type != ACPI_TYPE_INTEGER) { |
290 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", | |
291 | integer->type); | |
292 | goto err; | |
293 | } | |
294 | ||
1a57b1a3 ZL |
295 | buf = ACPI_ALLOCATE(sizeof(*buf) + 4); |
296 | if (!buf) | |
297 | goto err; | |
298 | ||
4b27db7e DW |
299 | dst = buf + 1; |
300 | buf->type = ACPI_TYPE_BUFFER; | |
301 | buf->buffer.length = 4; | |
302 | buf->buffer.pointer = dst; | |
303 | memcpy(dst, &integer->integer.value, 4); | |
304 | err: | |
305 | ACPI_FREE(integer); | |
306 | return buf; | |
307 | } | |
308 | ||
309 | static union acpi_object *acpi_label_write(acpi_handle handle, u32 offset, | |
310 | u32 len, void *data) | |
311 | { | |
312 | acpi_status rc; | |
313 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
314 | struct acpi_object_list input = { | |
315 | .count = 3, | |
316 | .pointer = (union acpi_object []) { | |
317 | [0] = { | |
318 | .integer.type = ACPI_TYPE_INTEGER, | |
319 | .integer.value = offset, | |
320 | }, | |
321 | [1] = { | |
322 | .integer.type = ACPI_TYPE_INTEGER, | |
323 | .integer.value = len, | |
324 | }, | |
325 | [2] = { | |
326 | .buffer.type = ACPI_TYPE_BUFFER, | |
327 | .buffer.pointer = data, | |
328 | .buffer.length = len, | |
329 | }, | |
330 | }, | |
331 | }; | |
332 | ||
333 | rc = acpi_evaluate_object(handle, "_LSW", &input, &buf); | |
334 | if (ACPI_FAILURE(rc)) | |
335 | return NULL; | |
336 | return int_to_buf(buf.pointer); | |
337 | } | |
338 | ||
339 | static union acpi_object *acpi_label_read(acpi_handle handle, u32 offset, | |
340 | u32 len) | |
341 | { | |
342 | acpi_status rc; | |
343 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
344 | struct acpi_object_list input = { | |
345 | .count = 2, | |
346 | .pointer = (union acpi_object []) { | |
347 | [0] = { | |
348 | .integer.type = ACPI_TYPE_INTEGER, | |
349 | .integer.value = offset, | |
350 | }, | |
351 | [1] = { | |
352 | .integer.type = ACPI_TYPE_INTEGER, | |
353 | .integer.value = len, | |
354 | }, | |
355 | }, | |
356 | }; | |
357 | ||
358 | rc = acpi_evaluate_object(handle, "_LSR", &input, &buf); | |
359 | if (ACPI_FAILURE(rc)) | |
360 | return NULL; | |
361 | return pkg_to_buf(buf.pointer); | |
362 | } | |
363 | ||
364 | static union acpi_object *acpi_label_info(acpi_handle handle) | |
365 | { | |
366 | acpi_status rc; | |
367 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
368 | ||
369 | rc = acpi_evaluate_object(handle, "_LSI", NULL, &buf); | |
370 | if (ACPI_FAILURE(rc)) | |
371 | return NULL; | |
372 | return pkg_to_buf(buf.pointer); | |
d6eb270c DW |
373 | } |
374 | ||
11e14270 DW |
375 | static u8 nfit_dsm_revid(unsigned family, unsigned func) |
376 | { | |
01091c49 | 377 | static const u8 revid_table[NVDIMM_FAMILY_MAX+1][NVDIMM_CMD_MAX+1] = { |
11e14270 | 378 | [NVDIMM_FAMILY_INTEL] = { |
6450ddbd DW |
379 | [NVDIMM_INTEL_GET_MODES ... |
380 | NVDIMM_INTEL_FW_ACTIVATE_ARM] = 2, | |
11e14270 DW |
381 | }, |
382 | }; | |
383 | u8 id; | |
384 | ||
385 | if (family > NVDIMM_FAMILY_MAX) | |
386 | return 0; | |
01091c49 | 387 | if (func > NVDIMM_CMD_MAX) |
11e14270 DW |
388 | return 0; |
389 | id = revid_table[family][func]; | |
390 | if (id == 0) | |
391 | return 1; /* default */ | |
392 | return id; | |
393 | } | |
394 | ||
b3ed2ce0 DJ |
395 | static bool payload_dumpable(struct nvdimm *nvdimm, unsigned int func) |
396 | { | |
397 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
398 | ||
399 | if (nfit_mem && nfit_mem->family == NVDIMM_FAMILY_INTEL | |
400 | && func >= NVDIMM_INTEL_GET_SECURITY_STATE | |
401 | && func <= NVDIMM_INTEL_MASTER_SECURE_ERASE) | |
402 | return IS_ENABLED(CONFIG_NFIT_SECURITY_DEBUG); | |
403 | return true; | |
404 | } | |
405 | ||
11189c10 | 406 | static int cmd_to_func(struct nfit_mem *nfit_mem, unsigned int cmd, |
6450ddbd | 407 | struct nd_cmd_pkg *call_pkg, int *family) |
11189c10 DW |
408 | { |
409 | if (call_pkg) { | |
410 | int i; | |
411 | ||
ebe9f6f1 | 412 | if (nfit_mem && nfit_mem->family != call_pkg->nd_family) |
11189c10 DW |
413 | return -ENOTTY; |
414 | ||
415 | for (i = 0; i < ARRAY_SIZE(call_pkg->nd_reserved2); i++) | |
416 | if (call_pkg->nd_reserved2[i]) | |
417 | return -EINVAL; | |
6450ddbd | 418 | *family = call_pkg->nd_family; |
11189c10 DW |
419 | return call_pkg->nd_command; |
420 | } | |
421 | ||
ebe9f6f1 DW |
422 | /* In the !call_pkg case, bus commands == bus functions */ |
423 | if (!nfit_mem) | |
424 | return cmd; | |
425 | ||
11189c10 DW |
426 | /* Linux ND commands == NVDIMM_FAMILY_INTEL function numbers */ |
427 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) | |
428 | return cmd; | |
429 | ||
430 | /* | |
431 | * Force function number validation to fail since 0 is never | |
432 | * published as a valid function in dsm_mask. | |
433 | */ | |
434 | return 0; | |
435 | } | |
436 | ||
a7de92da DW |
437 | int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, |
438 | unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc) | |
b94d5230 | 439 | { |
8a7f02f6 | 440 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
4b27db7e | 441 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
62232e45 | 442 | union acpi_object in_obj, in_buf, *out_obj; |
31eca76b | 443 | const struct nd_cmd_desc *desc = NULL; |
62232e45 | 444 | struct device *dev = acpi_desc->dev; |
31eca76b | 445 | struct nd_cmd_pkg *call_pkg = NULL; |
62232e45 | 446 | const char *cmd_name, *dimm_name; |
31eca76b | 447 | unsigned long cmd_mask, dsm_mask; |
11294d63 | 448 | u32 offset, fw_status = 0; |
62232e45 | 449 | acpi_handle handle; |
41c8bdb3 | 450 | const guid_t *guid; |
11189c10 | 451 | int func, rc, i; |
6450ddbd | 452 | int family = 0; |
62232e45 | 453 | |
ee6581ce DJ |
454 | if (cmd_rc) |
455 | *cmd_rc = -EINVAL; | |
31eca76b | 456 | |
ebe9f6f1 DW |
457 | if (cmd == ND_CMD_CALL) |
458 | call_pkg = buf; | |
6450ddbd | 459 | func = cmd_to_func(nfit_mem, cmd, call_pkg, &family); |
ebe9f6f1 DW |
460 | if (func < 0) |
461 | return func; | |
462 | ||
62232e45 | 463 | if (nvdimm) { |
62232e45 DW |
464 | struct acpi_device *adev = nfit_mem->adev; |
465 | ||
466 | if (!adev) | |
467 | return -ENOTTY; | |
31eca76b | 468 | |
047fc8a1 | 469 | dimm_name = nvdimm_name(nvdimm); |
62232e45 | 470 | cmd_name = nvdimm_cmd_name(cmd); |
e3654eca | 471 | cmd_mask = nvdimm_cmd_mask(nvdimm); |
62232e45 DW |
472 | dsm_mask = nfit_mem->dsm_mask; |
473 | desc = nd_cmd_dimm_desc(cmd); | |
41c8bdb3 | 474 | guid = to_nfit_uuid(nfit_mem->family); |
62232e45 DW |
475 | handle = adev->handle; |
476 | } else { | |
477 | struct acpi_device *adev = to_acpi_dev(acpi_desc); | |
478 | ||
479 | cmd_name = nvdimm_bus_cmd_name(cmd); | |
e3654eca | 480 | cmd_mask = nd_desc->cmd_mask; |
6450ddbd DW |
481 | if (cmd == ND_CMD_CALL && call_pkg->nd_family) { |
482 | family = call_pkg->nd_family; | |
9a7e3d7f DW |
483 | if (family > NVDIMM_BUS_FAMILY_MAX || |
484 | !test_bit(family, &nd_desc->bus_family_mask)) | |
6450ddbd | 485 | return -EINVAL; |
9a7e3d7f DW |
486 | family = array_index_nospec(family, |
487 | NVDIMM_BUS_FAMILY_MAX + 1); | |
6450ddbd DW |
488 | dsm_mask = acpi_desc->family_dsm_mask[family]; |
489 | guid = to_nfit_bus_uuid(family); | |
490 | } else { | |
491 | dsm_mask = acpi_desc->bus_dsm_mask; | |
492 | guid = to_nfit_uuid(NFIT_DEV_BUS); | |
493 | } | |
62232e45 | 494 | desc = nd_cmd_bus_desc(cmd); |
62232e45 DW |
495 | handle = adev->handle; |
496 | dimm_name = "bus"; | |
497 | } | |
498 | ||
499 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) | |
500 | return -ENOTTY; | |
501 | ||
11189c10 DW |
502 | /* |
503 | * Check for a valid command. For ND_CMD_CALL, we also have to | |
504 | * make sure that the DSM function is supported. | |
505 | */ | |
01091c49 DC |
506 | if (cmd == ND_CMD_CALL && |
507 | (func > NVDIMM_CMD_MAX || !test_bit(func, &dsm_mask))) | |
11189c10 DW |
508 | return -ENOTTY; |
509 | else if (!test_bit(cmd, &cmd_mask)) | |
62232e45 DW |
510 | return -ENOTTY; |
511 | ||
512 | in_obj.type = ACPI_TYPE_PACKAGE; | |
513 | in_obj.package.count = 1; | |
514 | in_obj.package.elements = &in_buf; | |
515 | in_buf.type = ACPI_TYPE_BUFFER; | |
516 | in_buf.buffer.pointer = buf; | |
517 | in_buf.buffer.length = 0; | |
518 | ||
519 | /* libnvdimm has already validated the input envelope */ | |
520 | for (i = 0; i < desc->in_num; i++) | |
521 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, | |
522 | i, buf); | |
523 | ||
31eca76b DW |
524 | if (call_pkg) { |
525 | /* skip over package wrapper */ | |
526 | in_buf.buffer.pointer = (void *) &call_pkg->nd_payload; | |
527 | in_buf.buffer.length = call_pkg->nd_size_in; | |
528 | } | |
529 | ||
6450ddbd DW |
530 | dev_dbg(dev, "%s cmd: %d: family: %d func: %d input length: %d\n", |
531 | dimm_name, cmd, family, func, in_buf.buffer.length); | |
b3ed2ce0 DJ |
532 | if (payload_dumpable(nvdimm, func)) |
533 | print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4, | |
534 | in_buf.buffer.pointer, | |
535 | min_t(u32, 256, in_buf.buffer.length), true); | |
62232e45 | 536 | |
4b27db7e | 537 | /* call the BIOS, prefer the named methods over _DSM if available */ |
6f07f86c DW |
538 | if (nvdimm && cmd == ND_CMD_GET_CONFIG_SIZE |
539 | && test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) | |
4b27db7e | 540 | out_obj = acpi_label_info(handle); |
6f07f86c DW |
541 | else if (nvdimm && cmd == ND_CMD_GET_CONFIG_DATA |
542 | && test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) { | |
4b27db7e DW |
543 | struct nd_cmd_get_config_data_hdr *p = buf; |
544 | ||
545 | out_obj = acpi_label_read(handle, p->in_offset, p->in_length); | |
0e7f0741 | 546 | } else if (nvdimm && cmd == ND_CMD_SET_CONFIG_DATA |
6f07f86c | 547 | && test_bit(NFIT_MEM_LSW, &nfit_mem->flags)) { |
4b27db7e DW |
548 | struct nd_cmd_set_config_hdr *p = buf; |
549 | ||
550 | out_obj = acpi_label_write(handle, p->in_offset, p->in_length, | |
551 | p->in_buf); | |
11e14270 DW |
552 | } else { |
553 | u8 revid; | |
554 | ||
0e7f0741 | 555 | if (nvdimm) |
11e14270 DW |
556 | revid = nfit_dsm_revid(nfit_mem->family, func); |
557 | else | |
558 | revid = 1; | |
559 | out_obj = acpi_evaluate_dsm(handle, guid, revid, func, &in_obj); | |
560 | } | |
4b27db7e | 561 | |
62232e45 | 562 | if (!out_obj) { |
b814735f | 563 | dev_dbg(dev, "%s _DSM failed cmd: %s\n", dimm_name, cmd_name); |
62232e45 DW |
564 | return -EINVAL; |
565 | } | |
566 | ||
43f89877 DC |
567 | if (out_obj->type != ACPI_TYPE_BUFFER) { |
568 | dev_dbg(dev, "%s unexpected output object type cmd: %s type: %d\n", | |
569 | dimm_name, cmd_name, out_obj->type); | |
570 | rc = -EINVAL; | |
571 | goto out; | |
572 | } | |
573 | ||
351f339f DW |
574 | dev_dbg(dev, "%s cmd: %s output length: %d\n", dimm_name, |
575 | cmd_name, out_obj->buffer.length); | |
576 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, 4, | |
577 | out_obj->buffer.pointer, | |
578 | min_t(u32, 128, out_obj->buffer.length), true); | |
579 | ||
31eca76b DW |
580 | if (call_pkg) { |
581 | call_pkg->nd_fw_size = out_obj->buffer.length; | |
582 | memcpy(call_pkg->nd_payload + call_pkg->nd_size_in, | |
583 | out_obj->buffer.pointer, | |
584 | min(call_pkg->nd_fw_size, call_pkg->nd_size_out)); | |
585 | ||
586 | ACPI_FREE(out_obj); | |
587 | /* | |
588 | * Need to support FW function w/o known size in advance. | |
589 | * Caller can determine required size based upon nd_fw_size. | |
590 | * If we return an error (like elsewhere) then caller wouldn't | |
591 | * be able to rely upon data returned to make calculation. | |
592 | */ | |
ee6581ce DJ |
593 | if (cmd_rc) |
594 | *cmd_rc = 0; | |
31eca76b DW |
595 | return 0; |
596 | } | |
597 | ||
62232e45 DW |
598 | for (i = 0, offset = 0; i < desc->out_num; i++) { |
599 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, | |
efda1b5d DW |
600 | (u32 *) out_obj->buffer.pointer, |
601 | out_obj->buffer.length - offset); | |
62232e45 DW |
602 | |
603 | if (offset + out_size > out_obj->buffer.length) { | |
b814735f JT |
604 | dev_dbg(dev, "%s output object underflow cmd: %s field: %d\n", |
605 | dimm_name, cmd_name, i); | |
62232e45 DW |
606 | break; |
607 | } | |
608 | ||
609 | if (in_buf.buffer.length + offset + out_size > buf_len) { | |
b814735f JT |
610 | dev_dbg(dev, "%s output overrun cmd: %s field: %d\n", |
611 | dimm_name, cmd_name, i); | |
62232e45 DW |
612 | rc = -ENXIO; |
613 | goto out; | |
614 | } | |
615 | memcpy(buf + in_buf.buffer.length + offset, | |
616 | out_obj->buffer.pointer + offset, out_size); | |
617 | offset += out_size; | |
618 | } | |
11294d63 DW |
619 | |
620 | /* | |
621 | * Set fw_status for all the commands with a known format to be | |
622 | * later interpreted by xlat_status(). | |
623 | */ | |
0e7f0741 DW |
624 | if (i >= 1 && ((!nvdimm && cmd >= ND_CMD_ARS_CAP |
625 | && cmd <= ND_CMD_CLEAR_ERROR) | |
626 | || (nvdimm && cmd >= ND_CMD_SMART | |
627 | && cmd <= ND_CMD_VENDOR))) | |
11294d63 DW |
628 | fw_status = *(u32 *) out_obj->buffer.pointer; |
629 | ||
62232e45 DW |
630 | if (offset + in_buf.buffer.length < buf_len) { |
631 | if (i >= 1) { | |
632 | /* | |
633 | * status valid, return the number of bytes left | |
634 | * unfilled in the output buffer | |
635 | */ | |
636 | rc = buf_len - offset - in_buf.buffer.length; | |
aef25338 | 637 | if (cmd_rc) |
d6eb270c DW |
638 | *cmd_rc = xlat_status(nvdimm, buf, cmd, |
639 | fw_status); | |
62232e45 DW |
640 | } else { |
641 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", | |
642 | __func__, dimm_name, cmd_name, buf_len, | |
643 | offset); | |
644 | rc = -ENXIO; | |
645 | } | |
2eea6582 | 646 | } else { |
62232e45 | 647 | rc = 0; |
2eea6582 | 648 | if (cmd_rc) |
d6eb270c | 649 | *cmd_rc = xlat_status(nvdimm, buf, cmd, fw_status); |
2eea6582 | 650 | } |
62232e45 DW |
651 | |
652 | out: | |
653 | ACPI_FREE(out_obj); | |
654 | ||
655 | return rc; | |
b94d5230 | 656 | } |
a7de92da | 657 | EXPORT_SYMBOL_GPL(acpi_nfit_ctl); |
b94d5230 DW |
658 | |
659 | static const char *spa_type_name(u16 type) | |
660 | { | |
661 | static const char *to_name[] = { | |
662 | [NFIT_SPA_VOLATILE] = "volatile", | |
663 | [NFIT_SPA_PM] = "pmem", | |
664 | [NFIT_SPA_DCR] = "dimm-control-region", | |
665 | [NFIT_SPA_BDW] = "block-data-window", | |
666 | [NFIT_SPA_VDISK] = "volatile-disk", | |
667 | [NFIT_SPA_VCD] = "volatile-cd", | |
668 | [NFIT_SPA_PDISK] = "persistent-disk", | |
669 | [NFIT_SPA_PCD] = "persistent-cd", | |
670 | ||
671 | }; | |
672 | ||
673 | if (type > NFIT_SPA_PCD) | |
674 | return "unknown"; | |
675 | ||
676 | return to_name[type]; | |
677 | } | |
678 | ||
6839a6d9 | 679 | int nfit_spa_type(struct acpi_nfit_system_address *spa) |
b94d5230 | 680 | { |
abc14eb1 | 681 | guid_t guid; |
b94d5230 DW |
682 | int i; |
683 | ||
abc14eb1 | 684 | import_guid(&guid, spa->range_guid); |
b94d5230 | 685 | for (i = 0; i < NFIT_UUID_MAX; i++) |
abc14eb1 | 686 | if (guid_equal(to_nfit_uuid(i), &guid)) |
b94d5230 DW |
687 | return i; |
688 | return -1; | |
689 | } | |
690 | ||
e9cfd259 DW |
691 | static size_t sizeof_spa(struct acpi_nfit_system_address *spa) |
692 | { | |
693 | if (spa->flags & ACPI_NFIT_LOCATION_COOKIE_VALID) | |
694 | return sizeof(*spa); | |
695 | return sizeof(*spa) - 8; | |
696 | } | |
697 | ||
b94d5230 | 698 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, |
20985164 | 699 | struct nfit_table_prev *prev, |
b94d5230 DW |
700 | struct acpi_nfit_system_address *spa) |
701 | { | |
702 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
703 | struct nfit_spa *nfit_spa; |
704 | ||
e9cfd259 | 705 | if (spa->header.length != sizeof_spa(spa)) |
31932041 DW |
706 | return false; |
707 | ||
20985164 | 708 | list_for_each_entry(nfit_spa, &prev->spas, list) { |
e9cfd259 | 709 | if (memcmp(nfit_spa->spa, spa, sizeof_spa(spa)) == 0) { |
20985164 VV |
710 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
711 | return true; | |
712 | } | |
713 | } | |
b94d5230 | 714 | |
e9cfd259 | 715 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof_spa(spa), |
31932041 | 716 | GFP_KERNEL); |
b94d5230 DW |
717 | if (!nfit_spa) |
718 | return false; | |
719 | INIT_LIST_HEAD(&nfit_spa->list); | |
e9cfd259 | 720 | memcpy(nfit_spa->spa, spa, sizeof_spa(spa)); |
b94d5230 | 721 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); |
b814735f | 722 | dev_dbg(dev, "spa index: %d type: %s\n", |
b94d5230 DW |
723 | spa->range_index, |
724 | spa_type_name(nfit_spa_type(spa))); | |
725 | return true; | |
726 | } | |
727 | ||
728 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 729 | struct nfit_table_prev *prev, |
b94d5230 DW |
730 | struct acpi_nfit_memory_map *memdev) |
731 | { | |
732 | struct device *dev = acpi_desc->dev; | |
20985164 | 733 | struct nfit_memdev *nfit_memdev; |
b94d5230 | 734 | |
31932041 DW |
735 | if (memdev->header.length != sizeof(*memdev)) |
736 | return false; | |
737 | ||
20985164 | 738 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
31932041 | 739 | if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) { |
20985164 VV |
740 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
741 | return true; | |
742 | } | |
743 | ||
31932041 DW |
744 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev), |
745 | GFP_KERNEL); | |
b94d5230 DW |
746 | if (!nfit_memdev) |
747 | return false; | |
748 | INIT_LIST_HEAD(&nfit_memdev->list); | |
31932041 | 749 | memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev)); |
b94d5230 | 750 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
b814735f JT |
751 | dev_dbg(dev, "memdev handle: %#x spa: %d dcr: %d flags: %#x\n", |
752 | memdev->device_handle, memdev->range_index, | |
caa603aa | 753 | memdev->region_index, memdev->flags); |
b94d5230 DW |
754 | return true; |
755 | } | |
756 | ||
23222f8f TL |
757 | int nfit_get_smbios_id(u32 device_handle, u16 *flags) |
758 | { | |
759 | struct acpi_nfit_memory_map *memdev; | |
760 | struct acpi_nfit_desc *acpi_desc; | |
761 | struct nfit_mem *nfit_mem; | |
0919871a | 762 | u16 physical_id; |
23222f8f TL |
763 | |
764 | mutex_lock(&acpi_desc_lock); | |
765 | list_for_each_entry(acpi_desc, &acpi_descs, list) { | |
766 | mutex_lock(&acpi_desc->init_mutex); | |
767 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
768 | memdev = __to_nfit_memdev(nfit_mem); | |
769 | if (memdev->device_handle == device_handle) { | |
0919871a TL |
770 | *flags = memdev->flags; |
771 | physical_id = memdev->physical_id; | |
23222f8f TL |
772 | mutex_unlock(&acpi_desc->init_mutex); |
773 | mutex_unlock(&acpi_desc_lock); | |
0919871a | 774 | return physical_id; |
23222f8f TL |
775 | } |
776 | } | |
777 | mutex_unlock(&acpi_desc->init_mutex); | |
778 | } | |
779 | mutex_unlock(&acpi_desc_lock); | |
780 | ||
781 | return -ENODEV; | |
782 | } | |
783 | EXPORT_SYMBOL_GPL(nfit_get_smbios_id); | |
784 | ||
31932041 DW |
785 | /* |
786 | * An implementation may provide a truncated control region if no block windows | |
787 | * are defined. | |
788 | */ | |
789 | static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr) | |
790 | { | |
791 | if (dcr->header.length < offsetof(struct acpi_nfit_control_region, | |
792 | window_size)) | |
793 | return 0; | |
794 | if (dcr->windows) | |
795 | return sizeof(*dcr); | |
796 | return offsetof(struct acpi_nfit_control_region, window_size); | |
797 | } | |
798 | ||
b94d5230 | 799 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, |
20985164 | 800 | struct nfit_table_prev *prev, |
b94d5230 DW |
801 | struct acpi_nfit_control_region *dcr) |
802 | { | |
803 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
804 | struct nfit_dcr *nfit_dcr; |
805 | ||
31932041 DW |
806 | if (!sizeof_dcr(dcr)) |
807 | return false; | |
808 | ||
20985164 | 809 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) |
31932041 | 810 | if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) { |
20985164 VV |
811 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
812 | return true; | |
813 | } | |
b94d5230 | 814 | |
31932041 DW |
815 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr), |
816 | GFP_KERNEL); | |
b94d5230 DW |
817 | if (!nfit_dcr) |
818 | return false; | |
819 | INIT_LIST_HEAD(&nfit_dcr->list); | |
31932041 | 820 | memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)); |
b94d5230 | 821 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
b814735f | 822 | dev_dbg(dev, "dcr index: %d windows: %d\n", |
b94d5230 DW |
823 | dcr->region_index, dcr->windows); |
824 | return true; | |
825 | } | |
826 | ||
827 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, | |
20985164 | 828 | struct nfit_table_prev *prev, |
b94d5230 DW |
829 | struct acpi_nfit_data_region *bdw) |
830 | { | |
831 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
832 | struct nfit_bdw *nfit_bdw; |
833 | ||
31932041 DW |
834 | if (bdw->header.length != sizeof(*bdw)) |
835 | return false; | |
20985164 | 836 | list_for_each_entry(nfit_bdw, &prev->bdws, list) |
31932041 | 837 | if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) { |
20985164 VV |
838 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
839 | return true; | |
840 | } | |
b94d5230 | 841 | |
31932041 DW |
842 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw), |
843 | GFP_KERNEL); | |
b94d5230 DW |
844 | if (!nfit_bdw) |
845 | return false; | |
846 | INIT_LIST_HEAD(&nfit_bdw->list); | |
31932041 | 847 | memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw)); |
b94d5230 | 848 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); |
b814735f | 849 | dev_dbg(dev, "bdw dcr: %d windows: %d\n", |
b94d5230 DW |
850 | bdw->region_index, bdw->windows); |
851 | return true; | |
852 | } | |
853 | ||
31932041 DW |
854 | static size_t sizeof_idt(struct acpi_nfit_interleave *idt) |
855 | { | |
856 | if (idt->header.length < sizeof(*idt)) | |
857 | return 0; | |
33908660 | 858 | return sizeof(*idt) + sizeof(u32) * idt->line_count; |
31932041 DW |
859 | } |
860 | ||
047fc8a1 | 861 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
20985164 | 862 | struct nfit_table_prev *prev, |
047fc8a1 RZ |
863 | struct acpi_nfit_interleave *idt) |
864 | { | |
865 | struct device *dev = acpi_desc->dev; | |
20985164 VV |
866 | struct nfit_idt *nfit_idt; |
867 | ||
31932041 DW |
868 | if (!sizeof_idt(idt)) |
869 | return false; | |
870 | ||
871 | list_for_each_entry(nfit_idt, &prev->idts, list) { | |
872 | if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt)) | |
873 | continue; | |
874 | ||
875 | if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) { | |
20985164 VV |
876 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
877 | return true; | |
878 | } | |
31932041 | 879 | } |
047fc8a1 | 880 | |
31932041 DW |
881 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt), |
882 | GFP_KERNEL); | |
047fc8a1 RZ |
883 | if (!nfit_idt) |
884 | return false; | |
885 | INIT_LIST_HEAD(&nfit_idt->list); | |
31932041 | 886 | memcpy(nfit_idt->idt, idt, sizeof_idt(idt)); |
047fc8a1 | 887 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); |
b814735f | 888 | dev_dbg(dev, "idt index: %d num_lines: %d\n", |
047fc8a1 RZ |
889 | idt->interleave_index, idt->line_count); |
890 | return true; | |
891 | } | |
892 | ||
31932041 DW |
893 | static size_t sizeof_flush(struct acpi_nfit_flush_address *flush) |
894 | { | |
895 | if (flush->header.length < sizeof(*flush)) | |
896 | return 0; | |
74522fea | 897 | return struct_size(flush, hint_address, flush->hint_count); |
31932041 DW |
898 | } |
899 | ||
c2ad2954 | 900 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
20985164 | 901 | struct nfit_table_prev *prev, |
c2ad2954 RZ |
902 | struct acpi_nfit_flush_address *flush) |
903 | { | |
904 | struct device *dev = acpi_desc->dev; | |
20985164 | 905 | struct nfit_flush *nfit_flush; |
c2ad2954 | 906 | |
31932041 DW |
907 | if (!sizeof_flush(flush)) |
908 | return false; | |
909 | ||
910 | list_for_each_entry(nfit_flush, &prev->flushes, list) { | |
911 | if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush)) | |
912 | continue; | |
913 | ||
914 | if (memcmp(nfit_flush->flush, flush, | |
915 | sizeof_flush(flush)) == 0) { | |
20985164 VV |
916 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
917 | return true; | |
918 | } | |
31932041 | 919 | } |
20985164 | 920 | |
31932041 DW |
921 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush) |
922 | + sizeof_flush(flush), GFP_KERNEL); | |
c2ad2954 RZ |
923 | if (!nfit_flush) |
924 | return false; | |
925 | INIT_LIST_HEAD(&nfit_flush->list); | |
31932041 | 926 | memcpy(nfit_flush->flush, flush, sizeof_flush(flush)); |
c2ad2954 | 927 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); |
b814735f | 928 | dev_dbg(dev, "nfit_flush handle: %d hint_count: %d\n", |
c2ad2954 RZ |
929 | flush->device_handle, flush->hint_count); |
930 | return true; | |
931 | } | |
932 | ||
06e8ccda DJ |
933 | static bool add_platform_cap(struct acpi_nfit_desc *acpi_desc, |
934 | struct acpi_nfit_capabilities *pcap) | |
935 | { | |
936 | struct device *dev = acpi_desc->dev; | |
937 | u32 mask; | |
938 | ||
939 | mask = (1 << (pcap->highest_capability + 1)) - 1; | |
940 | acpi_desc->platform_cap = pcap->capabilities & mask; | |
b814735f | 941 | dev_dbg(dev, "cap: %#x\n", acpi_desc->platform_cap); |
06e8ccda DJ |
942 | return true; |
943 | } | |
944 | ||
20985164 VV |
945 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
946 | struct nfit_table_prev *prev, void *table, const void *end) | |
b94d5230 DW |
947 | { |
948 | struct device *dev = acpi_desc->dev; | |
949 | struct acpi_nfit_header *hdr; | |
950 | void *err = ERR_PTR(-ENOMEM); | |
951 | ||
952 | if (table >= end) | |
953 | return NULL; | |
954 | ||
955 | hdr = table; | |
564d5011 VV |
956 | if (!hdr->length) { |
957 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", | |
958 | hdr->type); | |
959 | return NULL; | |
960 | } | |
961 | ||
b94d5230 DW |
962 | switch (hdr->type) { |
963 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: | |
20985164 | 964 | if (!add_spa(acpi_desc, prev, table)) |
b94d5230 DW |
965 | return err; |
966 | break; | |
967 | case ACPI_NFIT_TYPE_MEMORY_MAP: | |
20985164 | 968 | if (!add_memdev(acpi_desc, prev, table)) |
b94d5230 DW |
969 | return err; |
970 | break; | |
971 | case ACPI_NFIT_TYPE_CONTROL_REGION: | |
20985164 | 972 | if (!add_dcr(acpi_desc, prev, table)) |
b94d5230 DW |
973 | return err; |
974 | break; | |
975 | case ACPI_NFIT_TYPE_DATA_REGION: | |
20985164 | 976 | if (!add_bdw(acpi_desc, prev, table)) |
b94d5230 DW |
977 | return err; |
978 | break; | |
b94d5230 | 979 | case ACPI_NFIT_TYPE_INTERLEAVE: |
20985164 | 980 | if (!add_idt(acpi_desc, prev, table)) |
047fc8a1 | 981 | return err; |
b94d5230 DW |
982 | break; |
983 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: | |
20985164 | 984 | if (!add_flush(acpi_desc, prev, table)) |
c2ad2954 | 985 | return err; |
b94d5230 DW |
986 | break; |
987 | case ACPI_NFIT_TYPE_SMBIOS: | |
b814735f | 988 | dev_dbg(dev, "smbios\n"); |
b94d5230 | 989 | break; |
06e8ccda DJ |
990 | case ACPI_NFIT_TYPE_CAPABILITIES: |
991 | if (!add_platform_cap(acpi_desc, table)) | |
992 | return err; | |
993 | break; | |
b94d5230 DW |
994 | default: |
995 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); | |
996 | break; | |
997 | } | |
998 | ||
999 | return table + hdr->length; | |
1000 | } | |
1001 | ||
1499934d | 1002 | static int __nfit_mem_init(struct acpi_nfit_desc *acpi_desc, |
b94d5230 DW |
1003 | struct acpi_nfit_system_address *spa) |
1004 | { | |
1005 | struct nfit_mem *nfit_mem, *found; | |
1006 | struct nfit_memdev *nfit_memdev; | |
1499934d | 1007 | int type = spa ? nfit_spa_type(spa) : 0; |
b94d5230 DW |
1008 | |
1009 | switch (type) { | |
1010 | case NFIT_SPA_DCR: | |
1011 | case NFIT_SPA_PM: | |
1012 | break; | |
1013 | default: | |
1499934d DW |
1014 | if (spa) |
1015 | return 0; | |
b94d5230 DW |
1016 | } |
1017 | ||
1499934d DW |
1018 | /* |
1019 | * This loop runs in two modes, when a dimm is mapped the loop | |
1020 | * adds memdev associations to an existing dimm, or creates a | |
1021 | * dimm. In the unmapped dimm case this loop sweeps for memdev | |
1022 | * instances with an invalid / zero range_index and adds those | |
1023 | * dimms without spa associations. | |
1024 | */ | |
b94d5230 | 1025 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
ad9ac5e1 | 1026 | struct nfit_flush *nfit_flush; |
6697b2cf DW |
1027 | struct nfit_dcr *nfit_dcr; |
1028 | u32 device_handle; | |
1029 | u16 dcr; | |
b94d5230 | 1030 | |
1499934d DW |
1031 | if (spa && nfit_memdev->memdev->range_index != spa->range_index) |
1032 | continue; | |
1033 | if (!spa && nfit_memdev->memdev->range_index) | |
b94d5230 DW |
1034 | continue; |
1035 | found = NULL; | |
1036 | dcr = nfit_memdev->memdev->region_index; | |
6697b2cf | 1037 | device_handle = nfit_memdev->memdev->device_handle; |
b94d5230 | 1038 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
6697b2cf DW |
1039 | if (__to_nfit_memdev(nfit_mem)->device_handle |
1040 | == device_handle) { | |
b94d5230 DW |
1041 | found = nfit_mem; |
1042 | break; | |
1043 | } | |
1044 | ||
1045 | if (found) | |
1046 | nfit_mem = found; | |
1047 | else { | |
1048 | nfit_mem = devm_kzalloc(acpi_desc->dev, | |
1049 | sizeof(*nfit_mem), GFP_KERNEL); | |
1050 | if (!nfit_mem) | |
1051 | return -ENOMEM; | |
1052 | INIT_LIST_HEAD(&nfit_mem->list); | |
8cc6ddfc | 1053 | nfit_mem->acpi_desc = acpi_desc; |
6697b2cf DW |
1054 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
1055 | } | |
1056 | ||
1057 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { | |
1058 | if (nfit_dcr->dcr->region_index != dcr) | |
1059 | continue; | |
1060 | /* | |
1061 | * Record the control region for the dimm. For | |
1062 | * the ACPI 6.1 case, where there are separate | |
1063 | * control regions for the pmem vs blk | |
1064 | * interfaces, be sure to record the extended | |
1065 | * blk details. | |
1066 | */ | |
1067 | if (!nfit_mem->dcr) | |
1068 | nfit_mem->dcr = nfit_dcr->dcr; | |
1069 | else if (nfit_mem->dcr->windows == 0 | |
1070 | && nfit_dcr->dcr->windows) | |
1071 | nfit_mem->dcr = nfit_dcr->dcr; | |
1072 | break; | |
1073 | } | |
1074 | ||
ad9ac5e1 | 1075 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { |
e5ae3b25 DW |
1076 | struct acpi_nfit_flush_address *flush; |
1077 | u16 i; | |
1078 | ||
ad9ac5e1 DW |
1079 | if (nfit_flush->flush->device_handle != device_handle) |
1080 | continue; | |
1081 | nfit_mem->nfit_flush = nfit_flush; | |
e5ae3b25 | 1082 | flush = nfit_flush->flush; |
a86854d0 KC |
1083 | nfit_mem->flush_wpq = devm_kcalloc(acpi_desc->dev, |
1084 | flush->hint_count, | |
1085 | sizeof(struct resource), | |
1086 | GFP_KERNEL); | |
e5ae3b25 DW |
1087 | if (!nfit_mem->flush_wpq) |
1088 | return -ENOMEM; | |
1089 | for (i = 0; i < flush->hint_count; i++) { | |
1090 | struct resource *res = &nfit_mem->flush_wpq[i]; | |
1091 | ||
1092 | res->start = flush->hint_address[i]; | |
1093 | res->end = res->start + 8 - 1; | |
1094 | } | |
ad9ac5e1 DW |
1095 | break; |
1096 | } | |
1097 | ||
6697b2cf DW |
1098 | if (dcr && !nfit_mem->dcr) { |
1099 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", | |
1100 | spa->range_index, dcr); | |
1101 | return -ENODEV; | |
b94d5230 DW |
1102 | } |
1103 | ||
1104 | if (type == NFIT_SPA_DCR) { | |
047fc8a1 RZ |
1105 | struct nfit_idt *nfit_idt; |
1106 | u16 idt_idx; | |
1107 | ||
b94d5230 DW |
1108 | /* multiple dimms may share a SPA when interleaved */ |
1109 | nfit_mem->spa_dcr = spa; | |
1110 | nfit_mem->memdev_dcr = nfit_memdev->memdev; | |
047fc8a1 RZ |
1111 | idt_idx = nfit_memdev->memdev->interleave_index; |
1112 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { | |
1113 | if (nfit_idt->idt->interleave_index != idt_idx) | |
1114 | continue; | |
1115 | nfit_mem->idt_dcr = nfit_idt->idt; | |
1116 | break; | |
1117 | } | |
1499934d | 1118 | } else if (type == NFIT_SPA_PM) { |
b94d5230 DW |
1119 | /* |
1120 | * A single dimm may belong to multiple SPA-PM | |
1121 | * ranges, record at least one in addition to | |
1122 | * any SPA-DCR range. | |
1123 | */ | |
1124 | nfit_mem->memdev_pmem = nfit_memdev->memdev; | |
1499934d DW |
1125 | } else |
1126 | nfit_mem->memdev_dcr = nfit_memdev->memdev; | |
b94d5230 DW |
1127 | } |
1128 | ||
1129 | return 0; | |
1130 | } | |
1131 | ||
4f0f586b ST |
1132 | static int nfit_mem_cmp(void *priv, const struct list_head *_a, |
1133 | const struct list_head *_b) | |
b94d5230 DW |
1134 | { |
1135 | struct nfit_mem *a = container_of(_a, typeof(*a), list); | |
1136 | struct nfit_mem *b = container_of(_b, typeof(*b), list); | |
1137 | u32 handleA, handleB; | |
1138 | ||
1139 | handleA = __to_nfit_memdev(a)->device_handle; | |
1140 | handleB = __to_nfit_memdev(b)->device_handle; | |
1141 | if (handleA < handleB) | |
1142 | return -1; | |
1143 | else if (handleA > handleB) | |
1144 | return 1; | |
1145 | return 0; | |
1146 | } | |
1147 | ||
1148 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) | |
1149 | { | |
1150 | struct nfit_spa *nfit_spa; | |
1499934d DW |
1151 | int rc; |
1152 | ||
b94d5230 DW |
1153 | |
1154 | /* | |
1155 | * For each SPA-DCR or SPA-PMEM address range find its | |
1156 | * corresponding MEMDEV(s). From each MEMDEV find the | |
1157 | * corresponding DCR. Then, if we're operating on a SPA-DCR, | |
1158 | * try to find a SPA-BDW and a corresponding BDW that references | |
1159 | * the DCR. Throw it all into an nfit_mem object. Note, that | |
1160 | * BDWs are optional. | |
1161 | */ | |
1162 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { | |
1499934d | 1163 | rc = __nfit_mem_init(acpi_desc, nfit_spa->spa); |
b94d5230 DW |
1164 | if (rc) |
1165 | return rc; | |
1166 | } | |
1167 | ||
1499934d DW |
1168 | /* |
1169 | * If a DIMM has failed to be mapped into SPA there will be no | |
1170 | * SPA entries above. Find and register all the unmapped DIMMs | |
1171 | * for reporting and recovery purposes. | |
1172 | */ | |
1173 | rc = __nfit_mem_init(acpi_desc, NULL); | |
1174 | if (rc) | |
1175 | return rc; | |
1176 | ||
b94d5230 DW |
1177 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); |
1178 | ||
1179 | return 0; | |
1180 | } | |
1181 | ||
41f95db7 JH |
1182 | static ssize_t bus_dsm_mask_show(struct device *dev, |
1183 | struct device_attribute *attr, char *buf) | |
1184 | { | |
1185 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1186 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
d46e6a21 | 1187 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
41f95db7 | 1188 | |
d46e6a21 | 1189 | return sprintf(buf, "%#lx\n", acpi_desc->bus_dsm_mask); |
41f95db7 JH |
1190 | } |
1191 | static struct device_attribute dev_attr_bus_dsm_mask = | |
1192 | __ATTR(dsm_mask, 0444, bus_dsm_mask_show, NULL); | |
1193 | ||
45def22c DW |
1194 | static ssize_t revision_show(struct device *dev, |
1195 | struct device_attribute *attr, char *buf) | |
1196 | { | |
1197 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1198 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1199 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1200 | ||
6b577c9d | 1201 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
45def22c DW |
1202 | } |
1203 | static DEVICE_ATTR_RO(revision); | |
1204 | ||
9ffd6350 VV |
1205 | static ssize_t hw_error_scrub_show(struct device *dev, |
1206 | struct device_attribute *attr, char *buf) | |
1207 | { | |
1208 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); | |
1209 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1210 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1211 | ||
1212 | return sprintf(buf, "%d\n", acpi_desc->scrub_mode); | |
1213 | } | |
1214 | ||
1215 | /* | |
1216 | * The 'hw_error_scrub' attribute can have the following values written to it: | |
1217 | * '0': Switch to the default mode where an exception will only insert | |
1218 | * the address of the memory error into the poison and badblocks lists. | |
1219 | * '1': Enable a full scrub to happen if an exception for a memory error is | |
1220 | * received. | |
1221 | */ | |
1222 | static ssize_t hw_error_scrub_store(struct device *dev, | |
1223 | struct device_attribute *attr, const char *buf, size_t size) | |
1224 | { | |
1225 | struct nvdimm_bus_descriptor *nd_desc; | |
1226 | ssize_t rc; | |
1227 | long val; | |
1228 | ||
1229 | rc = kstrtol(buf, 0, &val); | |
1230 | if (rc) | |
1231 | return rc; | |
1232 | ||
1550a17a | 1233 | device_lock(dev); |
9ffd6350 VV |
1234 | nd_desc = dev_get_drvdata(dev); |
1235 | if (nd_desc) { | |
1236 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1237 | ||
1238 | switch (val) { | |
1239 | case HW_ERROR_SCRUB_ON: | |
1240 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON; | |
1241 | break; | |
1242 | case HW_ERROR_SCRUB_OFF: | |
1243 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF; | |
1244 | break; | |
1245 | default: | |
1246 | rc = -EINVAL; | |
1247 | break; | |
1248 | } | |
1249 | } | |
1550a17a | 1250 | device_unlock(dev); |
9ffd6350 VV |
1251 | if (rc) |
1252 | return rc; | |
1253 | return size; | |
1254 | } | |
1255 | static DEVICE_ATTR_RW(hw_error_scrub); | |
1256 | ||
37b137ff VV |
1257 | /* |
1258 | * This shows the number of full Address Range Scrubs that have been | |
1259 | * completed since driver load time. Userspace can wait on this using | |
1260 | * select/poll etc. A '+' at the end indicates an ARS is in progress | |
1261 | */ | |
1262 | static ssize_t scrub_show(struct device *dev, | |
1263 | struct device_attribute *attr, char *buf) | |
1264 | { | |
1265 | struct nvdimm_bus_descriptor *nd_desc; | |
e34b8252 | 1266 | struct acpi_nfit_desc *acpi_desc; |
37b137ff | 1267 | ssize_t rc = -ENXIO; |
e34b8252 | 1268 | bool busy; |
37b137ff | 1269 | |
1550a17a | 1270 | device_lock(dev); |
37b137ff | 1271 | nd_desc = dev_get_drvdata(dev); |
e34b8252 | 1272 | if (!nd_desc) { |
1550a17a | 1273 | device_unlock(dev); |
e34b8252 | 1274 | return rc; |
37b137ff | 1275 | } |
e34b8252 | 1276 | acpi_desc = to_acpi_desc(nd_desc); |
37b137ff | 1277 | |
e34b8252 DW |
1278 | mutex_lock(&acpi_desc->init_mutex); |
1279 | busy = test_bit(ARS_BUSY, &acpi_desc->scrub_flags) | |
1280 | && !test_bit(ARS_CANCEL, &acpi_desc->scrub_flags); | |
1281 | rc = sprintf(buf, "%d%s", acpi_desc->scrub_count, busy ? "+\n" : "\n"); | |
5479b275 DW |
1282 | /* Allow an admin to poll the busy state at a higher rate */ |
1283 | if (busy && capable(CAP_SYS_RAWIO) && !test_and_set_bit(ARS_POLL, | |
1284 | &acpi_desc->scrub_flags)) { | |
1285 | acpi_desc->scrub_tmo = 1; | |
1286 | mod_delayed_work(nfit_wq, &acpi_desc->dwork, HZ); | |
37b137ff | 1287 | } |
5479b275 | 1288 | |
e34b8252 | 1289 | mutex_unlock(&acpi_desc->init_mutex); |
1550a17a | 1290 | device_unlock(dev); |
37b137ff VV |
1291 | return rc; |
1292 | } | |
1293 | ||
37b137ff VV |
1294 | static ssize_t scrub_store(struct device *dev, |
1295 | struct device_attribute *attr, const char *buf, size_t size) | |
1296 | { | |
1297 | struct nvdimm_bus_descriptor *nd_desc; | |
1298 | ssize_t rc; | |
1299 | long val; | |
1300 | ||
1301 | rc = kstrtol(buf, 0, &val); | |
1302 | if (rc) | |
1303 | return rc; | |
1304 | if (val != 1) | |
1305 | return -EINVAL; | |
1306 | ||
1550a17a | 1307 | device_lock(dev); |
37b137ff VV |
1308 | nd_desc = dev_get_drvdata(dev); |
1309 | if (nd_desc) { | |
1310 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); | |
1311 | ||
b5fd2e00 | 1312 | rc = acpi_nfit_ars_rescan(acpi_desc, ARS_REQ_LONG); |
37b137ff | 1313 | } |
1550a17a | 1314 | device_unlock(dev); |
37b137ff VV |
1315 | if (rc) |
1316 | return rc; | |
1317 | return size; | |
1318 | } | |
1319 | static DEVICE_ATTR_RW(scrub); | |
1320 | ||
1321 | static bool ars_supported(struct nvdimm_bus *nvdimm_bus) | |
1322 | { | |
1323 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
1324 | const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START | |
1325 | | 1 << ND_CMD_ARS_STATUS; | |
1326 | ||
1327 | return (nd_desc->cmd_mask & mask) == mask; | |
1328 | } | |
1329 | ||
1330 | static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n) | |
1331 | { | |
5f155515 | 1332 | struct device *dev = kobj_to_dev(kobj); |
37b137ff VV |
1333 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
1334 | ||
a1facc1f DW |
1335 | if (a == &dev_attr_scrub.attr) |
1336 | return ars_supported(nvdimm_bus) ? a->mode : 0; | |
1337 | ||
1338 | if (a == &dev_attr_firmware_activate_noidle.attr) | |
1339 | return intel_fwa_supported(nvdimm_bus) ? a->mode : 0; | |
1340 | ||
37b137ff VV |
1341 | return a->mode; |
1342 | } | |
1343 | ||
45def22c DW |
1344 | static struct attribute *acpi_nfit_attributes[] = { |
1345 | &dev_attr_revision.attr, | |
37b137ff | 1346 | &dev_attr_scrub.attr, |
9ffd6350 | 1347 | &dev_attr_hw_error_scrub.attr, |
41f95db7 | 1348 | &dev_attr_bus_dsm_mask.attr, |
a1facc1f | 1349 | &dev_attr_firmware_activate_noidle.attr, |
45def22c DW |
1350 | NULL, |
1351 | }; | |
1352 | ||
5e93746f | 1353 | static const struct attribute_group acpi_nfit_attribute_group = { |
45def22c DW |
1354 | .name = "nfit", |
1355 | .attrs = acpi_nfit_attributes, | |
37b137ff | 1356 | .is_visible = nfit_visible, |
45def22c DW |
1357 | }; |
1358 | ||
a61fe6f7 | 1359 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
45def22c DW |
1360 | &acpi_nfit_attribute_group, |
1361 | NULL, | |
1362 | }; | |
1363 | ||
e6dfb2de DW |
1364 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
1365 | { | |
1366 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1367 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1368 | ||
1369 | return __to_nfit_memdev(nfit_mem); | |
1370 | } | |
1371 | ||
1372 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) | |
1373 | { | |
1374 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1375 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1376 | ||
1377 | return nfit_mem->dcr; | |
1378 | } | |
1379 | ||
1380 | static ssize_t handle_show(struct device *dev, | |
1381 | struct device_attribute *attr, char *buf) | |
1382 | { | |
1383 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
1384 | ||
1385 | return sprintf(buf, "%#x\n", memdev->device_handle); | |
1386 | } | |
1387 | static DEVICE_ATTR_RO(handle); | |
1388 | ||
1389 | static ssize_t phys_id_show(struct device *dev, | |
1390 | struct device_attribute *attr, char *buf) | |
1391 | { | |
1392 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); | |
1393 | ||
1394 | return sprintf(buf, "%#x\n", memdev->physical_id); | |
1395 | } | |
1396 | static DEVICE_ATTR_RO(phys_id); | |
1397 | ||
1398 | static ssize_t vendor_show(struct device *dev, | |
1399 | struct device_attribute *attr, char *buf) | |
1400 | { | |
1401 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1402 | ||
5ad9a7fd | 1403 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id)); |
e6dfb2de DW |
1404 | } |
1405 | static DEVICE_ATTR_RO(vendor); | |
1406 | ||
1407 | static ssize_t rev_id_show(struct device *dev, | |
1408 | struct device_attribute *attr, char *buf) | |
1409 | { | |
1410 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1411 | ||
5ad9a7fd | 1412 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id)); |
e6dfb2de DW |
1413 | } |
1414 | static DEVICE_ATTR_RO(rev_id); | |
1415 | ||
1416 | static ssize_t device_show(struct device *dev, | |
1417 | struct device_attribute *attr, char *buf) | |
1418 | { | |
1419 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1420 | ||
5ad9a7fd | 1421 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id)); |
e6dfb2de DW |
1422 | } |
1423 | static DEVICE_ATTR_RO(device); | |
1424 | ||
6ca72085 DW |
1425 | static ssize_t subsystem_vendor_show(struct device *dev, |
1426 | struct device_attribute *attr, char *buf) | |
1427 | { | |
1428 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1429 | ||
1430 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id)); | |
1431 | } | |
1432 | static DEVICE_ATTR_RO(subsystem_vendor); | |
1433 | ||
1434 | static ssize_t subsystem_rev_id_show(struct device *dev, | |
1435 | struct device_attribute *attr, char *buf) | |
1436 | { | |
1437 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1438 | ||
1439 | return sprintf(buf, "0x%04x\n", | |
1440 | be16_to_cpu(dcr->subsystem_revision_id)); | |
1441 | } | |
1442 | static DEVICE_ATTR_RO(subsystem_rev_id); | |
1443 | ||
1444 | static ssize_t subsystem_device_show(struct device *dev, | |
1445 | struct device_attribute *attr, char *buf) | |
1446 | { | |
1447 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1448 | ||
1449 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id)); | |
1450 | } | |
1451 | static DEVICE_ATTR_RO(subsystem_device); | |
1452 | ||
8cc6ddfc DW |
1453 | static int num_nvdimm_formats(struct nvdimm *nvdimm) |
1454 | { | |
1455 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1456 | int formats = 0; | |
1457 | ||
1458 | if (nfit_mem->memdev_pmem) | |
1459 | formats++; | |
8cc6ddfc DW |
1460 | return formats; |
1461 | } | |
1462 | ||
e6dfb2de DW |
1463 | static ssize_t format_show(struct device *dev, |
1464 | struct device_attribute *attr, char *buf) | |
1465 | { | |
1466 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1467 | ||
1bcbf42d | 1468 | return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code)); |
e6dfb2de DW |
1469 | } |
1470 | static DEVICE_ATTR_RO(format); | |
1471 | ||
8cc6ddfc DW |
1472 | static ssize_t format1_show(struct device *dev, |
1473 | struct device_attribute *attr, char *buf) | |
1474 | { | |
1475 | u32 handle; | |
1476 | ssize_t rc = -ENXIO; | |
1477 | struct nfit_mem *nfit_mem; | |
1478 | struct nfit_memdev *nfit_memdev; | |
1479 | struct acpi_nfit_desc *acpi_desc; | |
1480 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1481 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1482 | ||
1483 | nfit_mem = nvdimm_provider_data(nvdimm); | |
1484 | acpi_desc = nfit_mem->acpi_desc; | |
1485 | handle = to_nfit_memdev(dev)->device_handle; | |
1486 | ||
1487 | /* assumes DIMMs have at most 2 published interface codes */ | |
1488 | mutex_lock(&acpi_desc->init_mutex); | |
1489 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
1490 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; | |
1491 | struct nfit_dcr *nfit_dcr; | |
1492 | ||
1493 | if (memdev->device_handle != handle) | |
1494 | continue; | |
1495 | ||
1496 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { | |
1497 | if (nfit_dcr->dcr->region_index != memdev->region_index) | |
1498 | continue; | |
1499 | if (nfit_dcr->dcr->code == dcr->code) | |
1500 | continue; | |
1bcbf42d DW |
1501 | rc = sprintf(buf, "0x%04x\n", |
1502 | le16_to_cpu(nfit_dcr->dcr->code)); | |
8cc6ddfc DW |
1503 | break; |
1504 | } | |
85f971b6 | 1505 | if (rc != -ENXIO) |
8cc6ddfc DW |
1506 | break; |
1507 | } | |
1508 | mutex_unlock(&acpi_desc->init_mutex); | |
1509 | return rc; | |
1510 | } | |
1511 | static DEVICE_ATTR_RO(format1); | |
1512 | ||
1513 | static ssize_t formats_show(struct device *dev, | |
1514 | struct device_attribute *attr, char *buf) | |
1515 | { | |
1516 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1517 | ||
1518 | return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm)); | |
1519 | } | |
1520 | static DEVICE_ATTR_RO(formats); | |
1521 | ||
e6dfb2de DW |
1522 | static ssize_t serial_show(struct device *dev, |
1523 | struct device_attribute *attr, char *buf) | |
1524 | { | |
1525 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); | |
1526 | ||
5ad9a7fd | 1527 | return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number)); |
e6dfb2de DW |
1528 | } |
1529 | static DEVICE_ATTR_RO(serial); | |
1530 | ||
a94e3fbe DW |
1531 | static ssize_t family_show(struct device *dev, |
1532 | struct device_attribute *attr, char *buf) | |
1533 | { | |
1534 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1535 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1536 | ||
1537 | if (nfit_mem->family < 0) | |
1538 | return -ENXIO; | |
1539 | return sprintf(buf, "%d\n", nfit_mem->family); | |
1540 | } | |
1541 | static DEVICE_ATTR_RO(family); | |
1542 | ||
1543 | static ssize_t dsm_mask_show(struct device *dev, | |
1544 | struct device_attribute *attr, char *buf) | |
1545 | { | |
1546 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1547 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1548 | ||
1549 | if (nfit_mem->family < 0) | |
1550 | return -ENXIO; | |
1551 | return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask); | |
1552 | } | |
1553 | static DEVICE_ATTR_RO(dsm_mask); | |
1554 | ||
58138820 DW |
1555 | static ssize_t flags_show(struct device *dev, |
1556 | struct device_attribute *attr, char *buf) | |
1557 | { | |
0ead1118 DW |
1558 | struct nvdimm *nvdimm = to_nvdimm(dev); |
1559 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1560 | u16 flags = __to_nfit_memdev(nfit_mem)->flags; | |
1561 | ||
1562 | if (test_bit(NFIT_MEM_DIRTY, &nfit_mem->flags)) | |
1563 | flags |= ACPI_NFIT_MEM_FLUSH_FAILED; | |
58138820 | 1564 | |
ffab9385 | 1565 | return sprintf(buf, "%s%s%s%s%s%s%s\n", |
402bae59 TK |
1566 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
1567 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", | |
1568 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", | |
ca321d1c | 1569 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
ffab9385 DW |
1570 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "", |
1571 | flags & ACPI_NFIT_MEM_MAP_FAILED ? "map_fail " : "", | |
1572 | flags & ACPI_NFIT_MEM_HEALTH_ENABLED ? "smart_notify " : ""); | |
58138820 DW |
1573 | } |
1574 | static DEVICE_ATTR_RO(flags); | |
1575 | ||
38a879ba TK |
1576 | static ssize_t id_show(struct device *dev, |
1577 | struct device_attribute *attr, char *buf) | |
1578 | { | |
d6548ae4 DJ |
1579 | struct nvdimm *nvdimm = to_nvdimm(dev); |
1580 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
38a879ba | 1581 | |
d6548ae4 | 1582 | return sprintf(buf, "%s\n", nfit_mem->id); |
38a879ba TK |
1583 | } |
1584 | static DEVICE_ATTR_RO(id); | |
1585 | ||
0ead1118 DW |
1586 | static ssize_t dirty_shutdown_show(struct device *dev, |
1587 | struct device_attribute *attr, char *buf) | |
1588 | { | |
1589 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
1590 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
1591 | ||
1592 | return sprintf(buf, "%d\n", nfit_mem->dirty_shutdown); | |
1593 | } | |
1594 | static DEVICE_ATTR_RO(dirty_shutdown); | |
1595 | ||
e6dfb2de DW |
1596 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
1597 | &dev_attr_handle.attr, | |
1598 | &dev_attr_phys_id.attr, | |
1599 | &dev_attr_vendor.attr, | |
1600 | &dev_attr_device.attr, | |
6ca72085 DW |
1601 | &dev_attr_rev_id.attr, |
1602 | &dev_attr_subsystem_vendor.attr, | |
1603 | &dev_attr_subsystem_device.attr, | |
1604 | &dev_attr_subsystem_rev_id.attr, | |
e6dfb2de | 1605 | &dev_attr_format.attr, |
8cc6ddfc DW |
1606 | &dev_attr_formats.attr, |
1607 | &dev_attr_format1.attr, | |
e6dfb2de | 1608 | &dev_attr_serial.attr, |
58138820 | 1609 | &dev_attr_flags.attr, |
38a879ba | 1610 | &dev_attr_id.attr, |
a94e3fbe DW |
1611 | &dev_attr_family.attr, |
1612 | &dev_attr_dsm_mask.attr, | |
0ead1118 | 1613 | &dev_attr_dirty_shutdown.attr, |
e6dfb2de DW |
1614 | NULL, |
1615 | }; | |
1616 | ||
1617 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, | |
1618 | struct attribute *a, int n) | |
1619 | { | |
5f155515 | 1620 | struct device *dev = kobj_to_dev(kobj); |
8cc6ddfc | 1621 | struct nvdimm *nvdimm = to_nvdimm(dev); |
0ead1118 | 1622 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
e6dfb2de | 1623 | |
1499934d DW |
1624 | if (!to_nfit_dcr(dev)) { |
1625 | /* Without a dcr only the memdev attributes can be surfaced */ | |
1626 | if (a == &dev_attr_handle.attr || a == &dev_attr_phys_id.attr | |
1627 | || a == &dev_attr_flags.attr | |
1628 | || a == &dev_attr_family.attr | |
1629 | || a == &dev_attr_dsm_mask.attr) | |
1630 | return a->mode; | |
8cc6ddfc | 1631 | return 0; |
1499934d DW |
1632 | } |
1633 | ||
8cc6ddfc | 1634 | if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1) |
e6dfb2de | 1635 | return 0; |
0ead1118 DW |
1636 | |
1637 | if (!test_bit(NFIT_MEM_DIRTY_COUNT, &nfit_mem->flags) | |
1638 | && a == &dev_attr_dirty_shutdown.attr) | |
1639 | return 0; | |
1640 | ||
8cc6ddfc | 1641 | return a->mode; |
e6dfb2de DW |
1642 | } |
1643 | ||
5e93746f | 1644 | static const struct attribute_group acpi_nfit_dimm_attribute_group = { |
e6dfb2de DW |
1645 | .name = "nfit", |
1646 | .attrs = acpi_nfit_dimm_attributes, | |
1647 | .is_visible = acpi_nfit_dimm_attr_visible, | |
1648 | }; | |
1649 | ||
1650 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { | |
1651 | &acpi_nfit_dimm_attribute_group, | |
1652 | NULL, | |
1653 | }; | |
1654 | ||
1655 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, | |
1656 | u32 device_handle) | |
1657 | { | |
1658 | struct nfit_mem *nfit_mem; | |
1659 | ||
1660 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) | |
1661 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) | |
1662 | return nfit_mem->nvdimm; | |
1663 | ||
1664 | return NULL; | |
1665 | } | |
1666 | ||
231bf117 | 1667 | void __acpi_nvdimm_notify(struct device *dev, u32 event) |
ba9c8dd3 DW |
1668 | { |
1669 | struct nfit_mem *nfit_mem; | |
1670 | struct acpi_nfit_desc *acpi_desc; | |
1671 | ||
b814735f | 1672 | dev_dbg(dev->parent, "%s: event: %d\n", dev_name(dev), |
ba9c8dd3 DW |
1673 | event); |
1674 | ||
1675 | if (event != NFIT_NOTIFY_DIMM_HEALTH) { | |
1676 | dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev), | |
1677 | event); | |
1678 | return; | |
1679 | } | |
1680 | ||
1681 | acpi_desc = dev_get_drvdata(dev->parent); | |
1682 | if (!acpi_desc) | |
1683 | return; | |
1684 | ||
1685 | /* | |
1686 | * If we successfully retrieved acpi_desc, then we know nfit_mem data | |
1687 | * is still valid. | |
1688 | */ | |
1689 | nfit_mem = dev_get_drvdata(dev); | |
1690 | if (nfit_mem && nfit_mem->flags_attr) | |
1691 | sysfs_notify_dirent(nfit_mem->flags_attr); | |
1692 | } | |
231bf117 | 1693 | EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify); |
ba9c8dd3 DW |
1694 | |
1695 | static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data) | |
1696 | { | |
1697 | struct acpi_device *adev = data; | |
1698 | struct device *dev = &adev->dev; | |
1699 | ||
1550a17a | 1700 | device_lock(dev->parent); |
ba9c8dd3 | 1701 | __acpi_nvdimm_notify(dev, event); |
1550a17a | 1702 | device_unlock(dev->parent); |
ba9c8dd3 DW |
1703 | } |
1704 | ||
466d1493 DW |
1705 | static bool acpi_nvdimm_has_method(struct acpi_device *adev, char *method) |
1706 | { | |
1707 | acpi_handle handle; | |
1708 | acpi_status status; | |
1709 | ||
1710 | status = acpi_get_handle(adev->handle, method, &handle); | |
1711 | ||
1712 | if (ACPI_SUCCESS(status)) | |
1713 | return true; | |
1714 | return false; | |
1715 | } | |
1716 | ||
f1101766 | 1717 | __weak void nfit_intel_shutdown_status(struct nfit_mem *nfit_mem) |
0ead1118 | 1718 | { |
f596c884 | 1719 | struct device *dev = &nfit_mem->adev->dev; |
0ead1118 DW |
1720 | struct nd_intel_smart smart = { 0 }; |
1721 | union acpi_object in_buf = { | |
f596c884 DW |
1722 | .buffer.type = ACPI_TYPE_BUFFER, |
1723 | .buffer.length = 0, | |
0ead1118 DW |
1724 | }; |
1725 | union acpi_object in_obj = { | |
f596c884 | 1726 | .package.type = ACPI_TYPE_PACKAGE, |
0ead1118 DW |
1727 | .package.count = 1, |
1728 | .package.elements = &in_buf, | |
1729 | }; | |
1730 | const u8 func = ND_INTEL_SMART; | |
1731 | const guid_t *guid = to_nfit_uuid(nfit_mem->family); | |
1732 | u8 revid = nfit_dsm_revid(nfit_mem->family, func); | |
1733 | struct acpi_device *adev = nfit_mem->adev; | |
1734 | acpi_handle handle = adev->handle; | |
1735 | union acpi_object *out_obj; | |
1736 | ||
1737 | if ((nfit_mem->dsm_mask & (1 << func)) == 0) | |
1738 | return; | |
1739 | ||
1740 | out_obj = acpi_evaluate_dsm(handle, guid, revid, func, &in_obj); | |
f596c884 DW |
1741 | if (!out_obj || out_obj->type != ACPI_TYPE_BUFFER |
1742 | || out_obj->buffer.length < sizeof(smart)) { | |
1743 | dev_dbg(dev->parent, "%s: failed to retrieve initial health\n", | |
1744 | dev_name(dev)); | |
1745 | ACPI_FREE(out_obj); | |
0ead1118 | 1746 | return; |
f596c884 DW |
1747 | } |
1748 | memcpy(&smart, out_obj->buffer.pointer, sizeof(smart)); | |
1749 | ACPI_FREE(out_obj); | |
0ead1118 DW |
1750 | |
1751 | if (smart.flags & ND_INTEL_SMART_SHUTDOWN_VALID) { | |
1752 | if (smart.shutdown_state) | |
1753 | set_bit(NFIT_MEM_DIRTY, &nfit_mem->flags); | |
1754 | } | |
1755 | ||
1756 | if (smart.flags & ND_INTEL_SMART_SHUTDOWN_COUNT_VALID) { | |
1757 | set_bit(NFIT_MEM_DIRTY_COUNT, &nfit_mem->flags); | |
1758 | nfit_mem->dirty_shutdown = smart.shutdown_count; | |
1759 | } | |
0ead1118 DW |
1760 | } |
1761 | ||
1762 | static void populate_shutdown_status(struct nfit_mem *nfit_mem) | |
1763 | { | |
1764 | /* | |
1765 | * For DIMMs that provide a dynamic facility to retrieve a | |
1766 | * dirty-shutdown status and/or a dirty-shutdown count, cache | |
1767 | * these values in nfit_mem. | |
1768 | */ | |
1769 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) | |
1770 | nfit_intel_shutdown_status(nfit_mem); | |
1771 | } | |
1772 | ||
62232e45 DW |
1773 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
1774 | struct nfit_mem *nfit_mem, u32 device_handle) | |
1775 | { | |
92fe2aa8 | 1776 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
62232e45 DW |
1777 | struct acpi_device *adev, *adev_dimm; |
1778 | struct device *dev = acpi_desc->dev; | |
099b07a2 | 1779 | unsigned long dsm_mask, label_mask; |
41c8bdb3 | 1780 | const guid_t *guid; |
60e95f43 | 1781 | int i; |
ba650cfc | 1782 | int family = -1; |
d6548ae4 | 1783 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
62232e45 | 1784 | |
e3654eca DW |
1785 | /* nfit test assumes 1:1 relationship between commands and dsms */ |
1786 | nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en; | |
31eca76b | 1787 | nfit_mem->family = NVDIMM_FAMILY_INTEL; |
92fe2aa8 | 1788 | set_bit(NVDIMM_FAMILY_INTEL, &nd_desc->dimm_family_mask); |
d6548ae4 DJ |
1789 | |
1790 | if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID) | |
1791 | sprintf(nfit_mem->id, "%04x-%02x-%04x-%08x", | |
1792 | be16_to_cpu(dcr->vendor_id), | |
1793 | dcr->manufacturing_location, | |
1794 | be16_to_cpu(dcr->manufacturing_date), | |
1795 | be32_to_cpu(dcr->serial_number)); | |
1796 | else | |
1797 | sprintf(nfit_mem->id, "%04x-%08x", | |
1798 | be16_to_cpu(dcr->vendor_id), | |
1799 | be32_to_cpu(dcr->serial_number)); | |
1800 | ||
62232e45 | 1801 | adev = to_acpi_dev(acpi_desc); |
f1101766 DW |
1802 | if (!adev) { |
1803 | /* unit test case */ | |
1804 | populate_shutdown_status(nfit_mem); | |
62232e45 | 1805 | return 0; |
f1101766 | 1806 | } |
62232e45 DW |
1807 | |
1808 | adev_dimm = acpi_find_child_device(adev, device_handle, false); | |
1809 | nfit_mem->adev = adev_dimm; | |
1810 | if (!adev_dimm) { | |
1811 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", | |
1812 | device_handle); | |
4d88a97a | 1813 | return force_enable_dimms ? 0 : -ENODEV; |
62232e45 DW |
1814 | } |
1815 | ||
ba9c8dd3 DW |
1816 | if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle, |
1817 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) { | |
1818 | dev_err(dev, "%s: notification registration failed\n", | |
1819 | dev_name(&adev_dimm->dev)); | |
1820 | return -ENXIO; | |
1821 | } | |
adf68957 DW |
1822 | /* |
1823 | * Record nfit_mem for the notification path to track back to | |
1824 | * the nfit sysfs attributes for this dimm device object. | |
1825 | */ | |
1826 | dev_set_drvdata(&adev_dimm->dev, nfit_mem); | |
ba9c8dd3 | 1827 | |
31eca76b | 1828 | /* |
1194c413 DC |
1829 | * There are 4 "legacy" NVDIMM command sets |
1830 | * (NVDIMM_FAMILY_{INTEL,MSFT,HPE1,HPE2}) that were created before | |
1831 | * an EFI working group was established to constrain this | |
1832 | * proliferation. The nfit driver probes for the supported command | |
1833 | * set by GUID. Note, if you're a platform developer looking to add | |
1834 | * a new command set to this probe, consider using an existing set, | |
1835 | * or otherwise seek approval to publish the command set at | |
1836 | * http://www.uefi.org/RFIC_LIST. | |
1837 | * | |
1838 | * Note, that checking for function0 (bit0) tells us if any commands | |
1839 | * are reachable through this GUID. | |
31eca76b | 1840 | */ |
92fe2aa8 | 1841 | clear_bit(NVDIMM_FAMILY_INTEL, &nd_desc->dimm_family_mask); |
11e14270 | 1842 | for (i = 0; i <= NVDIMM_FAMILY_MAX; i++) |
92fe2aa8 DW |
1843 | if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) { |
1844 | set_bit(i, &nd_desc->dimm_family_mask); | |
ba650cfc LK |
1845 | if (family < 0 || i == default_dsm_family) |
1846 | family = i; | |
92fe2aa8 | 1847 | } |
31eca76b DW |
1848 | |
1849 | /* limit the supported commands to those that are publicly documented */ | |
ba650cfc | 1850 | nfit_mem->family = family; |
095ab4b3 LK |
1851 | if (override_dsm_mask && !disable_vendor_specific) |
1852 | dsm_mask = override_dsm_mask; | |
1853 | else if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { | |
11e14270 | 1854 | dsm_mask = NVDIMM_INTEL_CMDMASK; |
87554098 DW |
1855 | if (disable_vendor_specific) |
1856 | dsm_mask &= ~(1 << ND_CMD_VENDOR); | |
e02fb726 | 1857 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) { |
31eca76b | 1858 | dsm_mask = 0x1c3c76; |
e02fb726 | 1859 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) { |
31eca76b | 1860 | dsm_mask = 0x1fe; |
87554098 DW |
1861 | if (disable_vendor_specific) |
1862 | dsm_mask &= ~(1 << 8); | |
e02fb726 | 1863 | } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) { |
1864 | dsm_mask = 0xffffffff; | |
1194c413 DC |
1865 | } else if (nfit_mem->family == NVDIMM_FAMILY_HYPERV) { |
1866 | dsm_mask = 0x1f; | |
87554098 | 1867 | } else { |
a7225598 | 1868 | dev_dbg(dev, "unknown dimm command family\n"); |
31eca76b | 1869 | nfit_mem->family = -1; |
a7225598 DW |
1870 | /* DSMs are optional, continue loading the driver... */ |
1871 | return 0; | |
31eca76b DW |
1872 | } |
1873 | ||
5e9e38d0 DW |
1874 | /* |
1875 | * Function 0 is the command interrogation function, don't | |
1876 | * export it to potential userspace use, and enable it to be | |
1877 | * used as an error value in acpi_nfit_ctl(). | |
1878 | */ | |
1879 | dsm_mask &= ~1UL; | |
1880 | ||
41c8bdb3 | 1881 | guid = to_nfit_uuid(nfit_mem->family); |
31eca76b | 1882 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
11e14270 DW |
1883 | if (acpi_check_dsm(adev_dimm->handle, guid, |
1884 | nfit_dsm_revid(nfit_mem->family, i), | |
1885 | 1ULL << i)) | |
62232e45 DW |
1886 | set_bit(i, &nfit_mem->dsm_mask); |
1887 | ||
099b07a2 DW |
1888 | /* |
1889 | * Prefer the NVDIMM_FAMILY_INTEL label read commands if present | |
1890 | * due to their better semantics handling locked capacity. | |
1891 | */ | |
1892 | label_mask = 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA | |
1893 | | 1 << ND_CMD_SET_CONFIG_DATA; | |
1894 | if (family == NVDIMM_FAMILY_INTEL | |
1895 | && (dsm_mask & label_mask) == label_mask) | |
f596c884 DW |
1896 | /* skip _LS{I,R,W} enabling */; |
1897 | else { | |
1898 | if (acpi_nvdimm_has_method(adev_dimm, "_LSI") | |
1899 | && acpi_nvdimm_has_method(adev_dimm, "_LSR")) { | |
1900 | dev_dbg(dev, "%s: has _LSR\n", dev_name(&adev_dimm->dev)); | |
1901 | set_bit(NFIT_MEM_LSR, &nfit_mem->flags); | |
1902 | } | |
099b07a2 | 1903 | |
f596c884 DW |
1904 | if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags) |
1905 | && acpi_nvdimm_has_method(adev_dimm, "_LSW")) { | |
1906 | dev_dbg(dev, "%s: has _LSW\n", dev_name(&adev_dimm->dev)); | |
1907 | set_bit(NFIT_MEM_LSW, &nfit_mem->flags); | |
1908 | } | |
4b27db7e | 1909 | |
0171b6b7 DW |
1910 | /* |
1911 | * Quirk read-only label configurations to preserve | |
1912 | * access to label-less namespaces by default. | |
1913 | */ | |
1914 | if (!test_bit(NFIT_MEM_LSW, &nfit_mem->flags) | |
1915 | && !force_labels) { | |
1916 | dev_dbg(dev, "%s: No _LSW, disable labels\n", | |
1917 | dev_name(&adev_dimm->dev)); | |
1918 | clear_bit(NFIT_MEM_LSR, &nfit_mem->flags); | |
1919 | } else | |
1920 | dev_dbg(dev, "%s: Force enable labels\n", | |
1921 | dev_name(&adev_dimm->dev)); | |
4b27db7e DW |
1922 | } |
1923 | ||
0ead1118 DW |
1924 | populate_shutdown_status(nfit_mem); |
1925 | ||
60e95f43 | 1926 | return 0; |
62232e45 DW |
1927 | } |
1928 | ||
ba9c8dd3 DW |
1929 | static void shutdown_dimm_notify(void *data) |
1930 | { | |
1931 | struct acpi_nfit_desc *acpi_desc = data; | |
1932 | struct nfit_mem *nfit_mem; | |
1933 | ||
1934 | mutex_lock(&acpi_desc->init_mutex); | |
1935 | /* | |
1936 | * Clear out the nfit_mem->flags_attr and shut down dimm event | |
1937 | * notifications. | |
1938 | */ | |
1939 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
231bf117 DW |
1940 | struct acpi_device *adev_dimm = nfit_mem->adev; |
1941 | ||
ba9c8dd3 DW |
1942 | if (nfit_mem->flags_attr) { |
1943 | sysfs_put(nfit_mem->flags_attr); | |
1944 | nfit_mem->flags_attr = NULL; | |
1945 | } | |
adf68957 | 1946 | if (adev_dimm) { |
231bf117 DW |
1947 | acpi_remove_notify_handler(adev_dimm->handle, |
1948 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify); | |
adf68957 DW |
1949 | dev_set_drvdata(&adev_dimm->dev, NULL); |
1950 | } | |
ba9c8dd3 DW |
1951 | } |
1952 | mutex_unlock(&acpi_desc->init_mutex); | |
1953 | } | |
1954 | ||
f2989396 DJ |
1955 | static const struct nvdimm_security_ops *acpi_nfit_get_security_ops(int family) |
1956 | { | |
1957 | switch (family) { | |
1958 | case NVDIMM_FAMILY_INTEL: | |
1959 | return intel_security_ops; | |
1960 | default: | |
1961 | return NULL; | |
1962 | } | |
1963 | } | |
1964 | ||
a1facc1f DW |
1965 | static const struct nvdimm_fw_ops *acpi_nfit_get_fw_ops( |
1966 | struct nfit_mem *nfit_mem) | |
1967 | { | |
1968 | unsigned long mask; | |
1969 | struct acpi_nfit_desc *acpi_desc = nfit_mem->acpi_desc; | |
1970 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
1971 | ||
1972 | if (!nd_desc->fw_ops) | |
1973 | return NULL; | |
1974 | ||
1975 | if (nfit_mem->family != NVDIMM_FAMILY_INTEL) | |
1976 | return NULL; | |
1977 | ||
1978 | mask = nfit_mem->dsm_mask & NVDIMM_INTEL_FW_ACTIVATE_CMDMASK; | |
1979 | if (mask != NVDIMM_INTEL_FW_ACTIVATE_CMDMASK) | |
1980 | return NULL; | |
1981 | ||
1982 | return intel_fw_ops; | |
1983 | } | |
1984 | ||
e6dfb2de DW |
1985 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
1986 | { | |
1987 | struct nfit_mem *nfit_mem; | |
ba9c8dd3 DW |
1988 | int dimm_count = 0, rc; |
1989 | struct nvdimm *nvdimm; | |
e6dfb2de DW |
1990 | |
1991 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
e5ae3b25 | 1992 | struct acpi_nfit_flush_address *flush; |
31eca76b | 1993 | unsigned long flags = 0, cmd_mask; |
caa603aa | 1994 | struct nfit_memdev *nfit_memdev; |
e6dfb2de | 1995 | u32 device_handle; |
58138820 | 1996 | u16 mem_flags; |
e6dfb2de DW |
1997 | |
1998 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; | |
1999 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); | |
2000 | if (nvdimm) { | |
20985164 | 2001 | dimm_count++; |
e6dfb2de DW |
2002 | continue; |
2003 | } | |
2004 | ||
caa603aa DW |
2005 | /* collate flags across all memdevs for this dimm */ |
2006 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { | |
2007 | struct acpi_nfit_memory_map *dimm_memdev; | |
2008 | ||
2009 | dimm_memdev = __to_nfit_memdev(nfit_mem); | |
2010 | if (dimm_memdev->device_handle | |
2011 | != nfit_memdev->memdev->device_handle) | |
2012 | continue; | |
2013 | dimm_memdev->flags |= nfit_memdev->memdev->flags; | |
2014 | } | |
2015 | ||
58138820 | 2016 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
ca321d1c | 2017 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
8f078b38 | 2018 | set_bit(NDD_UNARMED, &flags); |
58138820 | 2019 | |
62232e45 DW |
2020 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
2021 | if (rc) | |
2022 | continue; | |
2023 | ||
e3654eca | 2024 | /* |
31eca76b DW |
2025 | * TODO: provide translation for non-NVDIMM_FAMILY_INTEL |
2026 | * devices (i.e. from nd_cmd to acpi_dsm) to standardize the | |
2027 | * userspace interface. | |
e3654eca | 2028 | */ |
31eca76b | 2029 | cmd_mask = 1UL << ND_CMD_CALL; |
b9b1504d DW |
2030 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { |
2031 | /* | |
2032 | * These commands have a 1:1 correspondence | |
2033 | * between DSM payload and libnvdimm ioctl | |
2034 | * payload format. | |
2035 | */ | |
2036 | cmd_mask |= nfit_mem->dsm_mask & NVDIMM_STANDARD_CMDMASK; | |
2037 | } | |
31eca76b | 2038 | |
6f07f86c | 2039 | if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) { |
4b27db7e | 2040 | set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask); |
4b27db7e | 2041 | set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask); |
466d1493 | 2042 | } |
6f07f86c | 2043 | if (test_bit(NFIT_MEM_LSW, &nfit_mem->flags)) |
4b27db7e DW |
2044 | set_bit(ND_CMD_SET_CONFIG_DATA, &cmd_mask); |
2045 | ||
e5ae3b25 DW |
2046 | flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush |
2047 | : NULL; | |
d6548ae4 | 2048 | nvdimm = __nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
62232e45 | 2049 | acpi_nfit_dimm_attribute_groups, |
e5ae3b25 | 2050 | flags, cmd_mask, flush ? flush->hint_count : 0, |
f2989396 | 2051 | nfit_mem->flush_wpq, &nfit_mem->id[0], |
a1facc1f DW |
2052 | acpi_nfit_get_security_ops(nfit_mem->family), |
2053 | acpi_nfit_get_fw_ops(nfit_mem)); | |
e6dfb2de DW |
2054 | if (!nvdimm) |
2055 | return -ENOMEM; | |
2056 | ||
2057 | nfit_mem->nvdimm = nvdimm; | |
4d88a97a | 2058 | dimm_count++; |
58138820 DW |
2059 | |
2060 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) | |
2061 | continue; | |
2062 | ||
5c9d62d0 | 2063 | dev_err(acpi_desc->dev, "Error found in NVDIMM %s flags:%s%s%s%s%s\n", |
58138820 | 2064 | nvdimm_name(nvdimm), |
402bae59 TK |
2065 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
2066 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", | |
2067 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", | |
1499934d DW |
2068 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "", |
2069 | mem_flags & ACPI_NFIT_MEM_MAP_FAILED ? " map_fail" : ""); | |
58138820 | 2070 | |
e6dfb2de DW |
2071 | } |
2072 | ||
ba9c8dd3 DW |
2073 | rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
2074 | if (rc) | |
2075 | return rc; | |
2076 | ||
2077 | /* | |
2078 | * Now that dimms are successfully registered, and async registration | |
2079 | * is flushed, attempt to enable event notification. | |
2080 | */ | |
2081 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { | |
2082 | struct kernfs_node *nfit_kernfs; | |
2083 | ||
2084 | nvdimm = nfit_mem->nvdimm; | |
23fbd7c7 TK |
2085 | if (!nvdimm) |
2086 | continue; | |
2087 | ||
ba9c8dd3 DW |
2088 | nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit"); |
2089 | if (nfit_kernfs) | |
2090 | nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs, | |
2091 | "flags"); | |
2092 | sysfs_put(nfit_kernfs); | |
2093 | if (!nfit_mem->flags_attr) | |
2094 | dev_warn(acpi_desc->dev, "%s: notifications disabled\n", | |
2095 | nvdimm_name(nvdimm)); | |
2096 | } | |
2097 | ||
2098 | return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify, | |
2099 | acpi_desc); | |
e6dfb2de DW |
2100 | } |
2101 | ||
7db5bb33 JH |
2102 | /* |
2103 | * These constants are private because there are no kernel consumers of | |
2104 | * these commands. | |
2105 | */ | |
2106 | enum nfit_aux_cmds { | |
c6237b21 ML |
2107 | NFIT_CMD_TRANSLATE_SPA = 5, |
2108 | NFIT_CMD_ARS_INJECT_SET = 7, | |
2109 | NFIT_CMD_ARS_INJECT_CLEAR = 8, | |
2110 | NFIT_CMD_ARS_INJECT_GET = 9, | |
7db5bb33 JH |
2111 | }; |
2112 | ||
62232e45 DW |
2113 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
2114 | { | |
2115 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
41c8bdb3 | 2116 | const guid_t *guid = to_nfit_uuid(NFIT_DEV_BUS); |
6450ddbd | 2117 | unsigned long dsm_mask, *mask; |
62232e45 DW |
2118 | struct acpi_device *adev; |
2119 | int i; | |
2120 | ||
92fe2aa8 DW |
2121 | set_bit(ND_CMD_CALL, &nd_desc->cmd_mask); |
2122 | set_bit(NVDIMM_BUS_FAMILY_NFIT, &nd_desc->bus_family_mask); | |
2123 | ||
6450ddbd DW |
2124 | /* enable nfit_test to inject bus command emulation */ |
2125 | if (acpi_desc->bus_cmd_force_en) { | |
2126 | nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en; | |
2127 | mask = &nd_desc->bus_family_mask; | |
a1facc1f | 2128 | if (acpi_desc->family_dsm_mask[NVDIMM_BUS_FAMILY_INTEL]) { |
6450ddbd | 2129 | set_bit(NVDIMM_BUS_FAMILY_INTEL, mask); |
a1facc1f DW |
2130 | nd_desc->fw_ops = intel_bus_fw_ops; |
2131 | } | |
6450ddbd DW |
2132 | } |
2133 | ||
62232e45 DW |
2134 | adev = to_acpi_dev(acpi_desc); |
2135 | if (!adev) | |
2136 | return; | |
2137 | ||
d4f32367 | 2138 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) |
94116f81 | 2139 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) |
e3654eca | 2140 | set_bit(i, &nd_desc->cmd_mask); |
7db5bb33 JH |
2141 | |
2142 | dsm_mask = | |
2143 | (1 << ND_CMD_ARS_CAP) | | |
2144 | (1 << ND_CMD_ARS_START) | | |
2145 | (1 << ND_CMD_ARS_STATUS) | | |
2146 | (1 << ND_CMD_CLEAR_ERROR) | | |
2147 | (1 << NFIT_CMD_TRANSLATE_SPA) | | |
2148 | (1 << NFIT_CMD_ARS_INJECT_SET) | | |
2149 | (1 << NFIT_CMD_ARS_INJECT_CLEAR) | | |
2150 | (1 << NFIT_CMD_ARS_INJECT_GET); | |
2151 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) | |
2152 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) | |
d46e6a21 | 2153 | set_bit(i, &acpi_desc->bus_dsm_mask); |
6450ddbd DW |
2154 | |
2155 | /* Enumerate allowed NVDIMM_BUS_FAMILY_INTEL commands */ | |
2156 | dsm_mask = NVDIMM_BUS_INTEL_FW_ACTIVATE_CMDMASK; | |
2157 | guid = to_nfit_bus_uuid(NVDIMM_BUS_FAMILY_INTEL); | |
2158 | mask = &acpi_desc->family_dsm_mask[NVDIMM_BUS_FAMILY_INTEL]; | |
2159 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) | |
2160 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) | |
2161 | set_bit(i, mask); | |
a1facc1f DW |
2162 | |
2163 | if (*mask == dsm_mask) { | |
2164 | set_bit(NVDIMM_BUS_FAMILY_INTEL, &nd_desc->bus_family_mask); | |
2165 | nd_desc->fw_ops = intel_bus_fw_ops; | |
2166 | } | |
62232e45 DW |
2167 | } |
2168 | ||
1f7df6f8 DW |
2169 | static ssize_t range_index_show(struct device *dev, |
2170 | struct device_attribute *attr, char *buf) | |
2171 | { | |
2172 | struct nd_region *nd_region = to_nd_region(dev); | |
2173 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); | |
2174 | ||
2175 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); | |
2176 | } | |
2177 | static DEVICE_ATTR_RO(range_index); | |
2178 | ||
2179 | static struct attribute *acpi_nfit_region_attributes[] = { | |
2180 | &dev_attr_range_index.attr, | |
2181 | NULL, | |
2182 | }; | |
2183 | ||
5e93746f | 2184 | static const struct attribute_group acpi_nfit_region_attribute_group = { |
1f7df6f8 DW |
2185 | .name = "nfit", |
2186 | .attrs = acpi_nfit_region_attributes, | |
2187 | }; | |
2188 | ||
2189 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { | |
1f7df6f8 DW |
2190 | &acpi_nfit_region_attribute_group, |
2191 | NULL, | |
2192 | }; | |
2193 | ||
eaf96153 DW |
2194 | /* enough info to uniquely specify an interleave set */ |
2195 | struct nfit_set_info { | |
637464c5 DW |
2196 | u64 region_offset; |
2197 | u32 serial_number; | |
2198 | u32 pad; | |
eaf96153 DW |
2199 | }; |
2200 | ||
c12c48ce | 2201 | struct nfit_set_info2 { |
637464c5 DW |
2202 | u64 region_offset; |
2203 | u32 serial_number; | |
2204 | u16 vendor_id; | |
2205 | u16 manufacturing_date; | |
2206 | u8 manufacturing_location; | |
2207 | u8 reserved[31]; | |
c12c48ce DW |
2208 | }; |
2209 | ||
86ef58a4 | 2210 | static int cmp_map_compat(const void *m0, const void *m1) |
eaf96153 | 2211 | { |
637464c5 DW |
2212 | const struct nfit_set_info *map0 = m0; |
2213 | const struct nfit_set_info *map1 = m1; | |
eaf96153 DW |
2214 | |
2215 | return memcmp(&map0->region_offset, &map1->region_offset, | |
2216 | sizeof(u64)); | |
2217 | } | |
2218 | ||
86ef58a4 DW |
2219 | static int cmp_map(const void *m0, const void *m1) |
2220 | { | |
637464c5 DW |
2221 | const struct nfit_set_info *map0 = m0; |
2222 | const struct nfit_set_info *map1 = m1; | |
86ef58a4 | 2223 | |
b03b99a3 DW |
2224 | if (map0->region_offset < map1->region_offset) |
2225 | return -1; | |
2226 | else if (map0->region_offset > map1->region_offset) | |
2227 | return 1; | |
2228 | return 0; | |
86ef58a4 DW |
2229 | } |
2230 | ||
c12c48ce DW |
2231 | static int cmp_map2(const void *m0, const void *m1) |
2232 | { | |
637464c5 DW |
2233 | const struct nfit_set_info2 *map0 = m0; |
2234 | const struct nfit_set_info2 *map1 = m1; | |
c12c48ce DW |
2235 | |
2236 | if (map0->region_offset < map1->region_offset) | |
2237 | return -1; | |
2238 | else if (map0->region_offset > map1->region_offset) | |
2239 | return 1; | |
2240 | return 0; | |
2241 | } | |
2242 | ||
eaf96153 DW |
2243 | /* Retrieve the nth entry referencing this spa */ |
2244 | static struct acpi_nfit_memory_map *memdev_from_spa( | |
2245 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) | |
2246 | { | |
2247 | struct nfit_memdev *nfit_memdev; | |
2248 | ||
2249 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) | |
2250 | if (nfit_memdev->memdev->range_index == range_index) | |
2251 | if (n-- == 0) | |
2252 | return nfit_memdev->memdev; | |
2253 | return NULL; | |
2254 | } | |
2255 | ||
2256 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, | |
2257 | struct nd_region_desc *ndr_desc, | |
2258 | struct acpi_nfit_system_address *spa) | |
2259 | { | |
eaf96153 DW |
2260 | struct device *dev = acpi_desc->dev; |
2261 | struct nd_interleave_set *nd_set; | |
2262 | u16 nr = ndr_desc->num_mappings; | |
c12c48ce | 2263 | struct nfit_set_info2 *info2; |
eaf96153 | 2264 | struct nfit_set_info *info; |
8f2bc243 | 2265 | int i; |
eaf96153 | 2266 | |
faec6f8a DW |
2267 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); |
2268 | if (!nd_set) | |
2269 | return -ENOMEM; | |
f37b451f | 2270 | import_guid(&nd_set->type_guid, spa->range_guid); |
faec6f8a | 2271 | |
637464c5 | 2272 | info = devm_kcalloc(dev, nr, sizeof(*info), GFP_KERNEL); |
eaf96153 DW |
2273 | if (!info) |
2274 | return -ENOMEM; | |
c12c48ce | 2275 | |
637464c5 | 2276 | info2 = devm_kcalloc(dev, nr, sizeof(*info2), GFP_KERNEL); |
c12c48ce DW |
2277 | if (!info2) |
2278 | return -ENOMEM; | |
2279 | ||
eaf96153 | 2280 | for (i = 0; i < nr; i++) { |
44c462eb | 2281 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[i]; |
44c462eb | 2282 | struct nvdimm *nvdimm = mapping->nvdimm; |
eaf96153 | 2283 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
637464c5 DW |
2284 | struct nfit_set_info *map = &info[i]; |
2285 | struct nfit_set_info2 *map2 = &info2[i]; | |
2286 | struct acpi_nfit_memory_map *memdev = | |
2287 | memdev_from_spa(acpi_desc, spa->range_index, i); | |
dcb79b15 | 2288 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
eaf96153 DW |
2289 | |
2290 | if (!memdev || !nfit_mem->dcr) { | |
2291 | dev_err(dev, "%s: failed to find DCR\n", __func__); | |
2292 | return -ENODEV; | |
2293 | } | |
2294 | ||
2295 | map->region_offset = memdev->region_offset; | |
dcb79b15 | 2296 | map->serial_number = dcr->serial_number; |
c12c48ce DW |
2297 | |
2298 | map2->region_offset = memdev->region_offset; | |
dcb79b15 DW |
2299 | map2->serial_number = dcr->serial_number; |
2300 | map2->vendor_id = dcr->vendor_id; | |
2301 | map2->manufacturing_date = dcr->manufacturing_date; | |
2302 | map2->manufacturing_location = dcr->manufacturing_location; | |
eaf96153 DW |
2303 | } |
2304 | ||
c12c48ce | 2305 | /* v1.1 namespaces */ |
637464c5 DW |
2306 | sort(info, nr, sizeof(*info), cmp_map, NULL); |
2307 | nd_set->cookie1 = nd_fletcher64(info, sizeof(*info) * nr, 0); | |
c12c48ce DW |
2308 | |
2309 | /* v1.2 namespaces */ | |
637464c5 DW |
2310 | sort(info2, nr, sizeof(*info2), cmp_map2, NULL); |
2311 | nd_set->cookie2 = nd_fletcher64(info2, sizeof(*info2) * nr, 0); | |
86ef58a4 | 2312 | |
c12c48ce | 2313 | /* support v1.1 namespaces created with the wrong sort order */ |
637464c5 DW |
2314 | sort(info, nr, sizeof(*info), cmp_map_compat, NULL); |
2315 | nd_set->altcookie = nd_fletcher64(info, sizeof(*info) * nr, 0); | |
86ef58a4 | 2316 | |
401c0a19 DW |
2317 | /* record the result of the sort for the mapping position */ |
2318 | for (i = 0; i < nr; i++) { | |
637464c5 | 2319 | struct nfit_set_info2 *map2 = &info2[i]; |
401c0a19 DW |
2320 | int j; |
2321 | ||
2322 | for (j = 0; j < nr; j++) { | |
2323 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[j]; | |
2324 | struct nvdimm *nvdimm = mapping->nvdimm; | |
2325 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); | |
dcb79b15 | 2326 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
401c0a19 | 2327 | |
dcb79b15 DW |
2328 | if (map2->serial_number == dcr->serial_number && |
2329 | map2->vendor_id == dcr->vendor_id && | |
2330 | map2->manufacturing_date == dcr->manufacturing_date && | |
401c0a19 | 2331 | map2->manufacturing_location |
dcb79b15 | 2332 | == dcr->manufacturing_location) { |
401c0a19 DW |
2333 | mapping->position = i; |
2334 | break; | |
2335 | } | |
2336 | } | |
2337 | } | |
2338 | ||
eaf96153 DW |
2339 | ndr_desc->nd_set = nd_set; |
2340 | devm_kfree(dev, info); | |
c12c48ce | 2341 | devm_kfree(dev, info2); |
eaf96153 DW |
2342 | |
2343 | return 0; | |
2344 | } | |
2345 | ||
aef25338 | 2346 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
1cf03c00 | 2347 | struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa) |
0caeef63 | 2348 | { |
aef25338 | 2349 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
1cf03c00 | 2350 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
aef25338 DW |
2351 | int cmd_rc, rc; |
2352 | ||
1cf03c00 DW |
2353 | cmd->address = spa->address; |
2354 | cmd->length = spa->length; | |
aef25338 DW |
2355 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
2356 | sizeof(*cmd), &cmd_rc); | |
2357 | if (rc < 0) | |
2358 | return rc; | |
1cf03c00 | 2359 | return cmd_rc; |
0caeef63 VV |
2360 | } |
2361 | ||
d3abaf43 DW |
2362 | static int ars_start(struct acpi_nfit_desc *acpi_desc, |
2363 | struct nfit_spa *nfit_spa, enum nfit_ars_state req_type) | |
0caeef63 VV |
2364 | { |
2365 | int rc; | |
1cf03c00 DW |
2366 | int cmd_rc; |
2367 | struct nd_cmd_ars_start ars_start; | |
2368 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2369 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
0caeef63 | 2370 | |
1cf03c00 DW |
2371 | memset(&ars_start, 0, sizeof(ars_start)); |
2372 | ars_start.address = spa->address; | |
2373 | ars_start.length = spa->length; | |
d3abaf43 | 2374 | if (req_type == ARS_REQ_SHORT) |
bc6ba808 | 2375 | ars_start.flags = ND_ARS_RETURN_PREV_DATA; |
1cf03c00 DW |
2376 | if (nfit_spa_type(spa) == NFIT_SPA_PM) |
2377 | ars_start.type = ND_ARS_PERSISTENT; | |
2378 | else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) | |
2379 | ars_start.type = ND_ARS_VOLATILE; | |
2380 | else | |
2381 | return -ENOTTY; | |
aef25338 | 2382 | |
1cf03c00 DW |
2383 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
2384 | sizeof(ars_start), &cmd_rc); | |
aef25338 | 2385 | |
1cf03c00 DW |
2386 | if (rc < 0) |
2387 | return rc; | |
78153dd4 DW |
2388 | if (cmd_rc < 0) |
2389 | return cmd_rc; | |
2390 | set_bit(ARS_VALID, &acpi_desc->scrub_flags); | |
2391 | return 0; | |
0caeef63 VV |
2392 | } |
2393 | ||
1cf03c00 | 2394 | static int ars_continue(struct acpi_nfit_desc *acpi_desc) |
0caeef63 | 2395 | { |
aef25338 | 2396 | int rc, cmd_rc; |
1cf03c00 DW |
2397 | struct nd_cmd_ars_start ars_start; |
2398 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
2399 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
2400 | ||
317a992a DW |
2401 | ars_start = (struct nd_cmd_ars_start) { |
2402 | .address = ars_status->restart_address, | |
2403 | .length = ars_status->restart_length, | |
2404 | .type = ars_status->type, | |
2405 | }; | |
1cf03c00 DW |
2406 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
2407 | sizeof(ars_start), &cmd_rc); | |
2408 | if (rc < 0) | |
2409 | return rc; | |
2410 | return cmd_rc; | |
2411 | } | |
0caeef63 | 2412 | |
1cf03c00 DW |
2413 | static int ars_get_status(struct acpi_nfit_desc *acpi_desc) |
2414 | { | |
2415 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; | |
2416 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
2417 | int rc, cmd_rc; | |
aef25338 | 2418 | |
1cf03c00 | 2419 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status, |
459d0ddb | 2420 | acpi_desc->max_ars, &cmd_rc); |
1cf03c00 DW |
2421 | if (rc < 0) |
2422 | return rc; | |
2423 | return cmd_rc; | |
0caeef63 VV |
2424 | } |
2425 | ||
bc6ba808 DW |
2426 | static void ars_complete(struct acpi_nfit_desc *acpi_desc, |
2427 | struct nfit_spa *nfit_spa) | |
2428 | { | |
2429 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; | |
2430 | struct acpi_nfit_system_address *spa = nfit_spa->spa; | |
2431 | struct nd_region *nd_region = nfit_spa->nd_region; | |
2432 | struct device *dev; | |
2433 | ||
d3abaf43 DW |
2434 | lockdep_assert_held(&acpi_desc->init_mutex); |
2435 | /* | |
2436 | * Only advance the ARS state for ARS runs initiated by the | |
2437 | * kernel, ignore ARS results from BIOS initiated runs for scrub | |
2438 | * completion tracking. | |
2439 | */ | |
2440 | if (acpi_desc->scrub_spa != nfit_spa) | |
2441 | return; | |
2442 | ||
bc6ba808 DW |
2443 | if ((ars_status->address >= spa->address && ars_status->address |
2444 | < spa->address + spa->length) | |
2445 | || (ars_status->address < spa->address)) { | |
2446 | /* | |
2447 | * Assume that if a scrub starts at an offset from the | |
2448 | * start of nfit_spa that we are in the continuation | |
2449 | * case. | |
2450 | * | |
2451 | * Otherwise, if the scrub covers the spa range, mark | |
2452 | * any pending request complete. | |
2453 | */ | |
2454 | if (ars_status->address + ars_status->length | |
2455 | >= spa->address + spa->length) | |
2456 | /* complete */; | |
2457 | else | |
2458 | return; | |
2459 | } else | |
2460 | return; | |
2461 | ||
d3abaf43 | 2462 | acpi_desc->scrub_spa = NULL; |
bc6ba808 DW |
2463 | if (nd_region) { |
2464 | dev = nd_region_dev(nd_region); | |
2465 | nvdimm_region_notify(nd_region, NVDIMM_REVALIDATE_POISON); | |
2466 | } else | |
2467 | dev = acpi_desc->dev; | |
d3abaf43 | 2468 | dev_dbg(dev, "ARS: range %d complete\n", spa->range_index); |
bc6ba808 DW |
2469 | } |
2470 | ||
459d0ddb | 2471 | static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc) |
0caeef63 | 2472 | { |
82aa37cf | 2473 | struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus; |
459d0ddb | 2474 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
0caeef63 VV |
2475 | int rc; |
2476 | u32 i; | |
2477 | ||
82aa37cf DW |
2478 | /* |
2479 | * First record starts at 44 byte offset from the start of the | |
2480 | * payload. | |
2481 | */ | |
2482 | if (ars_status->out_length < 44) | |
2483 | return 0; | |
78153dd4 DW |
2484 | |
2485 | /* | |
2486 | * Ignore potentially stale results that are only refreshed | |
2487 | * after a start-ARS event. | |
2488 | */ | |
2489 | if (!test_and_clear_bit(ARS_VALID, &acpi_desc->scrub_flags)) { | |
2490 | dev_dbg(acpi_desc->dev, "skip %d stale records\n", | |
2491 | ars_status->num_records); | |
2492 | return 0; | |
2493 | } | |
2494 | ||
0caeef63 | 2495 | for (i = 0; i < ars_status->num_records; i++) { |
82aa37cf DW |
2496 | /* only process full records */ |
2497 | if (ars_status->out_length | |
2498 | < 44 + sizeof(struct nd_ars_record) * (i + 1)) | |
2499 | break; | |
aa9ad44a | 2500 | rc = nvdimm_bus_add_badrange(nvdimm_bus, |
0caeef63 VV |
2501 | ars_status->records[i].err_address, |
2502 | ars_status->records[i].length); | |
2503 | if (rc) | |
2504 | return rc; | |
2505 | } | |
82aa37cf DW |
2506 | if (i < ars_status->num_records) |
2507 | dev_warn(acpi_desc->dev, "detected truncated ars results\n"); | |
0caeef63 VV |
2508 | |
2509 | return 0; | |
2510 | } | |
2511 | ||
af1996ef TK |
2512 | static void acpi_nfit_remove_resource(void *data) |
2513 | { | |
2514 | struct resource *res = data; | |
2515 | ||
2516 | remove_resource(res); | |
2517 | } | |
2518 | ||
2519 | static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc, | |
2520 | struct nd_region_desc *ndr_desc) | |
2521 | { | |
2522 | struct resource *res, *nd_res = ndr_desc->res; | |
2523 | int is_pmem, ret; | |
2524 | ||
2525 | /* No operation if the region is already registered as PMEM */ | |
2526 | is_pmem = region_intersects(nd_res->start, resource_size(nd_res), | |
2527 | IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY); | |
2528 | if (is_pmem == REGION_INTERSECTS) | |
2529 | return 0; | |
2530 | ||
2531 | res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL); | |
2532 | if (!res) | |
2533 | return -ENOMEM; | |
2534 | ||
2535 | res->name = "Persistent Memory"; | |
2536 | res->start = nd_res->start; | |
2537 | res->end = nd_res->end; | |
2538 | res->flags = IORESOURCE_MEM; | |
2539 | res->desc = IORES_DESC_PERSISTENT_MEMORY; | |
2540 | ||
2541 | ret = insert_resource(&iomem_resource, res); | |
2542 | if (ret) | |
2543 | return ret; | |
2544 | ||
d932dd2c SV |
2545 | ret = devm_add_action_or_reset(acpi_desc->dev, |
2546 | acpi_nfit_remove_resource, | |
2547 | res); | |
2548 | if (ret) | |
af1996ef | 2549 | return ret; |
af1996ef TK |
2550 | |
2551 | return 0; | |
2552 | } | |
2553 | ||
1f7df6f8 | 2554 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
44c462eb | 2555 | struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc, |
1f7df6f8 | 2556 | struct acpi_nfit_memory_map *memdev, |
1cf03c00 | 2557 | struct nfit_spa *nfit_spa) |
1f7df6f8 DW |
2558 | { |
2559 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, | |
2560 | memdev->device_handle); | |
1cf03c00 | 2561 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
1f7df6f8 DW |
2562 | |
2563 | if (!nvdimm) { | |
2564 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", | |
2565 | spa->range_index, memdev->device_handle); | |
2566 | return -ENODEV; | |
2567 | } | |
2568 | ||
44c462eb | 2569 | mapping->nvdimm = nvdimm; |
1f7df6f8 DW |
2570 | switch (nfit_spa_type(spa)) { |
2571 | case NFIT_SPA_PM: | |
2572 | case NFIT_SPA_VOLATILE: | |
44c462eb DW |
2573 | mapping->start = memdev->address; |
2574 | mapping->size = memdev->region_size; | |
1f7df6f8 | 2575 | break; |
1f7df6f8 DW |
2576 | } |
2577 | ||
2578 | return 0; | |
2579 | } | |
2580 | ||
c2f32acd LCY |
2581 | static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa) |
2582 | { | |
2583 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || | |
2584 | nfit_spa_type(spa) == NFIT_SPA_VCD || | |
2585 | nfit_spa_type(spa) == NFIT_SPA_PDISK || | |
2586 | nfit_spa_type(spa) == NFIT_SPA_PCD); | |
2587 | } | |
2588 | ||
c9e582aa DW |
2589 | static bool nfit_spa_is_volatile(struct acpi_nfit_system_address *spa) |
2590 | { | |
2591 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || | |
2592 | nfit_spa_type(spa) == NFIT_SPA_VCD || | |
2593 | nfit_spa_type(spa) == NFIT_SPA_VOLATILE); | |
2594 | } | |
2595 | ||
1f7df6f8 DW |
2596 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, |
2597 | struct nfit_spa *nfit_spa) | |
2598 | { | |
44c462eb | 2599 | static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS]; |
1f7df6f8 | 2600 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
3b6c6c03 | 2601 | struct nd_region_desc *ndr_desc, _ndr_desc; |
1f7df6f8 | 2602 | struct nfit_memdev *nfit_memdev; |
1f7df6f8 DW |
2603 | struct nvdimm_bus *nvdimm_bus; |
2604 | struct resource res; | |
eaf96153 | 2605 | int count = 0, rc; |
1f7df6f8 | 2606 | |
1cf03c00 | 2607 | if (nfit_spa->nd_region) |
20985164 VV |
2608 | return 0; |
2609 | ||
c2f32acd | 2610 | if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) { |
b814735f | 2611 | dev_dbg(acpi_desc->dev, "detected invalid spa index\n"); |
1f7df6f8 DW |
2612 | return 0; |
2613 | } | |
2614 | ||
2615 | memset(&res, 0, sizeof(res)); | |
44c462eb | 2616 | memset(&mappings, 0, sizeof(mappings)); |
3b6c6c03 | 2617 | memset(&_ndr_desc, 0, sizeof(_ndr_desc)); |
1f7df6f8 DW |
2618 | res.start = spa->address; |
2619 | res.end = res.start + spa->length - 1; | |
3b6c6c03 | 2620 | ndr_desc = &_ndr_desc; |
047fc8a1 RZ |
2621 | ndr_desc->res = &res; |
2622 | ndr_desc->provider_data = nfit_spa; | |
2623 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; | |
8fc5c735 | 2624 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) { |
4eb3723f | 2625 | ndr_desc->numa_node = pxm_to_online_node(spa->proximity_domain); |
01feba59 | 2626 | ndr_desc->target_node = pxm_to_node(spa->proximity_domain); |
8fc5c735 | 2627 | } else { |
41d7a6d6 | 2628 | ndr_desc->numa_node = NUMA_NO_NODE; |
8fc5c735 DW |
2629 | ndr_desc->target_node = NUMA_NO_NODE; |
2630 | } | |
41d7a6d6 | 2631 | |
f060db99 JH |
2632 | /* Fallback to address based numa information if node lookup failed */ |
2633 | if (ndr_desc->numa_node == NUMA_NO_NODE) { | |
2634 | ndr_desc->numa_node = memory_add_physaddr_to_nid(spa->address); | |
2635 | dev_info(acpi_desc->dev, "changing numa node from %d to %d for nfit region [%pa-%pa]", | |
2636 | NUMA_NO_NODE, ndr_desc->numa_node, &res.start, &res.end); | |
2637 | } | |
2638 | if (ndr_desc->target_node == NUMA_NO_NODE) { | |
2639 | ndr_desc->target_node = phys_to_target_node(spa->address); | |
2640 | dev_info(acpi_desc->dev, "changing target node from %d to %d for nfit region [%pa-%pa]", | |
2641 | NUMA_NO_NODE, ndr_desc->numa_node, &res.start, &res.end); | |
2642 | } | |
2643 | ||
fe9a552e DW |
2644 | /* |
2645 | * Persistence domain bits are hierarchical, if | |
2646 | * ACPI_NFIT_CAPABILITY_CACHE_FLUSH is set then | |
2647 | * ACPI_NFIT_CAPABILITY_MEM_FLUSH is implied. | |
2648 | */ | |
2649 | if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_CACHE_FLUSH) | |
06e8ccda | 2650 | set_bit(ND_REGION_PERSIST_CACHE, &ndr_desc->flags); |
fe9a552e | 2651 | else if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_MEM_FLUSH) |
30e6d7bf DJ |
2652 | set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc->flags); |
2653 | ||
1f7df6f8 DW |
2654 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
2655 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; | |
44c462eb | 2656 | struct nd_mapping_desc *mapping; |
1f7df6f8 | 2657 | |
b93dfa6b DW |
2658 | /* range index 0 == unmapped in SPA or invalid-SPA */ |
2659 | if (memdev->range_index == 0 || spa->range_index == 0) | |
2660 | continue; | |
1f7df6f8 DW |
2661 | if (memdev->range_index != spa->range_index) |
2662 | continue; | |
2663 | if (count >= ND_MAX_MAPPINGS) { | |
2664 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", | |
2665 | spa->range_index, ND_MAX_MAPPINGS); | |
2666 | return -ENXIO; | |
2667 | } | |
44c462eb DW |
2668 | mapping = &mappings[count++]; |
2669 | rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc, | |
1cf03c00 | 2670 | memdev, nfit_spa); |
1f7df6f8 | 2671 | if (rc) |
1cf03c00 | 2672 | goto out; |
1f7df6f8 DW |
2673 | } |
2674 | ||
44c462eb | 2675 | ndr_desc->mapping = mappings; |
047fc8a1 RZ |
2676 | ndr_desc->num_mappings = count; |
2677 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); | |
eaf96153 | 2678 | if (rc) |
1cf03c00 | 2679 | goto out; |
eaf96153 | 2680 | |
1f7df6f8 DW |
2681 | nvdimm_bus = acpi_desc->nvdimm_bus; |
2682 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { | |
af1996ef | 2683 | rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc); |
48901165 | 2684 | if (rc) { |
af1996ef TK |
2685 | dev_warn(acpi_desc->dev, |
2686 | "failed to insert pmem resource to iomem: %d\n", | |
2687 | rc); | |
48901165 | 2688 | goto out; |
0caeef63 | 2689 | } |
48901165 | 2690 | |
1cf03c00 DW |
2691 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
2692 | ndr_desc); | |
2693 | if (!nfit_spa->nd_region) | |
2694 | rc = -ENOMEM; | |
c9e582aa | 2695 | } else if (nfit_spa_is_volatile(spa)) { |
1cf03c00 DW |
2696 | nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus, |
2697 | ndr_desc); | |
2698 | if (!nfit_spa->nd_region) | |
2699 | rc = -ENOMEM; | |
c2f32acd LCY |
2700 | } else if (nfit_spa_is_virtual(spa)) { |
2701 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, | |
2702 | ndr_desc); | |
2703 | if (!nfit_spa->nd_region) | |
2704 | rc = -ENOMEM; | |
1f7df6f8 | 2705 | } |
20985164 | 2706 | |
1cf03c00 DW |
2707 | out: |
2708 | if (rc) | |
2709 | dev_err(acpi_desc->dev, "failed to register spa range %d\n", | |
2710 | nfit_spa->spa->range_index); | |
2711 | return rc; | |
2712 | } | |
2713 | ||
459d0ddb | 2714 | static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc) |
1cf03c00 DW |
2715 | { |
2716 | struct device *dev = acpi_desc->dev; | |
2717 | struct nd_cmd_ars_status *ars_status; | |
2718 | ||
459d0ddb DW |
2719 | if (acpi_desc->ars_status) { |
2720 | memset(acpi_desc->ars_status, 0, acpi_desc->max_ars); | |
1cf03c00 DW |
2721 | return 0; |
2722 | } | |
2723 | ||
459d0ddb | 2724 | ars_status = devm_kzalloc(dev, acpi_desc->max_ars, GFP_KERNEL); |
1cf03c00 DW |
2725 | if (!ars_status) |
2726 | return -ENOMEM; | |
2727 | acpi_desc->ars_status = ars_status; | |
1f7df6f8 DW |
2728 | return 0; |
2729 | } | |
2730 | ||
459d0ddb | 2731 | static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc) |
1cf03c00 | 2732 | { |
1cf03c00 DW |
2733 | int rc; |
2734 | ||
459d0ddb | 2735 | if (ars_status_alloc(acpi_desc)) |
1cf03c00 DW |
2736 | return -ENOMEM; |
2737 | ||
2738 | rc = ars_get_status(acpi_desc); | |
bc6ba808 | 2739 | |
1cf03c00 DW |
2740 | if (rc < 0 && rc != -ENOSPC) |
2741 | return rc; | |
2742 | ||
459d0ddb | 2743 | if (ars_status_process_records(acpi_desc)) |
3fa58dca | 2744 | dev_err(acpi_desc->dev, "Failed to process ARS records\n"); |
1cf03c00 | 2745 | |
3fa58dca | 2746 | return rc; |
1cf03c00 DW |
2747 | } |
2748 | ||
d3abaf43 DW |
2749 | static int ars_register(struct acpi_nfit_desc *acpi_desc, |
2750 | struct nfit_spa *nfit_spa) | |
1cf03c00 | 2751 | { |
d3abaf43 | 2752 | int rc; |
1cf03c00 | 2753 | |
fa3ed4d9 | 2754 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) |
bca811a7 | 2755 | return acpi_nfit_register_region(acpi_desc, nfit_spa); |
1cf03c00 | 2756 | |
d3abaf43 | 2757 | set_bit(ARS_REQ_SHORT, &nfit_spa->ars_state); |
fa3ed4d9 DW |
2758 | if (!no_init_ars) |
2759 | set_bit(ARS_REQ_LONG, &nfit_spa->ars_state); | |
1cf03c00 | 2760 | |
d3abaf43 | 2761 | switch (acpi_nfit_query_poison(acpi_desc)) { |
bc6ba808 | 2762 | case 0: |
c6c5df29 | 2763 | case -ENOSPC: |
bc6ba808 | 2764 | case -EAGAIN: |
d3abaf43 DW |
2765 | rc = ars_start(acpi_desc, nfit_spa, ARS_REQ_SHORT); |
2766 | /* shouldn't happen, try again later */ | |
2767 | if (rc == -EBUSY) | |
1cf03c00 | 2768 | break; |
d3abaf43 | 2769 | if (rc) { |
bc6ba808 DW |
2770 | set_bit(ARS_FAILED, &nfit_spa->ars_state); |
2771 | break; | |
1cf03c00 | 2772 | } |
d3abaf43 DW |
2773 | clear_bit(ARS_REQ_SHORT, &nfit_spa->ars_state); |
2774 | rc = acpi_nfit_query_poison(acpi_desc); | |
2775 | if (rc) | |
2776 | break; | |
2777 | acpi_desc->scrub_spa = nfit_spa; | |
2778 | ars_complete(acpi_desc, nfit_spa); | |
2779 | /* | |
2780 | * If ars_complete() says we didn't complete the | |
2781 | * short scrub, we'll try again with a long | |
2782 | * request. | |
2783 | */ | |
2784 | acpi_desc->scrub_spa = NULL; | |
1cf03c00 | 2785 | break; |
bc6ba808 | 2786 | case -EBUSY: |
d3abaf43 | 2787 | case -ENOMEM: |
d3abaf43 DW |
2788 | /* |
2789 | * BIOS was using ARS, wait for it to complete (or | |
2790 | * resources to become available) and then perform our | |
2791 | * own scrubs. | |
2792 | */ | |
1cf03c00 | 2793 | break; |
bc6ba808 DW |
2794 | default: |
2795 | set_bit(ARS_FAILED, &nfit_spa->ars_state); | |
2796 | break; | |
2797 | } | |
2798 | ||
bc6ba808 | 2799 | return acpi_nfit_register_region(acpi_desc, nfit_spa); |
1cf03c00 DW |
2800 | } |
2801 | ||
bc6ba808 | 2802 | static void ars_complete_all(struct acpi_nfit_desc *acpi_desc) |
1f7df6f8 DW |
2803 | { |
2804 | struct nfit_spa *nfit_spa; | |
1cf03c00 | 2805 | |
1f7df6f8 | 2806 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
bc6ba808 | 2807 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) |
1cf03c00 | 2808 | continue; |
bc6ba808 DW |
2809 | ars_complete(acpi_desc, nfit_spa); |
2810 | } | |
2811 | } | |
1cf03c00 | 2812 | |
bc6ba808 DW |
2813 | static unsigned int __acpi_nfit_scrub(struct acpi_nfit_desc *acpi_desc, |
2814 | int query_rc) | |
2815 | { | |
2816 | unsigned int tmo = acpi_desc->scrub_tmo; | |
2817 | struct device *dev = acpi_desc->dev; | |
2818 | struct nfit_spa *nfit_spa; | |
1cf03c00 | 2819 | |
d3abaf43 DW |
2820 | lockdep_assert_held(&acpi_desc->init_mutex); |
2821 | ||
e34b8252 | 2822 | if (test_bit(ARS_CANCEL, &acpi_desc->scrub_flags)) |
bc6ba808 | 2823 | return 0; |
1cf03c00 | 2824 | |
bc6ba808 DW |
2825 | if (query_rc == -EBUSY) { |
2826 | dev_dbg(dev, "ARS: ARS busy\n"); | |
2827 | return min(30U * 60U, tmo * 2); | |
2828 | } | |
2829 | if (query_rc == -ENOSPC) { | |
2830 | dev_dbg(dev, "ARS: ARS continue\n"); | |
2831 | ars_continue(acpi_desc); | |
2832 | return 1; | |
2833 | } | |
2834 | if (query_rc && query_rc != -EAGAIN) { | |
2835 | unsigned long long addr, end; | |
1cf03c00 | 2836 | |
bc6ba808 DW |
2837 | addr = acpi_desc->ars_status->address; |
2838 | end = addr + acpi_desc->ars_status->length; | |
2839 | dev_dbg(dev, "ARS: %llx-%llx failed (%d)\n", addr, end, | |
2840 | query_rc); | |
1f7df6f8 | 2841 | } |
1cf03c00 | 2842 | |
bc6ba808 | 2843 | ars_complete_all(acpi_desc); |
1cf03c00 | 2844 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
d3abaf43 DW |
2845 | enum nfit_ars_state req_type; |
2846 | int rc; | |
2847 | ||
bc6ba808 DW |
2848 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) |
2849 | continue; | |
d3abaf43 DW |
2850 | |
2851 | /* prefer short ARS requests first */ | |
2852 | if (test_bit(ARS_REQ_SHORT, &nfit_spa->ars_state)) | |
2853 | req_type = ARS_REQ_SHORT; | |
2854 | else if (test_bit(ARS_REQ_LONG, &nfit_spa->ars_state)) | |
2855 | req_type = ARS_REQ_LONG; | |
2856 | else | |
2857 | continue; | |
2858 | rc = ars_start(acpi_desc, nfit_spa, req_type); | |
2859 | ||
2860 | dev = nd_region_dev(nfit_spa->nd_region); | |
2861 | dev_dbg(dev, "ARS: range %d ARS start %s (%d)\n", | |
2862 | nfit_spa->spa->range_index, | |
2863 | req_type == ARS_REQ_SHORT ? "short" : "long", | |
2864 | rc); | |
2865 | /* | |
2866 | * Hmm, we raced someone else starting ARS? Try again in | |
2867 | * a bit. | |
2868 | */ | |
2869 | if (rc == -EBUSY) | |
2870 | return 1; | |
2871 | if (rc == 0) { | |
2872 | dev_WARN_ONCE(dev, acpi_desc->scrub_spa, | |
2873 | "scrub start while range %d active\n", | |
2874 | acpi_desc->scrub_spa->spa->range_index); | |
2875 | clear_bit(req_type, &nfit_spa->ars_state); | |
2876 | acpi_desc->scrub_spa = nfit_spa; | |
2877 | /* | |
2878 | * Consider this spa last for future scrub | |
2879 | * requests | |
2880 | */ | |
2881 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); | |
2882 | return 1; | |
37b137ff | 2883 | } |
d3abaf43 DW |
2884 | |
2885 | dev_err(dev, "ARS: range %d ARS failed (%d)\n", | |
2886 | nfit_spa->spa->range_index, rc); | |
2887 | set_bit(ARS_FAILED, &nfit_spa->ars_state); | |
1cf03c00 | 2888 | } |
bc6ba808 DW |
2889 | return 0; |
2890 | } | |
1cf03c00 | 2891 | |
33cc2c96 DW |
2892 | static void __sched_ars(struct acpi_nfit_desc *acpi_desc, unsigned int tmo) |
2893 | { | |
2894 | lockdep_assert_held(&acpi_desc->init_mutex); | |
2895 | ||
e34b8252 | 2896 | set_bit(ARS_BUSY, &acpi_desc->scrub_flags); |
33cc2c96 DW |
2897 | /* note this should only be set from within the workqueue */ |
2898 | if (tmo) | |
2899 | acpi_desc->scrub_tmo = tmo; | |
2900 | queue_delayed_work(nfit_wq, &acpi_desc->dwork, tmo * HZ); | |
2901 | } | |
2902 | ||
2903 | static void sched_ars(struct acpi_nfit_desc *acpi_desc) | |
2904 | { | |
2905 | __sched_ars(acpi_desc, 0); | |
2906 | } | |
2907 | ||
2908 | static void notify_ars_done(struct acpi_nfit_desc *acpi_desc) | |
2909 | { | |
2910 | lockdep_assert_held(&acpi_desc->init_mutex); | |
2911 | ||
e34b8252 | 2912 | clear_bit(ARS_BUSY, &acpi_desc->scrub_flags); |
33cc2c96 DW |
2913 | acpi_desc->scrub_count++; |
2914 | if (acpi_desc->scrub_count_state) | |
2915 | sysfs_notify_dirent(acpi_desc->scrub_count_state); | |
2916 | } | |
2917 | ||
bc6ba808 DW |
2918 | static void acpi_nfit_scrub(struct work_struct *work) |
2919 | { | |
2920 | struct acpi_nfit_desc *acpi_desc; | |
2921 | unsigned int tmo; | |
2922 | int query_rc; | |
2923 | ||
2924 | acpi_desc = container_of(work, typeof(*acpi_desc), dwork.work); | |
2925 | mutex_lock(&acpi_desc->init_mutex); | |
2926 | query_rc = acpi_nfit_query_poison(acpi_desc); | |
2927 | tmo = __acpi_nfit_scrub(acpi_desc, query_rc); | |
33cc2c96 DW |
2928 | if (tmo) |
2929 | __sched_ars(acpi_desc, tmo); | |
2930 | else | |
2931 | notify_ars_done(acpi_desc); | |
bc6ba808 | 2932 | memset(acpi_desc->ars_status, 0, acpi_desc->max_ars); |
5479b275 | 2933 | clear_bit(ARS_POLL, &acpi_desc->scrub_flags); |
1cf03c00 DW |
2934 | mutex_unlock(&acpi_desc->init_mutex); |
2935 | } | |
2936 | ||
459d0ddb DW |
2937 | static void acpi_nfit_init_ars(struct acpi_nfit_desc *acpi_desc, |
2938 | struct nfit_spa *nfit_spa) | |
2939 | { | |
2940 | int type = nfit_spa_type(nfit_spa->spa); | |
2941 | struct nd_cmd_ars_cap ars_cap; | |
2942 | int rc; | |
2943 | ||
d3abaf43 | 2944 | set_bit(ARS_FAILED, &nfit_spa->ars_state); |
459d0ddb DW |
2945 | memset(&ars_cap, 0, sizeof(ars_cap)); |
2946 | rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa); | |
2947 | if (rc < 0) | |
2948 | return; | |
2949 | /* check that the supported scrub types match the spa type */ | |
2950 | if (type == NFIT_SPA_VOLATILE && ((ars_cap.status >> 16) | |
2951 | & ND_ARS_VOLATILE) == 0) | |
2952 | return; | |
2953 | if (type == NFIT_SPA_PM && ((ars_cap.status >> 16) | |
2954 | & ND_ARS_PERSISTENT) == 0) | |
2955 | return; | |
2956 | ||
2957 | nfit_spa->max_ars = ars_cap.max_ars_out; | |
2958 | nfit_spa->clear_err_unit = ars_cap.clear_err_unit; | |
2959 | acpi_desc->max_ars = max(nfit_spa->max_ars, acpi_desc->max_ars); | |
bc6ba808 | 2960 | clear_bit(ARS_FAILED, &nfit_spa->ars_state); |
459d0ddb DW |
2961 | } |
2962 | ||
1cf03c00 DW |
2963 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) |
2964 | { | |
2965 | struct nfit_spa *nfit_spa; | |
9f1048d4 | 2966 | int rc, do_sched_ars = 0; |
1cf03c00 | 2967 | |
78153dd4 | 2968 | set_bit(ARS_VALID, &acpi_desc->scrub_flags); |
8d0d8ed3 | 2969 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
bc6ba808 DW |
2970 | switch (nfit_spa_type(nfit_spa->spa)) { |
2971 | case NFIT_SPA_VOLATILE: | |
2972 | case NFIT_SPA_PM: | |
459d0ddb | 2973 | acpi_nfit_init_ars(acpi_desc, nfit_spa); |
bc6ba808 | 2974 | break; |
459d0ddb | 2975 | } |
8d0d8ed3 | 2976 | } |
1cf03c00 | 2977 | |
9f1048d4 | 2978 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
bc6ba808 DW |
2979 | switch (nfit_spa_type(nfit_spa->spa)) { |
2980 | case NFIT_SPA_VOLATILE: | |
2981 | case NFIT_SPA_PM: | |
2982 | /* register regions and kick off initial ARS run */ | |
d3abaf43 | 2983 | rc = ars_register(acpi_desc, nfit_spa); |
bc6ba808 DW |
2984 | if (rc) |
2985 | return rc; | |
9f1048d4 DW |
2986 | |
2987 | /* | |
2988 | * Kick off background ARS if at least one | |
2989 | * region successfully registered ARS | |
2990 | */ | |
2991 | if (!test_bit(ARS_FAILED, &nfit_spa->ars_state)) | |
2992 | do_sched_ars++; | |
bc6ba808 DW |
2993 | break; |
2994 | case NFIT_SPA_BDW: | |
2995 | /* nothing to register */ | |
2996 | break; | |
2997 | case NFIT_SPA_DCR: | |
2998 | case NFIT_SPA_VDISK: | |
2999 | case NFIT_SPA_VCD: | |
3000 | case NFIT_SPA_PDISK: | |
3001 | case NFIT_SPA_PCD: | |
3002 | /* register known regions that don't support ARS */ | |
1cf03c00 DW |
3003 | rc = acpi_nfit_register_region(acpi_desc, nfit_spa); |
3004 | if (rc) | |
3005 | return rc; | |
bc6ba808 DW |
3006 | break; |
3007 | default: | |
3008 | /* don't register unknown regions */ | |
3009 | break; | |
1cf03c00 | 3010 | } |
9f1048d4 | 3011 | } |
1cf03c00 | 3012 | |
9f1048d4 DW |
3013 | if (do_sched_ars) |
3014 | sched_ars(acpi_desc); | |
1f7df6f8 DW |
3015 | return 0; |
3016 | } | |
3017 | ||
20985164 VV |
3018 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
3019 | struct nfit_table_prev *prev) | |
3020 | { | |
3021 | struct device *dev = acpi_desc->dev; | |
3022 | ||
3023 | if (!list_empty(&prev->spas) || | |
3024 | !list_empty(&prev->memdevs) || | |
3025 | !list_empty(&prev->dcrs) || | |
3026 | !list_empty(&prev->bdws) || | |
3027 | !list_empty(&prev->idts) || | |
3028 | !list_empty(&prev->flushes)) { | |
3029 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); | |
3030 | return -ENXIO; | |
3031 | } | |
3032 | return 0; | |
3033 | } | |
3034 | ||
37b137ff VV |
3035 | static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc) |
3036 | { | |
3037 | struct device *dev = acpi_desc->dev; | |
3038 | struct kernfs_node *nfit; | |
3039 | struct device *bus_dev; | |
3040 | ||
3041 | if (!ars_supported(acpi_desc->nvdimm_bus)) | |
3042 | return 0; | |
3043 | ||
3044 | bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); | |
3045 | nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit"); | |
3046 | if (!nfit) { | |
3047 | dev_err(dev, "sysfs_get_dirent 'nfit' failed\n"); | |
3048 | return -ENODEV; | |
3049 | } | |
3050 | acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub"); | |
3051 | sysfs_put(nfit); | |
3052 | if (!acpi_desc->scrub_count_state) { | |
3053 | dev_err(dev, "sysfs_get_dirent 'scrub' failed\n"); | |
3054 | return -ENODEV; | |
3055 | } | |
3056 | ||
3057 | return 0; | |
3058 | } | |
3059 | ||
fbabd829 | 3060 | static void acpi_nfit_unregister(void *data) |
58cd71b4 DW |
3061 | { |
3062 | struct acpi_nfit_desc *acpi_desc = data; | |
3063 | ||
58cd71b4 | 3064 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
58cd71b4 DW |
3065 | } |
3066 | ||
e7a11b44 | 3067 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz) |
b94d5230 DW |
3068 | { |
3069 | struct device *dev = acpi_desc->dev; | |
20985164 | 3070 | struct nfit_table_prev prev; |
b94d5230 | 3071 | const void *end; |
1f7df6f8 | 3072 | int rc; |
b94d5230 | 3073 | |
58cd71b4 | 3074 | if (!acpi_desc->nvdimm_bus) { |
37b137ff VV |
3075 | acpi_nfit_init_dsms(acpi_desc); |
3076 | ||
58cd71b4 DW |
3077 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, |
3078 | &acpi_desc->nd_desc); | |
3079 | if (!acpi_desc->nvdimm_bus) | |
3080 | return -ENOMEM; | |
37b137ff | 3081 | |
fbabd829 | 3082 | rc = devm_add_action_or_reset(dev, acpi_nfit_unregister, |
58cd71b4 DW |
3083 | acpi_desc); |
3084 | if (rc) | |
3085 | return rc; | |
37b137ff VV |
3086 | |
3087 | rc = acpi_nfit_desc_init_scrub_attr(acpi_desc); | |
3088 | if (rc) | |
3089 | return rc; | |
6839a6d9 VV |
3090 | |
3091 | /* register this acpi_desc for mce notifications */ | |
3092 | mutex_lock(&acpi_desc_lock); | |
3093 | list_add_tail(&acpi_desc->list, &acpi_descs); | |
3094 | mutex_unlock(&acpi_desc_lock); | |
58cd71b4 DW |
3095 | } |
3096 | ||
20985164 VV |
3097 | mutex_lock(&acpi_desc->init_mutex); |
3098 | ||
3099 | INIT_LIST_HEAD(&prev.spas); | |
3100 | INIT_LIST_HEAD(&prev.memdevs); | |
3101 | INIT_LIST_HEAD(&prev.dcrs); | |
3102 | INIT_LIST_HEAD(&prev.bdws); | |
3103 | INIT_LIST_HEAD(&prev.idts); | |
3104 | INIT_LIST_HEAD(&prev.flushes); | |
3105 | ||
3106 | list_cut_position(&prev.spas, &acpi_desc->spas, | |
3107 | acpi_desc->spas.prev); | |
3108 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, | |
3109 | acpi_desc->memdevs.prev); | |
3110 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, | |
3111 | acpi_desc->dcrs.prev); | |
3112 | list_cut_position(&prev.bdws, &acpi_desc->bdws, | |
3113 | acpi_desc->bdws.prev); | |
3114 | list_cut_position(&prev.idts, &acpi_desc->idts, | |
3115 | acpi_desc->idts.prev); | |
3116 | list_cut_position(&prev.flushes, &acpi_desc->flushes, | |
3117 | acpi_desc->flushes.prev); | |
b94d5230 | 3118 | |
b94d5230 | 3119 | end = data + sz; |
b94d5230 | 3120 | while (!IS_ERR_OR_NULL(data)) |
20985164 | 3121 | data = add_table(acpi_desc, &prev, data, end); |
b94d5230 DW |
3122 | |
3123 | if (IS_ERR(data)) { | |
b814735f | 3124 | dev_dbg(dev, "nfit table parsing error: %ld\n", PTR_ERR(data)); |
20985164 VV |
3125 | rc = PTR_ERR(data); |
3126 | goto out_unlock; | |
b94d5230 DW |
3127 | } |
3128 | ||
20985164 VV |
3129 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
3130 | if (rc) | |
3131 | goto out_unlock; | |
3132 | ||
81ed4e36 DW |
3133 | rc = nfit_mem_init(acpi_desc); |
3134 | if (rc) | |
20985164 | 3135 | goto out_unlock; |
62232e45 | 3136 | |
1f7df6f8 DW |
3137 | rc = acpi_nfit_register_dimms(acpi_desc); |
3138 | if (rc) | |
20985164 VV |
3139 | goto out_unlock; |
3140 | ||
3141 | rc = acpi_nfit_register_regions(acpi_desc); | |
1f7df6f8 | 3142 | |
20985164 VV |
3143 | out_unlock: |
3144 | mutex_unlock(&acpi_desc->init_mutex); | |
3145 | return rc; | |
b94d5230 | 3146 | } |
6bc75619 | 3147 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
b94d5230 | 3148 | |
7ae0fa43 DW |
3149 | static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) |
3150 | { | |
8a7f02f6 | 3151 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
7ae0fa43 | 3152 | struct device *dev = acpi_desc->dev; |
7ae0fa43 | 3153 | |
bc6ba808 | 3154 | /* Bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ |
1550a17a DW |
3155 | device_lock(dev); |
3156 | device_unlock(dev); | |
7ae0fa43 | 3157 | |
bc6ba808 | 3158 | /* Bounce the init_mutex to complete initial registration */ |
9ccaed4b | 3159 | mutex_lock(&acpi_desc->init_mutex); |
fbabd829 | 3160 | mutex_unlock(&acpi_desc->init_mutex); |
e471486c | 3161 | |
bc6ba808 | 3162 | return 0; |
7ae0fa43 DW |
3163 | } |
3164 | ||
b3ed2ce0 | 3165 | static int __acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
87bf572e DW |
3166 | struct nvdimm *nvdimm, unsigned int cmd) |
3167 | { | |
8a7f02f6 | 3168 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
87bf572e DW |
3169 | |
3170 | if (nvdimm) | |
3171 | return 0; | |
3172 | if (cmd != ND_CMD_ARS_START) | |
3173 | return 0; | |
3174 | ||
3175 | /* | |
3176 | * The kernel and userspace may race to initiate a scrub, but | |
3177 | * the scrub thread is prepared to lose that initial race. It | |
59486121 DW |
3178 | * just needs guarantees that any ARS it initiates are not |
3179 | * interrupted by any intervening start requests from userspace. | |
87bf572e | 3180 | */ |
2121db09 DW |
3181 | if (work_busy(&acpi_desc->dwork.work)) |
3182 | return -EBUSY; | |
87bf572e | 3183 | |
2121db09 | 3184 | return 0; |
87bf572e DW |
3185 | } |
3186 | ||
6450ddbd DW |
3187 | /* |
3188 | * Prevent security and firmware activate commands from being issued via | |
3189 | * ioctl. | |
3190 | */ | |
b3ed2ce0 DJ |
3191 | static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
3192 | struct nvdimm *nvdimm, unsigned int cmd, void *buf) | |
3193 | { | |
3194 | struct nd_cmd_pkg *call_pkg = buf; | |
3195 | unsigned int func; | |
3196 | ||
3197 | if (nvdimm && cmd == ND_CMD_CALL && | |
3198 | call_pkg->nd_family == NVDIMM_FAMILY_INTEL) { | |
3199 | func = call_pkg->nd_command; | |
01091c49 | 3200 | if (func > NVDIMM_CMD_MAX || |
6450ddbd | 3201 | (1 << func) & NVDIMM_INTEL_DENY_CMDMASK) |
b3ed2ce0 DJ |
3202 | return -EOPNOTSUPP; |
3203 | } | |
3204 | ||
6450ddbd DW |
3205 | /* block all non-nfit bus commands */ |
3206 | if (!nvdimm && cmd == ND_CMD_CALL && | |
3207 | call_pkg->nd_family != NVDIMM_BUS_FAMILY_NFIT) | |
3208 | return -EOPNOTSUPP; | |
3209 | ||
b3ed2ce0 DJ |
3210 | return __acpi_nfit_clear_to_send(nd_desc, nvdimm, cmd); |
3211 | } | |
3212 | ||
d3abaf43 DW |
3213 | int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, |
3214 | enum nfit_ars_state req_type) | |
37b137ff VV |
3215 | { |
3216 | struct device *dev = acpi_desc->dev; | |
bc6ba808 | 3217 | int scheduled = 0, busy = 0; |
37b137ff VV |
3218 | struct nfit_spa *nfit_spa; |
3219 | ||
fbabd829 | 3220 | mutex_lock(&acpi_desc->init_mutex); |
e34b8252 | 3221 | if (test_bit(ARS_CANCEL, &acpi_desc->scrub_flags)) { |
fbabd829 | 3222 | mutex_unlock(&acpi_desc->init_mutex); |
37b137ff | 3223 | return 0; |
fbabd829 | 3224 | } |
37b137ff | 3225 | |
37b137ff | 3226 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
bc6ba808 | 3227 | int type = nfit_spa_type(nfit_spa->spa); |
37b137ff | 3228 | |
bc6ba808 DW |
3229 | if (type != NFIT_SPA_PM && type != NFIT_SPA_VOLATILE) |
3230 | continue; | |
3231 | if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) | |
37b137ff VV |
3232 | continue; |
3233 | ||
d3abaf43 | 3234 | if (test_and_set_bit(req_type, &nfit_spa->ars_state)) |
bc6ba808 | 3235 | busy++; |
d3abaf43 | 3236 | else |
bc6ba808 | 3237 | scheduled++; |
bc6ba808 DW |
3238 | } |
3239 | if (scheduled) { | |
33cc2c96 | 3240 | sched_ars(acpi_desc); |
bc6ba808 | 3241 | dev_dbg(dev, "ars_scan triggered\n"); |
37b137ff | 3242 | } |
37b137ff VV |
3243 | mutex_unlock(&acpi_desc->init_mutex); |
3244 | ||
bc6ba808 DW |
3245 | if (scheduled) |
3246 | return 0; | |
3247 | if (busy) | |
3248 | return -EBUSY; | |
3249 | return -ENOTTY; | |
37b137ff VV |
3250 | } |
3251 | ||
a61fe6f7 | 3252 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
b94d5230 DW |
3253 | { |
3254 | struct nvdimm_bus_descriptor *nd_desc; | |
b94d5230 DW |
3255 | |
3256 | dev_set_drvdata(dev, acpi_desc); | |
3257 | acpi_desc->dev = dev; | |
b94d5230 DW |
3258 | nd_desc = &acpi_desc->nd_desc; |
3259 | nd_desc->provider_name = "ACPI.NFIT"; | |
bc9775d8 | 3260 | nd_desc->module = THIS_MODULE; |
b94d5230 | 3261 | nd_desc->ndctl = acpi_nfit_ctl; |
7ae0fa43 | 3262 | nd_desc->flush_probe = acpi_nfit_flush_probe; |
87bf572e | 3263 | nd_desc->clear_to_send = acpi_nfit_clear_to_send; |
45def22c | 3264 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
b94d5230 | 3265 | |
20985164 VV |
3266 | INIT_LIST_HEAD(&acpi_desc->spas); |
3267 | INIT_LIST_HEAD(&acpi_desc->dcrs); | |
3268 | INIT_LIST_HEAD(&acpi_desc->bdws); | |
3269 | INIT_LIST_HEAD(&acpi_desc->idts); | |
3270 | INIT_LIST_HEAD(&acpi_desc->flushes); | |
3271 | INIT_LIST_HEAD(&acpi_desc->memdevs); | |
3272 | INIT_LIST_HEAD(&acpi_desc->dimms); | |
6839a6d9 | 3273 | INIT_LIST_HEAD(&acpi_desc->list); |
20985164 | 3274 | mutex_init(&acpi_desc->init_mutex); |
bc6ba808 DW |
3275 | acpi_desc->scrub_tmo = 1; |
3276 | INIT_DELAYED_WORK(&acpi_desc->dwork, acpi_nfit_scrub); | |
20985164 | 3277 | } |
a61fe6f7 | 3278 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
20985164 | 3279 | |
3c87f372 DW |
3280 | static void acpi_nfit_put_table(void *table) |
3281 | { | |
3282 | acpi_put_table(table); | |
3283 | } | |
3284 | ||
dcca12ab MW |
3285 | static void acpi_nfit_notify(acpi_handle handle, u32 event, void *data) |
3286 | { | |
3287 | struct acpi_device *adev = data; | |
3288 | ||
3289 | device_lock(&adev->dev); | |
3290 | __acpi_nfit_notify(&adev->dev, handle, event); | |
3291 | device_unlock(&adev->dev); | |
3292 | } | |
3293 | ||
3294 | static void acpi_nfit_remove_notify_handler(void *data) | |
3295 | { | |
3296 | struct acpi_device *adev = data; | |
3297 | ||
3298 | acpi_dev_remove_notify_handler(adev, ACPI_DEVICE_NOTIFY, | |
3299 | acpi_nfit_notify); | |
3300 | } | |
3301 | ||
fbabd829 DW |
3302 | void acpi_nfit_shutdown(void *data) |
3303 | { | |
3304 | struct acpi_nfit_desc *acpi_desc = data; | |
3305 | struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); | |
3306 | ||
3307 | /* | |
3308 | * Destruct under acpi_desc_lock so that nfit_handle_mce does not | |
3309 | * race teardown | |
3310 | */ | |
3311 | mutex_lock(&acpi_desc_lock); | |
3312 | list_del(&acpi_desc->list); | |
3313 | mutex_unlock(&acpi_desc_lock); | |
3314 | ||
3315 | mutex_lock(&acpi_desc->init_mutex); | |
e34b8252 | 3316 | set_bit(ARS_CANCEL, &acpi_desc->scrub_flags); |
fbabd829 | 3317 | mutex_unlock(&acpi_desc->init_mutex); |
fb6df436 | 3318 | cancel_delayed_work_sync(&acpi_desc->dwork); |
fbabd829 DW |
3319 | |
3320 | /* | |
3321 | * Bounce the nvdimm bus lock to make sure any in-flight | |
3322 | * acpi_nfit_ars_rescan() submissions have had a chance to | |
3323 | * either submit or see ->cancel set. | |
3324 | */ | |
1550a17a DW |
3325 | device_lock(bus_dev); |
3326 | device_unlock(bus_dev); | |
fbabd829 DW |
3327 | |
3328 | flush_workqueue(nfit_wq); | |
3329 | } | |
3330 | EXPORT_SYMBOL_GPL(acpi_nfit_shutdown); | |
3331 | ||
20985164 VV |
3332 | static int acpi_nfit_add(struct acpi_device *adev) |
3333 | { | |
3334 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; | |
3335 | struct acpi_nfit_desc *acpi_desc; | |
3336 | struct device *dev = &adev->dev; | |
3337 | struct acpi_table_header *tbl; | |
3338 | acpi_status status = AE_OK; | |
3339 | acpi_size sz; | |
31932041 | 3340 | int rc = 0; |
20985164 | 3341 | |
9b311b73 XC |
3342 | rc = acpi_dev_install_notify_handler(adev, ACPI_DEVICE_NOTIFY, |
3343 | acpi_nfit_notify); | |
3344 | if (rc) | |
3345 | return rc; | |
3346 | ||
3347 | rc = devm_add_action_or_reset(dev, acpi_nfit_remove_notify_handler, | |
3348 | adev); | |
3349 | if (rc) | |
3350 | return rc; | |
3351 | ||
6b11d1d6 | 3352 | status = acpi_get_table(ACPI_SIG_NFIT, 0, &tbl); |
20985164 | 3353 | if (ACPI_FAILURE(status)) { |
9f619d47 OH |
3354 | /* The NVDIMM root device allows OS to trigger enumeration of |
3355 | * NVDIMMs through NFIT at boot time and re-enumeration at | |
3356 | * root level via the _FIT method during runtime. | |
3357 | * This is ok to return 0 here, we could have an nvdimm | |
3358 | * hotplugged later and evaluate _FIT method which returns | |
3359 | * data in the format of a series of NFIT Structures. | |
3360 | */ | |
20985164 VV |
3361 | dev_dbg(dev, "failed to find NFIT at startup\n"); |
3362 | return 0; | |
3363 | } | |
3c87f372 DW |
3364 | |
3365 | rc = devm_add_action_or_reset(dev, acpi_nfit_put_table, tbl); | |
3366 | if (rc) | |
3367 | return rc; | |
6b11d1d6 | 3368 | sz = tbl->length; |
20985164 | 3369 | |
a61fe6f7 DW |
3370 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
3371 | if (!acpi_desc) | |
3372 | return -ENOMEM; | |
3373 | acpi_nfit_desc_init(acpi_desc, &adev->dev); | |
20985164 | 3374 | |
e7a11b44 | 3375 | /* Save the acpi header for exporting the revision via sysfs */ |
6b577c9d | 3376 | acpi_desc->acpi_header = *tbl; |
20985164 VV |
3377 | |
3378 | /* Evaluate _FIT and override with that if present */ | |
3379 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); | |
3380 | if (ACPI_SUCCESS(status) && buf.length > 0) { | |
e7a11b44 DW |
3381 | union acpi_object *obj = buf.pointer; |
3382 | ||
3383 | if (obj->type == ACPI_TYPE_BUFFER) | |
3384 | rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer, | |
3385 | obj->buffer.length); | |
3386 | else | |
b814735f JT |
3387 | dev_dbg(dev, "invalid type %d, ignoring _FIT\n", |
3388 | (int) obj->type); | |
31932041 DW |
3389 | kfree(buf.pointer); |
3390 | } else | |
e7a11b44 DW |
3391 | /* skip over the lead-in header table */ |
3392 | rc = acpi_nfit_init(acpi_desc, (void *) tbl | |
3393 | + sizeof(struct acpi_table_nfit), | |
3394 | sz - sizeof(struct acpi_table_nfit)); | |
fbabd829 DW |
3395 | |
3396 | if (rc) | |
3397 | return rc; | |
dcca12ab | 3398 | |
9b311b73 | 3399 | return devm_add_action_or_reset(dev, acpi_nfit_shutdown, acpi_desc); |
b94d5230 DW |
3400 | } |
3401 | ||
56b47fe6 | 3402 | static void acpi_nfit_update_notify(struct device *dev, acpi_handle handle) |
20985164 | 3403 | { |
c14a868a | 3404 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); |
20985164 | 3405 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
e7a11b44 | 3406 | union acpi_object *obj; |
20985164 VV |
3407 | acpi_status status; |
3408 | int ret; | |
3409 | ||
20985164 VV |
3410 | if (!dev->driver) { |
3411 | /* dev->driver may be null if we're being removed */ | |
b814735f | 3412 | dev_dbg(dev, "no driver found for dev\n"); |
c14a868a | 3413 | return; |
20985164 VV |
3414 | } |
3415 | ||
3416 | if (!acpi_desc) { | |
a61fe6f7 DW |
3417 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
3418 | if (!acpi_desc) | |
c14a868a DW |
3419 | return; |
3420 | acpi_nfit_desc_init(acpi_desc, dev); | |
7ae0fa43 DW |
3421 | } else { |
3422 | /* | |
3423 | * Finish previous registration before considering new | |
3424 | * regions. | |
3425 | */ | |
3426 | flush_workqueue(nfit_wq); | |
20985164 VV |
3427 | } |
3428 | ||
3429 | /* Evaluate _FIT */ | |
c14a868a | 3430 | status = acpi_evaluate_object(handle, "_FIT", NULL, &buf); |
20985164 VV |
3431 | if (ACPI_FAILURE(status)) { |
3432 | dev_err(dev, "failed to evaluate _FIT\n"); | |
c14a868a | 3433 | return; |
20985164 VV |
3434 | } |
3435 | ||
6b577c9d LK |
3436 | obj = buf.pointer; |
3437 | if (obj->type == ACPI_TYPE_BUFFER) { | |
e7a11b44 DW |
3438 | ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
3439 | obj->buffer.length); | |
31932041 | 3440 | if (ret) |
6b577c9d | 3441 | dev_err(dev, "failed to merge updated NFIT\n"); |
31932041 | 3442 | } else |
6b577c9d | 3443 | dev_err(dev, "Invalid _FIT\n"); |
20985164 | 3444 | kfree(buf.pointer); |
c14a868a | 3445 | } |
56b47fe6 TK |
3446 | |
3447 | static void acpi_nfit_uc_error_notify(struct device *dev, acpi_handle handle) | |
3448 | { | |
3449 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); | |
3450 | ||
d3abaf43 DW |
3451 | if (acpi_desc->scrub_mode == HW_ERROR_SCRUB_ON) |
3452 | acpi_nfit_ars_rescan(acpi_desc, ARS_REQ_LONG); | |
3453 | else | |
3454 | acpi_nfit_ars_rescan(acpi_desc, ARS_REQ_SHORT); | |
56b47fe6 TK |
3455 | } |
3456 | ||
3457 | void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event) | |
3458 | { | |
b814735f | 3459 | dev_dbg(dev, "event: 0x%x\n", event); |
56b47fe6 TK |
3460 | |
3461 | switch (event) { | |
3462 | case NFIT_NOTIFY_UPDATE: | |
3463 | return acpi_nfit_update_notify(dev, handle); | |
3464 | case NFIT_NOTIFY_UC_MEMORY_ERROR: | |
3465 | return acpi_nfit_uc_error_notify(dev, handle); | |
3466 | default: | |
3467 | return; | |
3468 | } | |
3469 | } | |
c14a868a | 3470 | EXPORT_SYMBOL_GPL(__acpi_nfit_notify); |
20985164 | 3471 | |
b94d5230 DW |
3472 | static const struct acpi_device_id acpi_nfit_ids[] = { |
3473 | { "ACPI0012", 0 }, | |
3474 | { "", 0 }, | |
3475 | }; | |
3476 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); | |
3477 | ||
3478 | static struct acpi_driver acpi_nfit_driver = { | |
3479 | .name = KBUILD_MODNAME, | |
3480 | .ids = acpi_nfit_ids, | |
3481 | .ops = { | |
3482 | .add = acpi_nfit_add, | |
b94d5230 DW |
3483 | }, |
3484 | }; | |
3485 | ||
3486 | static __init int nfit_init(void) | |
3487 | { | |
7e700d2c PB |
3488 | int ret; |
3489 | ||
b94d5230 | 3490 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); |
cf16b05c | 3491 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 64); |
b94d5230 | 3492 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); |
2a5ab998 | 3493 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 16); |
74522fea | 3494 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 8); |
b94d5230 DW |
3495 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); |
3496 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); | |
06e8ccda | 3497 | BUILD_BUG_ON(sizeof(struct acpi_nfit_capabilities) != 16); |
b94d5230 | 3498 | |
41c8bdb3 AS |
3499 | guid_parse(UUID_VOLATILE_MEMORY, &nfit_uuid[NFIT_SPA_VOLATILE]); |
3500 | guid_parse(UUID_PERSISTENT_MEMORY, &nfit_uuid[NFIT_SPA_PM]); | |
3501 | guid_parse(UUID_CONTROL_REGION, &nfit_uuid[NFIT_SPA_DCR]); | |
3502 | guid_parse(UUID_DATA_REGION, &nfit_uuid[NFIT_SPA_BDW]); | |
3503 | guid_parse(UUID_VOLATILE_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_VDISK]); | |
3504 | guid_parse(UUID_VOLATILE_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_VCD]); | |
3505 | guid_parse(UUID_PERSISTENT_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_PDISK]); | |
3506 | guid_parse(UUID_PERSISTENT_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_PCD]); | |
3507 | guid_parse(UUID_NFIT_BUS, &nfit_uuid[NFIT_DEV_BUS]); | |
3508 | guid_parse(UUID_NFIT_DIMM, &nfit_uuid[NFIT_DEV_DIMM]); | |
3509 | guid_parse(UUID_NFIT_DIMM_N_HPE1, &nfit_uuid[NFIT_DEV_DIMM_N_HPE1]); | |
3510 | guid_parse(UUID_NFIT_DIMM_N_HPE2, &nfit_uuid[NFIT_DEV_DIMM_N_HPE2]); | |
3511 | guid_parse(UUID_NFIT_DIMM_N_MSFT, &nfit_uuid[NFIT_DEV_DIMM_N_MSFT]); | |
1194c413 | 3512 | guid_parse(UUID_NFIT_DIMM_N_HYPERV, &nfit_uuid[NFIT_DEV_DIMM_N_HYPERV]); |
6450ddbd | 3513 | guid_parse(UUID_INTEL_BUS, &nfit_uuid[NFIT_BUS_INTEL]); |
b94d5230 | 3514 | |
7ae0fa43 DW |
3515 | nfit_wq = create_singlethread_workqueue("nfit"); |
3516 | if (!nfit_wq) | |
3517 | return -ENOMEM; | |
3518 | ||
6839a6d9 | 3519 | nfit_mce_register(); |
7e700d2c PB |
3520 | ret = acpi_bus_register_driver(&acpi_nfit_driver); |
3521 | if (ret) { | |
3522 | nfit_mce_unregister(); | |
3523 | destroy_workqueue(nfit_wq); | |
3524 | } | |
3525 | ||
3526 | return ret; | |
6839a6d9 | 3527 | |
b94d5230 DW |
3528 | } |
3529 | ||
3530 | static __exit void nfit_exit(void) | |
3531 | { | |
6839a6d9 | 3532 | nfit_mce_unregister(); |
b94d5230 | 3533 | acpi_bus_unregister_driver(&acpi_nfit_driver); |
7ae0fa43 | 3534 | destroy_workqueue(nfit_wq); |
6839a6d9 | 3535 | WARN_ON(!list_empty(&acpi_descs)); |
b94d5230 DW |
3536 | } |
3537 | ||
3538 | module_init(nfit_init); | |
3539 | module_exit(nfit_exit); | |
3540 | MODULE_LICENSE("GPL v2"); | |
3541 | MODULE_AUTHOR("Intel Corporation"); |