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669a5db4 JG |
1 | /* |
2 | * pata_cypress.c - Cypress PATA for new ATA layer | |
3 | * (C) 2006 Red Hat Inc | |
4 | * Alan Cox <alan@redhat.com> | |
5 | * | |
6 | * Based heavily on | |
7 | * linux/drivers/ide/pci/cy82c693.c Version 0.40 Sep. 10, 2002 | |
8 | * | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/module.h> | |
13 | #include <linux/pci.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/blkdev.h> | |
16 | #include <linux/delay.h> | |
17 | #include <scsi/scsi_host.h> | |
18 | #include <linux/libata.h> | |
19 | ||
20 | #define DRV_NAME "pata_cypress" | |
21 | #define DRV_VERSION "0.1.2" | |
22 | ||
23 | /* here are the offset definitions for the registers */ | |
24 | ||
25 | enum { | |
26 | CY82_IDE_CMDREG = 0x04, | |
27 | CY82_IDE_ADDRSETUP = 0x48, | |
28 | CY82_IDE_MASTER_IOR = 0x4C, | |
29 | CY82_IDE_MASTER_IOW = 0x4D, | |
30 | CY82_IDE_SLAVE_IOR = 0x4E, | |
31 | CY82_IDE_SLAVE_IOW = 0x4F, | |
32 | CY82_IDE_MASTER_8BIT = 0x50, | |
33 | CY82_IDE_SLAVE_8BIT = 0x51, | |
34 | ||
35 | CY82_INDEX_PORT = 0x22, | |
36 | CY82_DATA_PORT = 0x23, | |
37 | ||
38 | CY82_INDEX_CTRLREG1 = 0x01, | |
39 | CY82_INDEX_CHANNEL0 = 0x30, | |
40 | CY82_INDEX_CHANNEL1 = 0x31, | |
41 | CY82_INDEX_TIMEOUT = 0x32 | |
42 | }; | |
43 | ||
44 | static int cy82c693_pre_reset(struct ata_port *ap) | |
45 | { | |
46 | ap->cbl = ATA_CBL_PATA40; | |
47 | return ata_std_prereset(ap); | |
48 | } | |
49 | ||
50 | static void cy82c693_error_handler(struct ata_port *ap) | |
51 | { | |
52 | ata_bmdma_drive_eh(ap, cy82c693_pre_reset, ata_std_softreset, NULL, ata_std_postreset); | |
53 | } | |
54 | ||
55 | /** | |
56 | * cy82c693_set_piomode - set initial PIO mode data | |
57 | * @ap: ATA interface | |
58 | * @adev: ATA device | |
59 | * | |
60 | * Called to do the PIO mode setup. | |
61 | */ | |
62 | ||
63 | static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev) | |
64 | { | |
65 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
66 | struct ata_timing t; | |
67 | const unsigned long T = 1000000 / 33; | |
68 | short time_16, time_8; | |
69 | u32 addr; | |
70 | ||
71 | if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) { | |
72 | printk(KERN_ERR DRV_NAME ": mome computation failed.\n"); | |
73 | return; | |
74 | } | |
75 | ||
76 | time_16 = FIT(t.recover, 0, 15) | (FIT(t.active, 0, 15) << 4); | |
77 | time_8 = FIT(t.act8b, 0, 15) | (FIT(t.rec8b, 0, 15) << 4); | |
78 | ||
79 | if (adev->devno == 0) { | |
80 | pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); | |
81 | ||
82 | addr &= ~0x0F; /* Mask bits */ | |
83 | addr |= FIT(t.setup, 0, 15); | |
84 | ||
85 | pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); | |
86 | pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16); | |
87 | pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16); | |
88 | pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8); | |
89 | } else { | |
90 | pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); | |
91 | ||
92 | addr &= ~0xF0; /* Mask bits */ | |
93 | addr |= (FIT(t.setup, 0, 15) << 4); | |
94 | ||
95 | pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); | |
96 | pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16); | |
97 | pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOW, time_16); | |
98 | pci_write_config_byte(pdev, CY82_IDE_SLAVE_8BIT, time_8); | |
99 | } | |
100 | } | |
101 | ||
102 | /** | |
103 | * cy82c693_set_dmamode - set initial DMA mode data | |
104 | * @ap: ATA interface | |
105 | * @adev: ATA device | |
106 | * | |
107 | * Called to do the DMA mode setup. | |
108 | */ | |
109 | ||
110 | static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |
111 | { | |
112 | int reg = CY82_INDEX_CHANNEL0 + ap->port_no; | |
113 | ||
114 | /* Be afraid, be very afraid. Magic registers in low I/O space */ | |
115 | outb(reg, 0x22); | |
116 | outb(adev->dma_mode - XFER_MW_DMA_0, 0x23); | |
117 | ||
118 | /* 0x50 gives the best behaviour on the Alpha's using this chip */ | |
119 | outb(CY82_INDEX_TIMEOUT, 0x22); | |
120 | outb(0x50, 0x23); | |
121 | } | |
122 | ||
123 | static struct scsi_host_template cy82c693_sht = { | |
124 | .module = THIS_MODULE, | |
125 | .name = DRV_NAME, | |
126 | .ioctl = ata_scsi_ioctl, | |
127 | .queuecommand = ata_scsi_queuecmd, | |
128 | .can_queue = ATA_DEF_QUEUE, | |
129 | .this_id = ATA_SHT_THIS_ID, | |
130 | .sg_tablesize = LIBATA_MAX_PRD, | |
131 | .max_sectors = ATA_MAX_SECTORS, | |
132 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, | |
133 | .emulated = ATA_SHT_EMULATED, | |
134 | .use_clustering = ATA_SHT_USE_CLUSTERING, | |
135 | .proc_name = DRV_NAME, | |
136 | .dma_boundary = ATA_DMA_BOUNDARY, | |
137 | .slave_configure = ata_scsi_slave_config, | |
138 | .bios_param = ata_std_bios_param, | |
139 | }; | |
140 | ||
141 | static struct ata_port_operations cy82c693_port_ops = { | |
142 | .port_disable = ata_port_disable, | |
143 | .set_piomode = cy82c693_set_piomode, | |
144 | .set_dmamode = cy82c693_set_dmamode, | |
145 | .mode_filter = ata_pci_default_filter, | |
146 | ||
147 | .tf_load = ata_tf_load, | |
148 | .tf_read = ata_tf_read, | |
149 | .check_status = ata_check_status, | |
150 | .exec_command = ata_exec_command, | |
151 | .dev_select = ata_std_dev_select, | |
152 | ||
153 | .freeze = ata_bmdma_freeze, | |
154 | .thaw = ata_bmdma_thaw, | |
155 | .error_handler = cy82c693_error_handler, | |
156 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
157 | ||
158 | .bmdma_setup = ata_bmdma_setup, | |
159 | .bmdma_start = ata_bmdma_start, | |
160 | .bmdma_stop = ata_bmdma_stop, | |
161 | .bmdma_status = ata_bmdma_status, | |
162 | ||
163 | .qc_prep = ata_qc_prep, | |
164 | .qc_issue = ata_qc_issue_prot, | |
165 | .eng_timeout = ata_eng_timeout, | |
166 | .data_xfer = ata_pio_data_xfer, | |
167 | ||
168 | .irq_handler = ata_interrupt, | |
169 | .irq_clear = ata_bmdma_irq_clear, | |
170 | ||
171 | .port_start = ata_port_start, | |
172 | .port_stop = ata_port_stop, | |
173 | .host_stop = ata_host_stop | |
174 | }; | |
175 | ||
176 | static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |
177 | { | |
178 | static struct ata_port_info info = { | |
179 | .sht = &cy82c693_sht, | |
180 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, | |
181 | .pio_mask = 0x1f, | |
182 | .mwdma_mask = 0x07, | |
183 | .port_ops = &cy82c693_port_ops | |
184 | }; | |
185 | static struct ata_port_info *port_info[1] = { &info }; | |
186 | ||
187 | /* Devfn 1 is the ATA primary. The secondary is magic and on devfn2. For the | |
188 | moment we don't handle the secondary. FIXME */ | |
189 | ||
190 | if (PCI_FUNC(pdev->devfn) != 1) | |
191 | return -ENODEV; | |
192 | ||
193 | return ata_pci_init_one(pdev, port_info, 1); | |
194 | } | |
195 | ||
196 | static struct pci_device_id cy82c693[] = { | |
197 | { PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
198 | { 0, }, | |
199 | }; | |
200 | ||
201 | static struct pci_driver cy82c693_pci_driver = { | |
202 | .name = DRV_NAME, | |
203 | .id_table = cy82c693, | |
204 | .probe = cy82c693_init_one, | |
205 | .remove = ata_pci_remove_one | |
206 | }; | |
207 | ||
208 | static int __init cy82c693_init(void) | |
209 | { | |
210 | return pci_register_driver(&cy82c693_pci_driver); | |
211 | } | |
212 | ||
213 | ||
214 | static void __exit cy82c693_exit(void) | |
215 | { | |
216 | pci_unregister_driver(&cy82c693_pci_driver); | |
217 | } | |
218 | ||
219 | ||
220 | MODULE_AUTHOR("Alan Cox"); | |
221 | MODULE_DESCRIPTION("low-level driver for the CY82C693 PATA controller"); | |
222 | MODULE_LICENSE("GPL"); | |
223 | MODULE_DEVICE_TABLE(pci, cy82c693); | |
224 | MODULE_VERSION(DRV_VERSION); | |
225 | ||
226 | module_init(cy82c693_init); | |
227 | module_exit(cy82c693_exit); |