]>
Commit | Line | Data |
---|---|---|
ece92f85 JJ |
1 | /**************************************************************************** |
2 | * | |
9c7e4b06 | 3 | * Video BOOT Graphics Card POST Module |
ece92f85 JJ |
4 | * |
5 | * ======================================================================== | |
4c2e3da8 | 6 | * Copyright (C) 2007 Freescale Semiconductor, Inc. |
ece92f85 JJ |
7 | * Jason Jin <Jason.jin@freescale.com> |
8 | * | |
9 | * Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved. | |
10 | * | |
11 | * This file may be distributed and/or modified under the terms of the | |
12 | * GNU General Public License version 2.0 as published by the Free | |
13 | * Software Foundation and appearing in the file LICENSE.GPL included | |
14 | * in the packaging of this file. | |
15 | * | |
16 | * Licensees holding a valid Commercial License for this product from | |
17 | * SciTech Software, Inc. may use this file in accordance with the | |
18 | * Commercial License Agreement provided with the Software. | |
19 | * | |
20 | * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING | |
21 | * THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR | |
22 | * PURPOSE. | |
23 | * | |
24 | * See http://www.scitechsoft.com/license/ for information about | |
25 | * the licensing options available and how to purchase a Commercial | |
26 | * License Agreement. | |
27 | * | |
28 | * Contact license@scitechsoft.com if any conditions of this licensing | |
29 | * are not clear to you, or you have questions about licensing options. | |
30 | * | |
31 | * ======================================================================== | |
32 | * | |
9c7e4b06 WD |
33 | * Language: ANSI C |
34 | * Environment: Linux Kernel | |
35 | * Developer: Kendall Bennett | |
ece92f85 | 36 | * |
9c7e4b06 WD |
37 | * Description: Module to implement booting PCI/AGP controllers on the |
38 | * bus. We use the x86 real mode emulator to run the BIOS on | |
39 | * graphics controllers to bring the cards up. | |
ece92f85 | 40 | * |
9c7e4b06 WD |
41 | * Note that at present this module does *not* support |
42 | * multiple controllers. | |
ece92f85 | 43 | * |
9c7e4b06 WD |
44 | * The orignal name of this file is warmboot.c. |
45 | * Jason ported this file to u-boot to run the ATI video card | |
46 | * BIOS in u-boot. | |
ece92f85 JJ |
47 | ****************************************************************************/ |
48 | #include <common.h> | |
ece92f85 JJ |
49 | #include "biosemui.h" |
50 | #include <malloc.h> | |
51 | ||
52 | /* Length of the BIOS image */ | |
9c7e4b06 | 53 | #define MAX_BIOSLEN (128 * 1024L) |
ece92f85 JJ |
54 | |
55 | /* Define some useful types and macros */ | |
9c7e4b06 WD |
56 | #define true 1 |
57 | #define false 0 | |
ece92f85 JJ |
58 | |
59 | /* Place to save PCI BAR's that we change and later restore */ | |
60 | static u32 saveROMBaseAddress; | |
61 | static u32 saveBaseAddress10; | |
62 | static u32 saveBaseAddress14; | |
63 | static u32 saveBaseAddress18; | |
64 | static u32 saveBaseAddress20; | |
65 | ||
66 | /**************************************************************************** | |
67 | PARAMETERS: | |
9c7e4b06 | 68 | pcidev - PCI device info for the video card on the bus to boot |
ece92f85 JJ |
69 | VGAInfo - BIOS emulator VGA info structure |
70 | ||
71 | REMARKS: | |
72 | This function executes the BIOS POST code on the controller. We assume that | |
73 | at this stage the controller has its I/O and memory space enabled and | |
74 | that all other controllers are in a disabled state. | |
75 | ****************************************************************************/ | |
76 | static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo * VGAInfo) | |
77 | { | |
78 | RMREGS regs; | |
79 | RMSREGS sregs; | |
80 | ||
81 | /* Determine the value to store in AX for BIOS POST. Per the PCI specs, | |
82 | AH must contain the bus and AL must contain the devfn, encoded as | |
83 | (dev << 3) | fn | |
84 | */ | |
85 | memset(®s, 0, sizeof(regs)); | |
86 | memset(&sregs, 0, sizeof(sregs)); | |
87 | regs.x.ax = ((int)PCI_BUS(pcidev) << 8) | | |
88 | ((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev); | |
89 | ||
90 | /*Setup the X86 emulator for the VGA BIOS*/ | |
91 | BE_setVGA(VGAInfo); | |
92 | ||
93 | /*Execute the BIOS POST code*/ | |
94 | BE_callRealMode(0xC000, 0x0003, ®s, &sregs); | |
95 | ||
96 | /*Cleanup and exit*/ | |
97 | BE_getVGA(VGAInfo); | |
98 | } | |
99 | ||
100 | /**************************************************************************** | |
101 | PARAMETERS: | |
9c7e4b06 WD |
102 | pcidev - PCI device info for the video card on the bus |
103 | bar - Place to return the base address register offset to use | |
ece92f85 JJ |
104 | |
105 | RETURNS: | |
106 | The address to use to map the secondary BIOS (AGP devices) | |
107 | ||
108 | REMARKS: | |
109 | Searches all the PCI base address registers for the device looking for a | |
110 | memory mapping that is large enough to hold our ROM BIOS. We usually end up | |
111 | finding the framebuffer mapping (usually BAR 0x10), and we use this mapping | |
112 | to map the BIOS for the device into. We use a mapping that is already | |
113 | assigned to the device to ensure the memory range will be passed through | |
114 | by any PCI->PCI or AGP->PCI bridge that may be present. | |
115 | ||
116 | NOTE: Usually this function is only used for AGP devices, but it may be | |
117 | used for PCI devices that have already been POST'ed and the BIOS | |
118 | ROM base address has been zero'ed out. | |
119 | ||
120 | NOTE: This function leaves the original memory aperture disabled by leaving | |
121 | it programmed to all 1's. It must be restored to the correct value | |
122 | later. | |
123 | ****************************************************************************/ | |
124 | static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar) | |
125 | { | |
126 | u32 base, size; | |
127 | ||
128 | for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) { | |
129 | pci_read_config_dword(pcidev, *bar, &base); | |
130 | if (!(base & 0x1)) { | |
131 | pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF); | |
132 | pci_read_config_dword(pcidev, *bar, &size); | |
133 | size = ~(size & ~0xFF) + 1; | |
134 | if (size >= MAX_BIOSLEN) | |
135 | return base & ~0xFF; | |
136 | } | |
137 | } | |
138 | return 0; | |
139 | } | |
140 | ||
141 | /**************************************************************************** | |
142 | REMARKS: | |
143 | Some non-x86 Linux kernels map PCI relocateable I/O to values that | |
144 | are above 64K, which will not work with the BIOS image that requires | |
145 | the offset for the I/O ports to be a maximum of 16-bits. Ideally | |
146 | someone should fix the kernel to map the I/O ports for VGA compatible | |
147 | devices to a different location (or just all I/O ports since it is | |
148 | unlikely you can have enough devices in the machine to use up all | |
149 | 64K of the I/O space - a total of more than 256 cards would be | |
150 | necessary). | |
151 | ||
152 | Anyway to fix this we change all I/O mapped base registers and | |
153 | chop off the top bits. | |
154 | ****************************************************************************/ | |
155 | static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base) | |
156 | { | |
157 | if ((*base & 0x1) && (*base > 0xFFFE)) { | |
158 | *base &= 0xFFFF; | |
159 | pci_write_config_dword(pcidev, reg, *base); | |
160 | ||
161 | } | |
162 | } | |
163 | ||
164 | /**************************************************************************** | |
165 | PARAMETERS: | |
9c7e4b06 | 166 | pcidev - PCI device info for the video card on the bus |
ece92f85 JJ |
167 | |
168 | RETURNS: | |
169 | Pointers to the mapped BIOS image | |
170 | ||
171 | REMARKS: | |
172 | Maps a pointer to the BIOS image on the graphics card on the PCI bus. | |
173 | ****************************************************************************/ | |
174 | void *PCI_mapBIOSImage(pci_dev_t pcidev) | |
175 | { | |
f6a7a2e8 | 176 | u32 BIOSImageBus; |
ece92f85 JJ |
177 | int BIOSImageBAR; |
178 | u8 *BIOSImage; | |
179 | ||
180 | /*Save PCI BAR registers that might get changed*/ | |
181 | pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress); | |
182 | pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10); | |
183 | pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); | |
184 | pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18); | |
185 | pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20); | |
186 | ||
187 | /*Fix up I/O base registers to less than 64K */ | |
188 | if(saveBaseAddress14 != 0) | |
189 | PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); | |
190 | else | |
191 | PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20); | |
192 | ||
193 | /* Some cards have problems that stop us from being able to read the | |
194 | BIOS image from the ROM BAR. To fix this we have to do some chipset | |
195 | specific programming for different cards to solve this problem. | |
9c7e4b06 | 196 | */ |
ece92f85 | 197 | |
f6a7a2e8 ES |
198 | BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR); |
199 | if (BIOSImageBus == 0) { | |
ece92f85 JJ |
200 | printf("Find bios addr error\n"); |
201 | return NULL; | |
202 | } | |
203 | ||
f6a7a2e8 ES |
204 | BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus, |
205 | PCI_REGION_MEM, 0, MAP_NOCACHE); | |
ece92f85 JJ |
206 | |
207 | /*Change the PCI BAR registers to map it onto the bus.*/ | |
208 | pci_write_config_dword(pcidev, BIOSImageBAR, 0); | |
f6a7a2e8 | 209 | pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1); |
ece92f85 JJ |
210 | |
211 | udelay(1); | |
212 | ||
213 | /*Check that the BIOS image is valid. If not fail, or return the | |
214 | compiled in BIOS image if that option was enabled | |
215 | */ | |
216 | if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) { | |
217 | return NULL; | |
218 | } | |
219 | ||
220 | return BIOSImage; | |
221 | } | |
222 | ||
223 | /**************************************************************************** | |
224 | PARAMETERS: | |
9c7e4b06 | 225 | pcidev - PCI device info for the video card on the bus |
ece92f85 JJ |
226 | |
227 | REMARKS: | |
228 | Unmaps the BIOS image for the device and restores framebuffer mappings | |
229 | ****************************************************************************/ | |
230 | void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage) | |
231 | { | |
232 | pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress); | |
233 | pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10); | |
234 | pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14); | |
235 | pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18); | |
236 | pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20); | |
237 | } | |
238 | ||
239 | /**************************************************************************** | |
240 | PARAMETERS: | |
9c7e4b06 | 241 | pcidev - PCI device info for the video card on the bus to boot |
ece92f85 JJ |
242 | VGAInfo - BIOS emulator VGA info structure |
243 | ||
244 | RETURNS: | |
245 | True if successfully initialised, false if not. | |
246 | ||
247 | REMARKS: | |
248 | Loads and POST's the display controllers BIOS, directly from the BIOS | |
249 | image we can extract over the PCI bus. | |
250 | ****************************************************************************/ | |
251 | static int PCI_postController(pci_dev_t pcidev, BE_VGAInfo * VGAInfo) | |
252 | { | |
253 | u32 BIOSImageLen; | |
254 | uchar *mappedBIOS; | |
255 | uchar *copyOfBIOS; | |
256 | ||
257 | /*Allocate memory to store copy of BIOS from display controller*/ | |
258 | if ((mappedBIOS = PCI_mapBIOSImage(pcidev)) == NULL) { | |
259 | printf("videoboot: Video ROM failed to map!\n"); | |
260 | return false; | |
261 | } | |
262 | ||
263 | BIOSImageLen = mappedBIOS[2] * 512; | |
264 | ||
265 | if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL) { | |
266 | printf("videoboot: Out of memory!\n"); | |
267 | return false; | |
268 | } | |
269 | memcpy(copyOfBIOS, mappedBIOS, BIOSImageLen); | |
270 | ||
271 | PCI_unmapBIOSImage(pcidev, mappedBIOS); | |
272 | ||
273 | /*Save information in VGAInfo structure*/ | |
274 | VGAInfo->function = PCI_FUNC(pcidev); | |
275 | VGAInfo->device = PCI_DEV(pcidev); | |
276 | VGAInfo->bus = PCI_BUS(pcidev); | |
277 | VGAInfo->pcidev = pcidev; | |
278 | VGAInfo->BIOSImage = copyOfBIOS; | |
279 | VGAInfo->BIOSImageLen = BIOSImageLen; | |
280 | ||
281 | /*Now execute the BIOS POST for the device*/ | |
282 | if (copyOfBIOS[0] != 0x55 || copyOfBIOS[1] != 0xAA) { | |
283 | printf("videoboot: Video ROM image is invalid!\n"); | |
284 | return false; | |
285 | } | |
286 | ||
287 | PCI_doBIOSPOST(pcidev, VGAInfo); | |
288 | ||
289 | /*Reset the size of the BIOS image to the final size*/ | |
290 | VGAInfo->BIOSImageLen = copyOfBIOS[2] * 512; | |
291 | return true; | |
292 | } | |
293 | ||
294 | /**************************************************************************** | |
295 | PARAMETERS: | |
9c7e4b06 | 296 | pcidev - PCI device info for the video card on the bus to boot |
ece92f85 | 297 | pVGAInfo - Place to return VGA info structure is requested |
9c7e4b06 | 298 | cleanUp - True to clean up on exit, false to leave emulator active |
ece92f85 JJ |
299 | |
300 | REMARKS: | |
301 | Boots the PCI/AGP video card on the bus using the Video ROM BIOS image | |
302 | and the X86 BIOS emulator module. | |
303 | ****************************************************************************/ | |
304 | int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo ** pVGAInfo, int cleanUp) | |
305 | { | |
306 | BE_VGAInfo *VGAInfo; | |
307 | ||
308 | printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n", | |
309 | PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev)); | |
310 | ||
311 | /*Initialise the x86 BIOS emulator*/ | |
312 | if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) { | |
313 | printf("videoboot: Out of memory!\n"); | |
314 | return false; | |
315 | } | |
316 | memset(VGAInfo, 0, sizeof(*VGAInfo)); | |
317 | BE_init(0, 65536, VGAInfo, 0); | |
318 | ||
319 | /*Post all the display controller BIOS'es*/ | |
9624f6d9 ES |
320 | if (!PCI_postController(pcidev, VGAInfo)) |
321 | return false; | |
ece92f85 JJ |
322 | |
323 | /*Cleanup and exit the emulator if requested. If the BIOS emulator | |
324 | is needed after booting the card, we will not call BE_exit and | |
325 | leave it enabled for further use (ie: VESA driver etc). | |
326 | */ | |
327 | if (cleanUp) { | |
328 | BE_exit(); | |
329 | if (VGAInfo->BIOSImage) | |
330 | free(VGAInfo->BIOSImage); | |
331 | free(VGAInfo); | |
332 | VGAInfo = NULL; | |
333 | } | |
334 | /*Return VGA info pointer if the caller requested it*/ | |
335 | if (pVGAInfo) | |
336 | *pVGAInfo = VGAInfo; | |
337 | return true; | |
338 | } |