[u-boot.git] / drivers / bios_emulator / atibios.c

/****************************************************************************
*
*		     Video BOOT Graphics Card POST Module
*
*  ========================================================================
*   Copyright (C) 2007 Freescale Semiconductor, Inc.
*   Jason Jin <Jason.jin@freescale.com>
*
*   Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
*
*   This file may be distributed and/or modified under the terms of the
*   GNU General Public License version 2.0 as published by the Free
*   Software Foundation and appearing in the file LICENSE.GPL included
*   in the packaging of this file.
*
*   Licensees holding a valid Commercial License for this product from
*   SciTech Software, Inc. may use this file in accordance with the
*   Commercial License Agreement provided with the Software.
*
*   This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
*   THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
*   PURPOSE.
*
*   See http://www.scitechsoft.com/license/ for information about
*   the licensing options available and how to purchase a Commercial
*   License Agreement.
*
*   Contact license@scitechsoft.com if any conditions of this licensing
*   are not clear to you, or you have questions about licensing options.
*
*  ========================================================================
*
* Language:	ANSI C
* Environment:	Linux Kernel
* Developer:	Kendall Bennett
*
* Description:	Module to implement booting PCI/AGP controllers on the
*		bus. We use the x86 real mode emulator to run the BIOS on
*		graphics controllers to bring the cards up.
*
*		Note that at present this module does *not* support
*		multiple controllers.
*
*		The orignal name of this file is warmboot.c.
*		Jason ported this file to u-boot to run the ATI video card
*		BIOS in u-boot.
****************************************************************************/
#include <common.h>
#include <bios_emul.h>
#include <errno.h>
#include <malloc.h>
#include <vbe.h>
#include "biosemui.h"

/* Length of the BIOS image */
#define MAX_BIOSLEN	    (128 * 1024L)

/* Place to save PCI BAR's that we change and later restore */
static u32 saveROMBaseAddress;
static u32 saveBaseAddress10;
static u32 saveBaseAddress14;
static u32 saveBaseAddress18;
static u32 saveBaseAddress20;

/* Addres im memory of VBE region */
const int vbe_offset = 0x2000;

static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info,
			    u32 x86_dword_ptr)
{
	u32 seg_ofs, flat;

	seg_ofs = le32_to_cpu(x86_dword_ptr);
	flat = ((seg_ofs & 0xffff0000) >> 12) | (seg_ofs & 0xffff);
	if (flat >= 0xc0000)
		return vga_info->BIOSImage + flat - 0xc0000;
	else
		return buf + (flat - vbe_offset);
}

static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,
			      int vesa_mode, struct vbe_mode_info *mode_info)
{
	void *buffer = (void *)(M.mem_base + vbe_offset);
	u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
	u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
	struct vesa_mode_info *vm;
	struct vbe_info *info;
	const u16 *modes_bios, *ptr;
	u16 *modes;
	int size;

	debug("VBE: Getting information\n");
	regs->e.eax = VESA_GET_INFO;
	regs->e.esi = buffer_seg;
	regs->e.edi = buffer_adr;
	info = buffer;
	memset(info, '\0', sizeof(*info));
	strcpy(info->signature, "VBE2");
	BE_int86(0x10, regs, regs);
	if (regs->e.eax != 0x4f) {
		debug("VESA_GET_INFO: error %x\n", regs->e.eax);
		return -ENOSYS;
	}
	debug("version %x\n", le16_to_cpu(info->version));
	debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info,
					     info->oem_string_ptr));
	debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info,
						info->vendor_name_ptr));
	debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info,
						 info->product_name_ptr));
	debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info,
					     info->product_rev_ptr));
	modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr);
	debug("Modes: ");
	for (ptr = modes_bios; *ptr != 0xffff; ptr++)
		debug("%x ", le16_to_cpu(*ptr));
	debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4);
	size = (ptr - modes_bios) * sizeof(u16) + 2;
	modes = malloc(size);
	if (!modes)
		return -ENOMEM;
	memcpy(modes, modes_bios, size);

	regs->e.eax = VESA_GET_CUR_MODE;
	BE_int86(0x10, regs, regs);
	if (regs->e.eax != 0x4f) {
		debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax);
		return -ENOSYS;
	}
	debug("Current mode %x\n", regs->e.ebx);

	for (ptr = modes; *ptr != 0xffff; ptr++) {
		int mode = le16_to_cpu(*ptr);
		bool linear_ok;
		int attr;

		break;
		debug("Mode %x: ", mode);
		memset(buffer, '\0', sizeof(struct vbe_mode_info));
		regs->e.eax = VESA_GET_MODE_INFO;
		regs->e.ebx = 0;
		regs->e.ecx = mode;
		regs->e.edx = 0;
		regs->e.esi = buffer_seg;
		regs->e.edi = buffer_adr;
		BE_int86(0x10, regs, regs);
		if (regs->e.eax != 0x4f) {
			debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
			continue;
		}
		memcpy(mode_info->mode_info_block, buffer,
		       sizeof(struct vesa_mode_info));
		mode_info->valid = true;
		vm = &mode_info->vesa;
		attr = le16_to_cpu(vm->mode_attributes);
		linear_ok = attr & 0x80;
		debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n",
		      le16_to_cpu(vm->x_resolution),
		      le16_to_cpu(vm->y_resolution),
		      vm->bits_per_pixel, vm->memory_model,
		      linear_ok ? "OK" : "not available",
		      attr);
		debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n",
		      vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos,
		      vm->red_mask_size, vm->green_mask_size,
		      vm->blue_mask_size);
	}

	return 0;
}

static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,
				 struct vbe_mode_info *mode_info)
{
	void *buffer = (void *)(M.mem_base + vbe_offset);
	u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
	u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
	struct vesa_mode_info *vm;

	debug("VBE: Setting VESA mode %#04x\n", vesa_mode);
	regs->e.eax = VESA_SET_MODE;
	regs->e.ebx = vesa_mode;
	/* request linear framebuffer mode and don't clear display */
	regs->e.ebx |= (1 << 14) | (1 << 15);
	BE_int86(0x10, regs, regs);
	if (regs->e.eax != 0x4f) {
		debug("VESA_SET_MODE: error %x\n", regs->e.eax);
		return -ENOSYS;
	}

	memset(buffer, '\0', sizeof(struct vbe_mode_info));
	debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode);
	regs->e.eax = VESA_GET_MODE_INFO;
	regs->e.ecx = vesa_mode;
	regs->e.esi = buffer_seg;
	regs->e.edi = buffer_adr;
	BE_int86(0x10, regs, regs);
	if (regs->e.eax != 0x4f) {
		debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
		return -ENOSYS;
	}

	memcpy(mode_info->mode_info_block, buffer,
		sizeof(struct vesa_mode_info));
	mode_info->valid = true;
	mode_info->video_mode = vesa_mode;
	vm = &mode_info->vesa;
	vm->x_resolution = le16_to_cpu(vm->x_resolution);
	vm->y_resolution = le16_to_cpu(vm->y_resolution);
	vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline);
	vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr);
	vm->mode_attributes = le16_to_cpu(vm->mode_attributes);
	debug("VBE: Init complete\n");

	return 0;
}

/****************************************************************************
PARAMETERS:
pcidev	- PCI device info for the video card on the bus to boot
vga_info - BIOS emulator VGA info structure

REMARKS:
This function executes the BIOS POST code on the controller. We assume that
at this stage the controller has its I/O and memory space enabled and
that all other controllers are in a disabled state.
****************************************************************************/
static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info,
			   int vesa_mode, struct vbe_mode_info *mode_info)
{
	RMREGS regs;
	RMSREGS sregs;

	/* Determine the value to store in AX for BIOS POST. Per the PCI specs,
	 AH must contain the bus and AL must contain the devfn, encoded as
	 (dev << 3) | fn
	 */
	memset(&regs, 0, sizeof(regs));
	memset(&sregs, 0, sizeof(sregs));
	regs.x.ax = ((int)PCI_BUS(pcidev) << 8) |
	    ((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev);

	/*Setup the X86 emulator for the VGA BIOS*/
	BE_setVGA(vga_info);

	/*Execute the BIOS POST code*/
	BE_callRealMode(0xC000, 0x0003, &regs, &sregs);

	/*Cleanup and exit*/
	BE_getVGA(vga_info);

	/* Useful for debugging */
	if (0)
		atibios_debug_mode(vga_info, &regs, vesa_mode, mode_info);
	if (vesa_mode != -1)
		atibios_set_vesa_mode(&regs, vesa_mode, mode_info);
}

/****************************************************************************
PARAMETERS:
pcidev	- PCI device info for the video card on the bus
bar	- Place to return the base address register offset to use

RETURNS:
The address to use to map the secondary BIOS (AGP devices)

REMARKS:
Searches all the PCI base address registers for the device looking for a
memory mapping that is large enough to hold our ROM BIOS. We usually end up
finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
to map the BIOS for the device into. We use a mapping that is already
assigned to the device to ensure the memory range will be passed through
by any PCI->PCI or AGP->PCI bridge that may be present.

NOTE: Usually this function is only used for AGP devices, but it may be
      used for PCI devices that have already been POST'ed and the BIOS
      ROM base address has been zero'ed out.

NOTE: This function leaves the original memory aperture disabled by leaving
      it programmed to all 1's. It must be restored to the correct value
      later.
****************************************************************************/
static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar)
{
	u32 base, size;

	for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) {
		pci_read_config_dword(pcidev, *bar, &base);
		if (!(base & 0x1)) {
			pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF);
			pci_read_config_dword(pcidev, *bar, &size);
			size = ~(size & ~0xFF) + 1;
			if (size >= MAX_BIOSLEN)
				return base & ~0xFF;
		}
	}
	return 0;
}

/****************************************************************************
REMARKS:
Some non-x86 Linux kernels map PCI relocateable I/O to values that
are above 64K, which will not work with the BIOS image that requires
the offset for the I/O ports to be a maximum of 16-bits. Ideally
someone should fix the kernel to map the I/O ports for VGA compatible
devices to a different location (or just all I/O ports since it is
unlikely you can have enough devices in the machine to use up all
64K of the I/O space - a total of more than 256 cards would be
necessary).

Anyway to fix this we change all I/O mapped base registers and
chop off the top bits.
****************************************************************************/
static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base)
{
	if ((*base & 0x1) && (*base > 0xFFFE)) {
		*base &= 0xFFFF;
		pci_write_config_dword(pcidev, reg, *base);

	}
}

/****************************************************************************
PARAMETERS:
pcidev	- PCI device info for the video card on the bus

RETURNS:
Pointers to the mapped BIOS image

REMARKS:
Maps a pointer to the BIOS image on the graphics card on the PCI bus.
****************************************************************************/
void *PCI_mapBIOSImage(pci_dev_t pcidev)
{
	u32 BIOSImageBus;
	int BIOSImageBAR;
	u8 *BIOSImage;

	/*Save PCI BAR registers that might get changed*/
	pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
	pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
	pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
	pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
	pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);

	/*Fix up I/O base registers to less than 64K */
	if(saveBaseAddress14 != 0)
		PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
	else
		PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);

	/* Some cards have problems that stop us from being able to read the
	 BIOS image from the ROM BAR. To fix this we have to do some chipset
	 specific programming for different cards to solve this problem.
	*/

	BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR);
	if (BIOSImageBus == 0) {
		printf("Find bios addr error\n");
		return NULL;
	}

	BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus,
				    PCI_REGION_MEM, 0, MAP_NOCACHE);

	/*Change the PCI BAR registers to map it onto the bus.*/
	pci_write_config_dword(pcidev, BIOSImageBAR, 0);
	pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);

	udelay(1);

	/*Check that the BIOS image is valid. If not fail, or return the
	 compiled in BIOS image if that option was enabled
	 */
	if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) {
		return NULL;
	}

	return BIOSImage;
}

/****************************************************************************
PARAMETERS:
pcidev	- PCI device info for the video card on the bus

REMARKS:
Unmaps the BIOS image for the device and restores framebuffer mappings
****************************************************************************/
void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage)
{
	pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
	pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
	pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
	pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
	pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
}

/****************************************************************************
PARAMETERS:
pcidev	- PCI device info for the video card on the bus to boot
VGAInfo - BIOS emulator VGA info structure

RETURNS:
true if successfully initialised, false if not.

REMARKS:
Loads and POST's the display controllers BIOS, directly from the BIOS
image we can extract over the PCI bus.
****************************************************************************/
static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
			      BE_VGAInfo *vga_info, int vesa_mode,
			      struct vbe_mode_info *mode_info)
{
	u32 bios_image_len;
	uchar *mapped_bios;
	uchar *copy_of_bios;

	if (bios_rom) {
		copy_of_bios = bios_rom;
		bios_image_len = bios_len;
	} else {
		/*
		 * Allocate memory to store copy of BIOS from display
		 * controller
		 */
		mapped_bios = PCI_mapBIOSImage(pcidev);
		if (mapped_bios == NULL) {
			printf("videoboot: Video ROM failed to map!\n");
			return false;
		}

		bios_image_len = mapped_bios[2] * 512;

		copy_of_bios = malloc(bios_image_len);
		if (copy_of_bios == NULL) {
			printf("videoboot: Out of memory!\n");
			return false;
		}
		memcpy(copy_of_bios, mapped_bios, bios_image_len);
		PCI_unmapBIOSImage(pcidev, mapped_bios);
	}

	/*Save information in vga_info structure*/
	vga_info->function = PCI_FUNC(pcidev);
	vga_info->device = PCI_DEV(pcidev);
	vga_info->bus = PCI_BUS(pcidev);
	vga_info->pcidev = pcidev;
	vga_info->BIOSImage = copy_of_bios;
	vga_info->BIOSImageLen = bios_image_len;

	/*Now execute the BIOS POST for the device*/
	if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) {
		printf("videoboot: Video ROM image is invalid!\n");
		return false;
	}

	PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info);

	/*Reset the size of the BIOS image to the final size*/
	vga_info->BIOSImageLen = copy_of_bios[2] * 512;
	return true;
}

int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **vga_infop)
{
	BE_VGAInfo *VGAInfo;

	printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
	     PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev));

	/*Initialise the x86 BIOS emulator*/
	if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
		printf("videoboot: Out of memory!\n");
		return -ENOMEM;
	}
	memset(VGAInfo, 0, sizeof(*VGAInfo));
	BE_init(0, 65536, VGAInfo, 0);
	*vga_infop = VGAInfo;

	return 0;
}

void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
{
	X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
}

int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
		BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
		struct vbe_mode_info *mode_info)
{
	/*Post all the display controller BIOS'es*/
	if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
				vesa_mode, mode_info))
		return -EINVAL;

	/*
	 * Cleanup and exit the emulator if requested. If the BIOS emulator
	 * is needed after booting the card, we will not call BE_exit and
	 * leave it enabled for further use (ie: VESA driver etc).
	*/
	if (clean_up) {
		BE_exit();
		if (vga_info->BIOSImage &&
		    (u32)(vga_info->BIOSImage) != 0xc0000)
			free(vga_info->BIOSImage);
		free(vga_info);
		vga_info = NULL;
	}

	return 0;
}

/****************************************************************************
PARAMETERS:
pcidev	    - PCI device info for the video card on the bus to boot
pVGAInfo    - Place to return VGA info structure is requested
cleanUp	    - true to clean up on exit, false to leave emulator active

REMARKS:
Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
and the X86 BIOS emulator module.
****************************************************************************/
int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up)
{
	BE_VGAInfo *VGAInfo;
	int ret;

	ret = biosemu_setup(pcidev, &VGAInfo);
	if (ret)
		return false;
	ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL);
	if (ret)
		return false;

	/* Return VGA info pointer if the caller requested it*/
	if (pVGAInfo)
		*pVGAInfo = VGAInfo;

	return true;
}
Commit	Line	Data
ece92f85 JJ	1	/****************************************************************************
ece92f85 JJ	2	*
9c7e4b06	3	* Video BOOT Graphics Card POST Module
ece92f85 JJ	4	*
ece92f85 JJ	5	* ========================================================================
4c2e3da8	6	* Copyright (C) 2007 Freescale Semiconductor, Inc.
ece92f85 JJ	7	* Jason Jin <Jason.jin@freescale.com>
	8	*
	9	* Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
	10	*
	11	* This file may be distributed and/or modified under the terms of the
	12	* GNU General Public License version 2.0 as published by the Free
	13	* Software Foundation and appearing in the file LICENSE.GPL included
	14	* in the packaging of this file.
	15	*
	16	* Licensees holding a valid Commercial License for this product from
	17	* SciTech Software, Inc. may use this file in accordance with the
	18	* Commercial License Agreement provided with the Software.
	19	*
	20	* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
	21	* THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
	22	* PURPOSE.
	23	*
	24	* See http://www.scitechsoft.com/license/ for information about
	25	* the licensing options available and how to purchase a Commercial
	26	* License Agreement.
	27	*
	28	* Contact license@scitechsoft.com if any conditions of this licensing
	29	* are not clear to you, or you have questions about licensing options.
	30	*
	31	* ========================================================================
	32	*
9c7e4b06 WD	33	* Language: ANSI C
	34	* Environment: Linux Kernel
	35	* Developer: Kendall Bennett
ece92f85	36	*
9c7e4b06 WD	37	* Description: Module to implement booting PCI/AGP controllers on the
	38	* bus. We use the x86 real mode emulator to run the BIOS on
	39	* graphics controllers to bring the cards up.
ece92f85	40	*
9c7e4b06 WD	41	* Note that at present this module does not support
9c7e4b06 WD	42	* multiple controllers.
ece92f85	43	*
9c7e4b06 WD	44	* The orignal name of this file is warmboot.c.
	45	* Jason ported this file to u-boot to run the ATI video card
	46	* BIOS in u-boot.
ece92f85 JJ	47	****************************************************************************/
ece92f85 JJ	48	#include <common.h>
4c59f953 SG	49	#include <bios_emul.h>
4c59f953 SG	50	#include <errno.h>
ece92f85	51	#include <malloc.h>
4c59f953 SG	52	#include <vbe.h>
4c59f953 SG	53	#include "biosemui.h"
ece92f85 JJ	54
ece92f85 JJ	55	/* Length of the BIOS image */
9c7e4b06	56	#define MAX_BIOSLEN (128 * 1024L)
ece92f85	57
ece92f85 JJ	58	/* Place to save PCI BAR's that we change and later restore */
	59	static u32 saveROMBaseAddress;
	60	static u32 saveBaseAddress10;
	61	static u32 saveBaseAddress14;
	62	static u32 saveBaseAddress18;
	63	static u32 saveBaseAddress20;
	64
222f25f8 SG	65	/* Addres im memory of VBE region */
	66	const int vbe_offset = 0x2000;
	67
	68	static const void bios_ptr(const void buf, BE_VGAInfo *vga_info,
	69	u32 x86_dword_ptr)
	70	{
	71	u32 seg_ofs, flat;
	72
	73	seg_ofs = le32_to_cpu(x86_dword_ptr);
	74	flat = ((seg_ofs & 0xffff0000) >> 12) \| (seg_ofs & 0xffff);
	75	if (flat >= 0xc0000)
	76	return vga_info->BIOSImage + flat - 0xc0000;
	77	else
	78	return buf + (flat - vbe_offset);
	79	}
	80
	81	static int atibios_debug_mode(BE_VGAInfo vga_info, RMREGS regs,
	82	int vesa_mode, struct vbe_mode_info *mode_info)
4c59f953	83	{
222f25f8 SG	84	void buffer = (void )(M.mem_base + vbe_offset);
	85	u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
	86	u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
	87	struct vesa_mode_info *vm;
	88	struct vbe_info *info;
	89	const u16 modes_bios, ptr;
	90	u16 *modes;
	91	int size;
	92
	93	debug("VBE: Getting information\n");
	94	regs->e.eax = VESA_GET_INFO;
	95	regs->e.esi = buffer_seg;
	96	regs->e.edi = buffer_adr;
	97	info = buffer;
	98	memset(info, '\0', sizeof(*info));
	99	strcpy(info->signature, "VBE2");
	100	BE_int86(0x10, regs, regs);
	101	if (regs->e.eax != 0x4f) {
	102	debug("VESA_GET_INFO: error %x\n", regs->e.eax);
	103	return -ENOSYS;
	104	}
	105	debug("version %x\n", le16_to_cpu(info->version));
	106	debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info,
	107	info->oem_string_ptr));
	108	debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info,
	109	info->vendor_name_ptr));
	110	debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info,
	111	info->product_name_ptr));
	112	debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info,
	113	info->product_rev_ptr));
	114	modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr);
	115	debug("Modes: ");
	116	for (ptr = modes_bios; *ptr != 0xffff; ptr++)
	117	debug("%x ", le16_to_cpu(*ptr));
	118	debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4);
	119	size = (ptr - modes_bios) * sizeof(u16) + 2;
	120	modes = malloc(size);
	121	if (!modes)
	122	return -ENOMEM;
	123	memcpy(modes, modes_bios, size);
	124
	125	regs->e.eax = VESA_GET_CUR_MODE;
	126	BE_int86(0x10, regs, regs);
	127	if (regs->e.eax != 0x4f) {
	128	debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax);
	129	return -ENOSYS;
	130	}
	131	debug("Current mode %x\n", regs->e.ebx);
	132
	133	for (ptr = modes; *ptr != 0xffff; ptr++) {
	134	int mode = le16_to_cpu(*ptr);
	135	bool linear_ok;
	136	int attr;
	137
	138	break;
	139	debug("Mode %x: ", mode);
	140	memset(buffer, '\0', sizeof(struct vbe_mode_info));
	141	regs->e.eax = VESA_GET_MODE_INFO;
	142	regs->e.ebx = 0;
	143	regs->e.ecx = mode;
	144	regs->e.edx = 0;
	145	regs->e.esi = buffer_seg;
	146	regs->e.edi = buffer_adr;
	147	BE_int86(0x10, regs, regs);
148	if (regs->e.eax != 0x4f) {
149	debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
150	continue;
151	}
152	memcpy(mode_info->mode_info_block, buffer,
153	sizeof(struct vesa_mode_info));
154	mode_info->valid = true;
155	vm = &mode_info->vesa;
156	attr = le16_to_cpu(vm->mode_attributes);
157	linear_ok = attr & 0x80;
158	debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n",
159	le16_to_cpu(vm->x_resolution),
160	le16_to_cpu(vm->y_resolution),
161	vm->bits_per_pixel, vm->memory_model,
162	linear_ok ? "OK" : "not available",
163	attr);
164	debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n",
165	vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos,
166	vm->red_mask_size, vm->green_mask_size,
167	vm->blue_mask_size);
168	}
169
170	return 0;
171	}
172
173	static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,
174	struct vbe_mode_info *mode_info)
175	{
176	void buffer = (void )(M.mem_base + vbe_offset);
177	u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
178	u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
179	struct vesa_mode_info *vm;
180
4c59f953	181	debug("VBE: Setting VESA mode %#04x\n", vesa_mode);
4c59f953 SG	182	regs->e.eax = VESA_SET_MODE;
4c59f953 SG	183	regs->e.ebx = vesa_mode;
222f25f8 SG	184	/* request linear framebuffer mode and don't clear display */
222f25f8 SG	185	regs->e.ebx \|= (1 << 14) \| (1 << 15);
4c59f953	186	BE_int86(0x10, regs, regs);
222f25f8 SG	187	if (regs->e.eax != 0x4f) {
	188	debug("VESA_SET_MODE: error %x\n", regs->e.eax);
	189	return -ENOSYS;
	190	}
4c59f953	191
222f25f8 SG	192	memset(buffer, '\0', sizeof(struct vbe_mode_info));
222f25f8 SG	193	debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode);
4c59f953	194	regs->e.eax = VESA_GET_MODE_INFO;
4c59f953	195	regs->e.ecx = vesa_mode;
4c59f953 SG	196	regs->e.esi = buffer_seg;
	197	regs->e.edi = buffer_adr;
	198	BE_int86(0x10, regs, regs);
222f25f8 SG	199	if (regs->e.eax != 0x4f) {
	200	debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
	201	return -ENOSYS;
	202	}
	203
4c59f953	204	memcpy(mode_info->mode_info_block, buffer,
222f25f8	205	sizeof(struct vesa_mode_info));
4c59f953	206	mode_info->valid = true;
222f25f8 SG	207	mode_info->video_mode = vesa_mode;
	208	vm = &mode_info->vesa;
	209	vm->x_resolution = le16_to_cpu(vm->x_resolution);
	210	vm->y_resolution = le16_to_cpu(vm->y_resolution);
	211	vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline);
	212	vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr);
	213	vm->mode_attributes = le16_to_cpu(vm->mode_attributes);
	214	debug("VBE: Init complete\n");
4c59f953	215
222f25f8	216	return 0;
4c59f953 SG	217	}
4c59f953 SG	218
ece92f85 JJ	219	/****************************************************************************
ece92f85 JJ	220	PARAMETERS:
9c7e4b06	221	pcidev - PCI device info for the video card on the bus to boot
4c59f953	222	vga_info - BIOS emulator VGA info structure
ece92f85 JJ	223
	224	REMARKS:
	225	This function executes the BIOS POST code on the controller. We assume that
	226	at this stage the controller has its I/O and memory space enabled and
	227	that all other controllers are in a disabled state.
	228	****************************************************************************/
4c59f953 SG	229	static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info,
4c59f953 SG	230	int vesa_mode, struct vbe_mode_info *mode_info)
ece92f85 JJ	231	{
	232	RMREGS regs;
	233	RMSREGS sregs;
	234
	235	/* Determine the value to store in AX for BIOS POST. Per the PCI specs,
	236	AH must contain the bus and AL must contain the devfn, encoded as
	237	(dev << 3) \| fn
	238	*/
	239	memset(&regs, 0, sizeof(regs));
	240	memset(&sregs, 0, sizeof(sregs));
	241	regs.x.ax = ((int)PCI_BUS(pcidev) << 8) \|
	242	((int)PCI_DEV(pcidev) << 3) \| (int)PCI_FUNC(pcidev);
	243
	244	/Setup the X86 emulator for the VGA BIOS/
4c59f953	245	BE_setVGA(vga_info);
ece92f85 JJ	246
	247	/Execute the BIOS POST code/
	248	BE_callRealMode(0xC000, 0x0003, &regs, &sregs);
	249
	250	/Cleanup and exit/
4c59f953 SG	251	BE_getVGA(vga_info);
4c59f953 SG	252
222f25f8 SG	253	/* Useful for debugging */
	254	if (0)
	255	atibios_debug_mode(vga_info, &regs, vesa_mode, mode_info);
4c59f953 SG	256	if (vesa_mode != -1)
4c59f953 SG	257	atibios_set_vesa_mode(&regs, vesa_mode, mode_info);
ece92f85 JJ	258	}
	259
	260	/****************************************************************************
	261	PARAMETERS:
9c7e4b06 WD	262	pcidev - PCI device info for the video card on the bus
9c7e4b06 WD	263	bar - Place to return the base address register offset to use
ece92f85 JJ	264
	265	RETURNS:
	266	The address to use to map the secondary BIOS (AGP devices)
	267
	268	REMARKS:
	269	Searches all the PCI base address registers for the device looking for a
	270	memory mapping that is large enough to hold our ROM BIOS. We usually end up
	271	finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
	272	to map the BIOS for the device into. We use a mapping that is already
	273	assigned to the device to ensure the memory range will be passed through
	274	by any PCI->PCI or AGP->PCI bridge that may be present.
	275
	276	NOTE: Usually this function is only used for AGP devices, but it may be
	277	used for PCI devices that have already been POST'ed and the BIOS
	278	ROM base address has been zero'ed out.
	279
	280	NOTE: This function leaves the original memory aperture disabled by leaving
	281	it programmed to all 1's. It must be restored to the correct value
	282	later.
	283	****************************************************************************/
	284	static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar)
	285	{
	286	u32 base, size;
	287
	288	for (bar = 0x10; bar <= 0x14; (*bar) += 4) {
	289	pci_read_config_dword(pcidev, *bar, &base);
	290	if (!(base & 0x1)) {
	291	pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF);
	292	pci_read_config_dword(pcidev, *bar, &size);
	293	size = ~(size & ~0xFF) + 1;
	294	if (size >= MAX_BIOSLEN)
	295	return base & ~0xFF;
	296	}
	297	}
	298	return 0;
	299	}
	300
	301	/****************************************************************************
	302	REMARKS:
	303	Some non-x86 Linux kernels map PCI relocateable I/O to values that
	304	are above 64K, which will not work with the BIOS image that requires
	305	the offset for the I/O ports to be a maximum of 16-bits. Ideally
	306	someone should fix the kernel to map the I/O ports for VGA compatible
	307	devices to a different location (or just all I/O ports since it is
	308	unlikely you can have enough devices in the machine to use up all
	309	64K of the I/O space - a total of more than 256 cards would be
	310	necessary).
	311
	312	Anyway to fix this we change all I/O mapped base registers and
	313	chop off the top bits.
	314	****************************************************************************/
	315	static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base)
	316	{
	317	if ((base & 0x1) && (base > 0xFFFE)) {
	318	*base &= 0xFFFF;
	319	pci_write_config_dword(pcidev, reg, *base);
	320
	321	}
	322	}
	323
	324	/****************************************************************************
	325	PARAMETERS:
9c7e4b06	326	pcidev - PCI device info for the video card on the bus
ece92f85 JJ	327
	328	RETURNS:
	329	Pointers to the mapped BIOS image
	330
	331	REMARKS:
	332	Maps a pointer to the BIOS image on the graphics card on the PCI bus.
	333	****************************************************************************/
	334	void *PCI_mapBIOSImage(pci_dev_t pcidev)
	335	{
f6a7a2e8	336	u32 BIOSImageBus;
ece92f85 JJ	337	int BIOSImageBAR;
	338	u8 *BIOSImage;
	339
	340	/Save PCI BAR registers that might get changed/
	341	pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
	342	pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
	343	pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
	344	pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
	345	pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
	346
	347	/Fix up I/O base registers to less than 64K /
	348	if(saveBaseAddress14 != 0)
	349	PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
	350	else
	351	PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
	352
	353	/* Some cards have problems that stop us from being able to read the
	354	BIOS image from the ROM BAR. To fix this we have to do some chipset
	355	specific programming for different cards to solve this problem.
9c7e4b06	356	*/
ece92f85	357
f6a7a2e8 ES	358	BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR);
f6a7a2e8 ES	359	if (BIOSImageBus == 0) {
ece92f85 JJ	360	printf("Find bios addr error\n");
	361	return NULL;
	362	}
	363
f6a7a2e8 ES	364	BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus,
f6a7a2e8 ES	365	PCI_REGION_MEM, 0, MAP_NOCACHE);
ece92f85 JJ	366
	367	/Change the PCI BAR registers to map it onto the bus./
	368	pci_write_config_dword(pcidev, BIOSImageBAR, 0);
f6a7a2e8	369	pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus \| 0x1);
ece92f85 JJ	370
	371	udelay(1);
	372
	373	/*Check that the BIOS image is valid. If not fail, or return the
	374	compiled in BIOS image if that option was enabled
	375	*/
	376	if (BIOSImage[0] != 0x55 \|\| BIOSImage[1] != 0xAA \|\| BIOSImage[2] == 0) {
	377	return NULL;
	378	}
	379
	380	return BIOSImage;
	381	}
	382
	383	/****************************************************************************
	384	PARAMETERS:
9c7e4b06	385	pcidev - PCI device info for the video card on the bus
ece92f85 JJ	386
	387	REMARKS:
	388	Unmaps the BIOS image for the device and restores framebuffer mappings
	389	****************************************************************************/
	390	void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage)
	391	{
	392	pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
	393	pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
	394	pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
	395	pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
	396	pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
	397	}
	398
	399	/****************************************************************************
	400	PARAMETERS:
9c7e4b06	401	pcidev - PCI device info for the video card on the bus to boot
ece92f85 JJ	402	VGAInfo - BIOS emulator VGA info structure
	403
	404	RETURNS:
472d5460	405	true if successfully initialised, false if not.
ece92f85 JJ	406
	407	REMARKS:
	408	Loads and POST's the display controllers BIOS, directly from the BIOS
	409	image we can extract over the PCI bus.
	410	****************************************************************************/
4c59f953 SG	411	static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
	412	BE_VGAInfo *vga_info, int vesa_mode,
	413	struct vbe_mode_info *mode_info)
ece92f85	414	{
4c59f953 SG	415	u32 bios_image_len;
	416	uchar *mapped_bios;
	417	uchar *copy_of_bios;
	418
	419	if (bios_rom) {
	420	copy_of_bios = bios_rom;
	421	bios_image_len = bios_len;
	422	} else {
	423	/*
	424	* Allocate memory to store copy of BIOS from display
	425	* controller
	426	*/
	427	mapped_bios = PCI_mapBIOSImage(pcidev);
	428	if (mapped_bios == NULL) {
	429	printf("videoboot: Video ROM failed to map!\n");
	430	return false;
	431	}
ece92f85	432
4c59f953	433	bios_image_len = mapped_bios[2] * 512;
ece92f85	434
4c59f953 SG	435	copy_of_bios = malloc(bios_image_len);
	436	if (copy_of_bios == NULL) {
	437	printf("videoboot: Out of memory!\n");
	438	return false;
	439	}
	440	memcpy(copy_of_bios, mapped_bios, bios_image_len);
	441	PCI_unmapBIOSImage(pcidev, mapped_bios);
ece92f85	442	}
ece92f85	443
4c59f953 SG	444	/Save information in vga_info structure/
	445	vga_info->function = PCI_FUNC(pcidev);
	446	vga_info->device = PCI_DEV(pcidev);
	447	vga_info->bus = PCI_BUS(pcidev);
	448	vga_info->pcidev = pcidev;
	449	vga_info->BIOSImage = copy_of_bios;
	450	vga_info->BIOSImageLen = bios_image_len;
ece92f85 JJ	451
ece92f85 JJ	452	/Now execute the BIOS POST for the device/
4c59f953	453	if (copy_of_bios[0] != 0x55 \|\| copy_of_bios[1] != 0xAA) {
ece92f85 JJ	454	printf("videoboot: Video ROM image is invalid!\n");
	455	return false;
	456	}
	457
4c59f953	458	PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info);
ece92f85 JJ	459
ece92f85 JJ	460	/Reset the size of the BIOS image to the final size/
4c59f953	461	vga_info->BIOSImageLen = copy_of_bios[2] * 512;
ece92f85 JJ	462	return true;
	463	}
	464
4c59f953	465	int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **vga_infop)
ece92f85 JJ	466	{
	467	BE_VGAInfo *VGAInfo;
	468
	469	printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
	470	PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev));
	471
	472	/Initialise the x86 BIOS emulator/
	473	if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
	474	printf("videoboot: Out of memory!\n");
4c59f953	475	return -ENOMEM;
ece92f85 JJ	476	}
	477	memset(VGAInfo, 0, sizeof(*VGAInfo));
	478	BE_init(0, 65536, VGAInfo, 0);
4c59f953	479	*vga_infop = VGAInfo;
ece92f85	480
4c59f953 SG	481	return 0;
4c59f953 SG	482	}
ece92f85	483
4c59f953 SG	484	void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
	485	{
	486	X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
	487	}
	488
	489	int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
	490	BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
	491	struct vbe_mode_info *mode_info)
	492	{
	493	/Post all the display controller BIOS'es/
	494	if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
	495	vesa_mode, mode_info))
	496	return -EINVAL;
	497
	498	/*
	499	* Cleanup and exit the emulator if requested. If the BIOS emulator
	500	* is needed after booting the card, we will not call BE_exit and
	501	* leave it enabled for further use (ie: VESA driver etc).
ece92f85	502	*/
4c59f953	503	if (clean_up) {
ece92f85	504	BE_exit();
6e7b5f22 BM	505	if (vga_info->BIOSImage &&
6e7b5f22 BM	506	(u32)(vga_info->BIOSImage) != 0xc0000)
4c59f953 SG	507	free(vga_info->BIOSImage);
	508	free(vga_info);
	509	vga_info = NULL;
ece92f85	510	}
4c59f953 SG	511
	512	return 0;
	513	}
	514
	515	/****************************************************************************
	516	PARAMETERS:
	517	pcidev - PCI device info for the video card on the bus to boot
	518	pVGAInfo - Place to return VGA info structure is requested
	519	cleanUp - true to clean up on exit, false to leave emulator active
	520
	521	REMARKS:
	522	Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
	523	and the X86 BIOS emulator module.
	524	****************************************************************************/
	525	int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up)
	526	{
	527	BE_VGAInfo *VGAInfo;
	528	int ret;
	529
	530	ret = biosemu_setup(pcidev, &VGAInfo);
	531	if (ret)
	532	return false;
	533	ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL);
	534	if (ret)
	535	return false;
	536
	537	/* Return VGA info pointer if the caller requested it*/
ece92f85 JJ	538	if (pVGAInfo)
ece92f85 JJ	539	*pVGAInfo = VGAInfo;
4c59f953	540
ece92f85 JJ	541	return true;
ece92f85 JJ	542	}