[people/ms/linux.git] / drivers / char / pcmcia / cm4040_cs.c

/*
 * A driver for the Omnikey PCMCIA smartcard reader CardMan 4040
 *
 * (c) 2000-2004 Omnikey AG (http://www.omnikey.com/)
 *
 * (C) 2005-2006 Harald Welte <laforge@gnumonks.org>
 * 	- add support for poll()
 * 	- driver cleanup
 * 	- add waitqueues
 * 	- adhere to linux kernel coding style and policies
 * 	- support 2.6.13 "new style" pcmcia interface
 * 	- add class interface for udev device creation
 *
 * The device basically is a USB CCID compliant device that has been
 * attached to an I/O-Mapped FIFO.
 *
 * All rights reserved, Dual BSD/GPL Licensed.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/delay.h>
#include <linux/poll.h>
#include <linux/mutex.h>
#include <linux/wait.h>
#include <linux/uaccess.h>
#include <asm/io.h>

#include <pcmcia/cistpl.h>
#include <pcmcia/cisreg.h>
#include <pcmcia/ciscode.h>
#include <pcmcia/ds.h>

#include "cm4040_cs.h"


#define reader_to_dev(x)	(&x->p_dev->dev)

/* n (debug level) is ignored */
/* additional debug output may be enabled by re-compiling with
 * CM4040_DEBUG set */
/* #define CM4040_DEBUG */
#define DEBUGP(n, rdr, x, args...) do { 		\
		dev_dbg(reader_to_dev(rdr), "%s:" x, 	\
			   __func__ , ## args);		\
	} while (0)

static DEFINE_MUTEX(cm4040_mutex);

#define	CCID_DRIVER_BULK_DEFAULT_TIMEOUT  	(150*HZ)
#define	CCID_DRIVER_ASYNC_POWERUP_TIMEOUT 	(35*HZ)
#define	CCID_DRIVER_MINIMUM_TIMEOUT 		(3*HZ)
#define READ_WRITE_BUFFER_SIZE 512
#define POLL_LOOP_COUNT				1000

/* how often to poll for fifo status change */
#define POLL_PERIOD 				msecs_to_jiffies(10)

static void reader_release(struct pcmcia_device *link);

static int major;
static struct class *cmx_class;

#define		BS_READABLE	0x01
#define		BS_WRITABLE	0x02

struct reader_dev {
	struct pcmcia_device	*p_dev;
	wait_queue_head_t	devq;
	wait_queue_head_t	poll_wait;
	wait_queue_head_t	read_wait;
	wait_queue_head_t	write_wait;
	unsigned long 	  	buffer_status;
	unsigned long     	timeout;
	unsigned char     	s_buf[READ_WRITE_BUFFER_SIZE];
	unsigned char     	r_buf[READ_WRITE_BUFFER_SIZE];
	struct timer_list 	poll_timer;
};

static struct pcmcia_device *dev_table[CM_MAX_DEV];

#ifndef CM4040_DEBUG
#define	xoutb	outb
#define	xinb	inb
#else
static inline void xoutb(unsigned char val, unsigned short port)
{
	pr_debug("outb(val=%.2x,port=%.4x)\n", val, port);
	outb(val, port);
}

static inline unsigned char xinb(unsigned short port)
{
	unsigned char val;

	val = inb(port);
	pr_debug("%.2x=inb(%.4x)\n", val, port);
	return val;
}
#endif

/* poll the device fifo status register.  not to be confused with
 * the poll syscall. */
static void cm4040_do_poll(struct timer_list *t)
{
	struct reader_dev *dev = from_timer(dev, t, poll_timer);
	unsigned int obs = xinb(dev->p_dev->resource[0]->start
				+ REG_OFFSET_BUFFER_STATUS);

	if ((obs & BSR_BULK_IN_FULL)) {
		set_bit(BS_READABLE, &dev->buffer_status);
		DEBUGP(4, dev, "waking up read_wait\n");
		wake_up_interruptible(&dev->read_wait);
	} else
		clear_bit(BS_READABLE, &dev->buffer_status);

	if (!(obs & BSR_BULK_OUT_FULL)) {
		set_bit(BS_WRITABLE, &dev->buffer_status);
		DEBUGP(4, dev, "waking up write_wait\n");
		wake_up_interruptible(&dev->write_wait);
	} else
		clear_bit(BS_WRITABLE, &dev->buffer_status);

	if (dev->buffer_status)
		wake_up_interruptible(&dev->poll_wait);

	mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
}

static void cm4040_stop_poll(struct reader_dev *dev)
{
	del_timer_sync(&dev->poll_timer);
}

static int wait_for_bulk_out_ready(struct reader_dev *dev)
{
	int i, rc;
	int iobase = dev->p_dev->resource[0]->start;

	for (i = 0; i < POLL_LOOP_COUNT; i++) {
		if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
		    & BSR_BULK_OUT_FULL) == 0) {
			DEBUGP(4, dev, "BulkOut empty (i=%d)\n", i);
			return 1;
		}
	}

	DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
		dev->timeout);
	rc = wait_event_interruptible_timeout(dev->write_wait,
					      test_and_clear_bit(BS_WRITABLE,
						       &dev->buffer_status),
					      dev->timeout);

	if (rc > 0)
		DEBUGP(4, dev, "woke up: BulkOut empty\n");
	else if (rc == 0)
		DEBUGP(4, dev, "woke up: BulkOut full, returning 0 :(\n");
	else if (rc < 0)
		DEBUGP(4, dev, "woke up: signal arrived\n");

	return rc;
}

/* Write to Sync Control Register */
static int write_sync_reg(unsigned char val, struct reader_dev *dev)
{
	int iobase = dev->p_dev->resource[0]->start;
	int rc;

	rc = wait_for_bulk_out_ready(dev);
	if (rc <= 0)
		return rc;

	xoutb(val, iobase + REG_OFFSET_SYNC_CONTROL);
	rc = wait_for_bulk_out_ready(dev);
	if (rc <= 0)
		return rc;

	return 1;
}

static int wait_for_bulk_in_ready(struct reader_dev *dev)
{
	int i, rc;
	int iobase = dev->p_dev->resource[0]->start;

	for (i = 0; i < POLL_LOOP_COUNT; i++) {
		if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
		    & BSR_BULK_IN_FULL) == BSR_BULK_IN_FULL) {
			DEBUGP(3, dev, "BulkIn full (i=%d)\n", i);
			return 1;
		}
	}

	DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
		dev->timeout);
	rc = wait_event_interruptible_timeout(dev->read_wait,
					      test_and_clear_bit(BS_READABLE,
						 	&dev->buffer_status),
					      dev->timeout);
	if (rc > 0)
		DEBUGP(4, dev, "woke up: BulkIn full\n");
	else if (rc == 0)
		DEBUGP(4, dev, "woke up: BulkIn not full, returning 0 :(\n");
	else if (rc < 0)
		DEBUGP(4, dev, "woke up: signal arrived\n");

	return rc;
}

static ssize_t cm4040_read(struct file *filp, char __user *buf,
			size_t count, loff_t *ppos)
{
	struct reader_dev *dev = filp->private_data;
	int iobase = dev->p_dev->resource[0]->start;
	size_t bytes_to_read;
	unsigned long i;
	size_t min_bytes_to_read;
	int rc;
	unsigned char uc;

	DEBUGP(2, dev, "-> cm4040_read(%s,%d)\n", current->comm, current->pid);

	if (count == 0)
		return 0;

	if (count < 10)
		return -EFAULT;

	if (filp->f_flags & O_NONBLOCK) {
		DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
		DEBUGP(2, dev, "<- cm4040_read (failure)\n");
		return -EAGAIN;
	}

	if (!pcmcia_dev_present(dev->p_dev))
		return -ENODEV;

	for (i = 0; i < 5; i++) {
		rc = wait_for_bulk_in_ready(dev);
		if (rc <= 0) {
			DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
			DEBUGP(2, dev, "<- cm4040_read (failed)\n");
			if (rc == -ERESTARTSYS)
				return rc;
			return -EIO;
		}
	  	dev->r_buf[i] = xinb(iobase + REG_OFFSET_BULK_IN);
#ifdef CM4040_DEBUG
		pr_debug("%lu:%2x ", i, dev->r_buf[i]);
	}
	pr_debug("\n");
#else
	}
#endif

	bytes_to_read = 5 + le32_to_cpu(*(__le32 *)&dev->r_buf[1]);

	DEBUGP(6, dev, "BytesToRead=%zu\n", bytes_to_read);

	min_bytes_to_read = min(count, bytes_to_read + 5);
	min_bytes_to_read = min_t(size_t, min_bytes_to_read, READ_WRITE_BUFFER_SIZE);

	DEBUGP(6, dev, "Min=%zu\n", min_bytes_to_read);

	for (i = 0; i < (min_bytes_to_read-5); i++) {
		rc = wait_for_bulk_in_ready(dev);
		if (rc <= 0) {
			DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
			DEBUGP(2, dev, "<- cm4040_read (failed)\n");
			if (rc == -ERESTARTSYS)
				return rc;
			return -EIO;
		}
		dev->r_buf[i+5] = xinb(iobase + REG_OFFSET_BULK_IN);
#ifdef CM4040_DEBUG
		pr_debug("%lu:%2x ", i, dev->r_buf[i]);
	}
	pr_debug("\n");
#else
	}
#endif

	*ppos = min_bytes_to_read;
	if (copy_to_user(buf, dev->r_buf, min_bytes_to_read))
		return -EFAULT;

	rc = wait_for_bulk_in_ready(dev);
	if (rc <= 0) {
		DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
		DEBUGP(2, dev, "<- cm4040_read (failed)\n");
		if (rc == -ERESTARTSYS)
			return rc;
		return -EIO;
	}

	rc = write_sync_reg(SCR_READER_TO_HOST_DONE, dev);
	if (rc <= 0) {
		DEBUGP(5, dev, "write_sync_reg c=%.2x\n", rc);
		DEBUGP(2, dev, "<- cm4040_read (failed)\n");
		if (rc == -ERESTARTSYS)
			return rc;
		else
			return -EIO;
	}

	uc = xinb(iobase + REG_OFFSET_BULK_IN);

	DEBUGP(2, dev, "<- cm4040_read (successfully)\n");
	return min_bytes_to_read;
}

static ssize_t cm4040_write(struct file *filp, const char __user *buf,
			 size_t count, loff_t *ppos)
{
	struct reader_dev *dev = filp->private_data;
	int iobase = dev->p_dev->resource[0]->start;
	ssize_t rc;
	int i;
	unsigned int bytes_to_write;

	DEBUGP(2, dev, "-> cm4040_write(%s,%d)\n", current->comm, current->pid);

	if (count == 0) {
		DEBUGP(2, dev, "<- cm4040_write empty read (successfully)\n");
		return 0;
	}

	if ((count < 5) || (count > READ_WRITE_BUFFER_SIZE)) {
		DEBUGP(2, dev, "<- cm4040_write buffersize=%zd < 5\n", count);
		return -EIO;
	}

	if (filp->f_flags & O_NONBLOCK) {
		DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
		DEBUGP(4, dev, "<- cm4040_write (failure)\n");
		return -EAGAIN;
	}

	if (!pcmcia_dev_present(dev->p_dev))
		return -ENODEV;

	bytes_to_write = count;
	if (copy_from_user(dev->s_buf, buf, bytes_to_write))
		return -EFAULT;

	switch (dev->s_buf[0]) {
		case CMD_PC_TO_RDR_XFRBLOCK:
		case CMD_PC_TO_RDR_SECURE:
		case CMD_PC_TO_RDR_TEST_SECURE:
		case CMD_PC_TO_RDR_OK_SECURE:
			dev->timeout = CCID_DRIVER_BULK_DEFAULT_TIMEOUT;
			break;

		case CMD_PC_TO_RDR_ICCPOWERON:
			dev->timeout = CCID_DRIVER_ASYNC_POWERUP_TIMEOUT;
			break;

		case CMD_PC_TO_RDR_GETSLOTSTATUS:
		case CMD_PC_TO_RDR_ICCPOWEROFF:
		case CMD_PC_TO_RDR_GETPARAMETERS:
		case CMD_PC_TO_RDR_RESETPARAMETERS:
		case CMD_PC_TO_RDR_SETPARAMETERS:
		case CMD_PC_TO_RDR_ESCAPE:
		case CMD_PC_TO_RDR_ICCCLOCK:
		default:
			dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
			break;
	}

	rc = write_sync_reg(SCR_HOST_TO_READER_START, dev);
	if (rc <= 0) {
		DEBUGP(5, dev, "write_sync_reg c=%.2zx\n", rc);
		DEBUGP(2, dev, "<- cm4040_write (failed)\n");
		if (rc == -ERESTARTSYS)
			return rc;
		else
			return -EIO;
	}

	DEBUGP(4, dev, "start \n");

	for (i = 0; i < bytes_to_write; i++) {
		rc = wait_for_bulk_out_ready(dev);
		if (rc <= 0) {
			DEBUGP(5, dev, "wait_for_bulk_out_ready rc=%.2zx\n",
			       rc);
			DEBUGP(2, dev, "<- cm4040_write (failed)\n");
			if (rc == -ERESTARTSYS)
				return rc;
			else
				return -EIO;
		}

		xoutb(dev->s_buf[i],iobase + REG_OFFSET_BULK_OUT);
	}
	DEBUGP(4, dev, "end\n");

	rc = write_sync_reg(SCR_HOST_TO_READER_DONE, dev);

	if (rc <= 0) {
		DEBUGP(5, dev, "write_sync_reg c=%.2zx\n", rc);
		DEBUGP(2, dev, "<- cm4040_write (failed)\n");
		if (rc == -ERESTARTSYS)
			return rc;
		else
			return -EIO;
	}

	DEBUGP(2, dev, "<- cm4040_write (successfully)\n");
	return count;
}

static __poll_t cm4040_poll(struct file *filp, poll_table *wait)
{
	struct reader_dev *dev = filp->private_data;
	__poll_t mask = 0;

	poll_wait(filp, &dev->poll_wait, wait);

	if (test_and_clear_bit(BS_READABLE, &dev->buffer_status))
		mask |= EPOLLIN | EPOLLRDNORM;
	if (test_and_clear_bit(BS_WRITABLE, &dev->buffer_status))
		mask |= EPOLLOUT | EPOLLWRNORM;

	DEBUGP(2, dev, "<- cm4040_poll(%u)\n", mask);

	return mask;
}

static int cm4040_open(struct inode *inode, struct file *filp)
{
	struct reader_dev *dev;
	struct pcmcia_device *link;
	int minor = iminor(inode);
	int ret;

	if (minor >= CM_MAX_DEV)
		return -ENODEV;

	mutex_lock(&cm4040_mutex);
	link = dev_table[minor];
	if (link == NULL || !pcmcia_dev_present(link)) {
		ret = -ENODEV;
		goto out;
	}

	if (link->open) {
		ret = -EBUSY;
		goto out;
	}

	dev = link->priv;
	filp->private_data = dev;

	if (filp->f_flags & O_NONBLOCK) {
		DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
		ret = -EAGAIN;
		goto out;
	}

	link->open = 1;

	mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);

	DEBUGP(2, dev, "<- cm4040_open (successfully)\n");
	ret = nonseekable_open(inode, filp);
out:
	mutex_unlock(&cm4040_mutex);
	return ret;
}

static int cm4040_close(struct inode *inode, struct file *filp)
{
	struct reader_dev *dev = filp->private_data;
	struct pcmcia_device *link;
	int minor = iminor(inode);

	DEBUGP(2, dev, "-> cm4040_close(maj/min=%d.%d)\n", imajor(inode),
	      iminor(inode));

	if (minor >= CM_MAX_DEV)
		return -ENODEV;

	link = dev_table[minor];
	if (link == NULL)
		return -ENODEV;

	cm4040_stop_poll(dev);

	link->open = 0;
	wake_up(&dev->devq);

	DEBUGP(2, dev, "<- cm4040_close\n");
	return 0;
}

static void cm4040_reader_release(struct pcmcia_device *link)
{
	struct reader_dev *dev = link->priv;

	DEBUGP(3, dev, "-> cm4040_reader_release\n");
	while (link->open) {
		DEBUGP(3, dev, KERN_INFO MODULE_NAME ": delaying release "
		       "until process has terminated\n");
 		wait_event(dev->devq, (link->open == 0));
	}
	DEBUGP(3, dev, "<- cm4040_reader_release\n");
	return;
}

static int cm4040_config_check(struct pcmcia_device *p_dev, void *priv_data)
{
	return pcmcia_request_io(p_dev);
}


static int reader_config(struct pcmcia_device *link, int devno)
{
	struct reader_dev *dev;
	int fail_rc;

	link->config_flags |= CONF_AUTO_SET_IO;

	if (pcmcia_loop_config(link, cm4040_config_check, NULL))
		goto cs_release;

	fail_rc = pcmcia_enable_device(link);
	if (fail_rc != 0) {
		dev_info(&link->dev, "pcmcia_enable_device failed 0x%x\n",
			 fail_rc);
		goto cs_release;
	}

	dev = link->priv;

	DEBUGP(2, dev, "device " DEVICE_NAME "%d at %pR\n", devno,
	      link->resource[0]);
	DEBUGP(2, dev, "<- reader_config (succ)\n");

	return 0;

cs_release:
	reader_release(link);
	return -ENODEV;
}

static void reader_release(struct pcmcia_device *link)
{
	cm4040_reader_release(link);
	pcmcia_disable_device(link);
}

static int reader_probe(struct pcmcia_device *link)
{
	struct reader_dev *dev;
	int i, ret;

	for (i = 0; i < CM_MAX_DEV; i++) {
		if (dev_table[i] == NULL)
			break;
	}

	if (i == CM_MAX_DEV)
		return -ENODEV;

	dev = kzalloc(sizeof(struct reader_dev), GFP_KERNEL);
	if (dev == NULL)
		return -ENOMEM;

	dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
	dev->buffer_status = 0;

	link->priv = dev;
	dev->p_dev = link;

	dev_table[i] = link;

	init_waitqueue_head(&dev->devq);
	init_waitqueue_head(&dev->poll_wait);
	init_waitqueue_head(&dev->read_wait);
	init_waitqueue_head(&dev->write_wait);
	timer_setup(&dev->poll_timer, cm4040_do_poll, 0);

	ret = reader_config(link, i);
	if (ret) {
		dev_table[i] = NULL;
		kfree(dev);
		return ret;
	}

	device_create(cmx_class, NULL, MKDEV(major, i), NULL, "cmx%d", i);

	return 0;
}

static void reader_detach(struct pcmcia_device *link)
{
	struct reader_dev *dev = link->priv;
	int devno;

	/* find device */
	for (devno = 0; devno < CM_MAX_DEV; devno++) {
		if (dev_table[devno] == link)
			break;
	}
	if (devno == CM_MAX_DEV)
		return;

	reader_release(link);

	dev_table[devno] = NULL;
	kfree(dev);

	device_destroy(cmx_class, MKDEV(major, devno));

	return;
}

static const struct file_operations reader_fops = {
	.owner		= THIS_MODULE,
	.read		= cm4040_read,
	.write		= cm4040_write,
	.open		= cm4040_open,
	.release	= cm4040_close,
	.poll		= cm4040_poll,
	.llseek		= no_llseek,
};

static const struct pcmcia_device_id cm4040_ids[] = {
	PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0200),
	PCMCIA_DEVICE_PROD_ID12("OMNIKEY", "CardMan 4040",
				0xE32CDD8C, 0x8F23318B),
	PCMCIA_DEVICE_NULL,
};
MODULE_DEVICE_TABLE(pcmcia, cm4040_ids);

static struct pcmcia_driver reader_driver = {
  	.owner		= THIS_MODULE,
	.name		= "cm4040_cs",
	.probe		= reader_probe,
	.remove		= reader_detach,
	.id_table	= cm4040_ids,
};

static int __init cm4040_init(void)
{
	int rc;

	cmx_class = class_create(THIS_MODULE, "cardman_4040");
	if (IS_ERR(cmx_class))
		return PTR_ERR(cmx_class);

	major = register_chrdev(0, DEVICE_NAME, &reader_fops);
	if (major < 0) {
		printk(KERN_WARNING MODULE_NAME
			": could not get major number\n");
		class_destroy(cmx_class);
		return major;
	}

	rc = pcmcia_register_driver(&reader_driver);
	if (rc < 0) {
		unregister_chrdev(major, DEVICE_NAME);
		class_destroy(cmx_class);
		return rc;
	}

	return 0;
}

static void __exit cm4040_exit(void)
{
	pcmcia_unregister_driver(&reader_driver);
	unregister_chrdev(major, DEVICE_NAME);
	class_destroy(cmx_class);
}

module_init(cm4040_init);
module_exit(cm4040_exit);
MODULE_LICENSE("Dual BSD/GPL");
Commit	Line	Data
77c44ab1 HW	1	/*
	2	* A driver for the Omnikey PCMCIA smartcard reader CardMan 4040
	3	*
	4	* (c) 2000-2004 Omnikey AG (http://www.omnikey.com/)
	5	*
67bc6200	6	* (C) 2005-2006 Harald Welte <laforge@gnumonks.org>
77c44ab1 HW	7	* - add support for poll()
	8	* - driver cleanup
	9	* - add waitqueues
	10	* - adhere to linux kernel coding style and policies
	11	* - support 2.6.13 "new style" pcmcia interface
67bc6200	12	* - add class interface for udev device creation
77c44ab1 HW	13	*
	14	* The device basically is a USB CCID compliant device that has been
	15	* attached to an I/O-Mapped FIFO.
	16	*
	17	* All rights reserved, Dual BSD/GPL Licensed.
	18	*/
	19
77c44ab1 HW	20	#include <linux/kernel.h>
	21	#include <linux/module.h>
	22	#include <linux/slab.h>
	23	#include <linux/init.h>
	24	#include <linux/fs.h>
	25	#include <linux/delay.h>
	26	#include <linux/poll.h>
613655fa	27	#include <linux/mutex.h>
77c44ab1	28	#include <linux/wait.h>
7c0f6ba6	29	#include <linux/uaccess.h>
77c44ab1 HW	30	#include <asm/io.h>
77c44ab1 HW	31
77c44ab1 HW	32	#include <pcmcia/cistpl.h>
	33	#include <pcmcia/cisreg.h>
	34	#include <pcmcia/ciscode.h>
	35	#include <pcmcia/ds.h>
	36
	37	#include "cm4040_cs.h"
	38
	39
dd2e5a15	40	#define reader_to_dev(x) (&x->p_dev->dev)
cbf624f0 DB	41
	42	/* n (debug level) is ignored */
	43	/* additional debug output may be enabled by re-compiling with
	44	* CM4040_DEBUG set */
	45	/* #define CM4040_DEBUG */
	46	#define DEBUGP(n, rdr, x, args...) do { \
	47	dev_dbg(reader_to_dev(rdr), "%s:" x, \
	48	__func__ , ## args); \
77c44ab1	49	} while (0)
77c44ab1	50
613655fa	51	static DEFINE_MUTEX(cm4040_mutex);
77c44ab1 HW	52
	53	#define CCID_DRIVER_BULK_DEFAULT_TIMEOUT (150*HZ)
	54	#define CCID_DRIVER_ASYNC_POWERUP_TIMEOUT (35*HZ)
	55	#define CCID_DRIVER_MINIMUM_TIMEOUT (3*HZ)
	56	#define READ_WRITE_BUFFER_SIZE 512
	57	#define POLL_LOOP_COUNT 1000
	58
	59	/* how often to poll for fifo status change */
	60	#define POLL_PERIOD msecs_to_jiffies(10)
	61
fba395ee	62	static void reader_release(struct pcmcia_device *link);
77c44ab1 HW	63
77c44ab1 HW	64	static int major;
67bc6200	65	static struct class *cmx_class;
77c44ab1 HW	66
	67	#define BS_READABLE 0x01
	68	#define BS_WRITABLE 0x02
	69
	70	struct reader_dev {
fd238232	71	struct pcmcia_device *p_dev;
77c44ab1 HW	72	wait_queue_head_t devq;
	73	wait_queue_head_t poll_wait;
	74	wait_queue_head_t read_wait;
	75	wait_queue_head_t write_wait;
	76	unsigned long buffer_status;
	77	unsigned long timeout;
	78	unsigned char s_buf[READ_WRITE_BUFFER_SIZE];
	79	unsigned char r_buf[READ_WRITE_BUFFER_SIZE];
	80	struct timer_list poll_timer;
	81	};
	82
fba395ee	83	static struct pcmcia_device *dev_table[CM_MAX_DEV];
77c44ab1	84
cbf624f0	85	#ifndef CM4040_DEBUG
77c44ab1 HW	86	#define xoutb outb
	87	#define xinb inb
	88	#else
	89	static inline void xoutb(unsigned char val, unsigned short port)
	90	{
cbf624f0	91	pr_debug("outb(val=%.2x,port=%.4x)\n", val, port);
77c44ab1 HW	92	outb(val, port);
	93	}
	94
	95	static inline unsigned char xinb(unsigned short port)
	96	{
	97	unsigned char val;
	98
	99	val = inb(port);
cbf624f0	100	pr_debug("%.2x=inb(%.4x)\n", val, port);
77c44ab1 HW	101	return val;
	102	}
	103	#endif
	104
	105	/* poll the device fifo status register. not to be confused with
	106	* the poll syscall. */
9577924b	107	static void cm4040_do_poll(struct timer_list *t)
77c44ab1	108	{
9577924b	109	struct reader_dev *dev = from_timer(dev, t, poll_timer);
9a017a91	110	unsigned int obs = xinb(dev->p_dev->resource[0]->start
77c44ab1 HW	111	+ REG_OFFSET_BUFFER_STATUS);
	112
	113	if ((obs & BSR_BULK_IN_FULL)) {
	114	set_bit(BS_READABLE, &dev->buffer_status);
	115	DEBUGP(4, dev, "waking up read_wait\n");
	116	wake_up_interruptible(&dev->read_wait);
	117	} else
	118	clear_bit(BS_READABLE, &dev->buffer_status);
	119
	120	if (!(obs & BSR_BULK_OUT_FULL)) {
	121	set_bit(BS_WRITABLE, &dev->buffer_status);
	122	DEBUGP(4, dev, "waking up write_wait\n");
	123	wake_up_interruptible(&dev->write_wait);
	124	} else
	125	clear_bit(BS_WRITABLE, &dev->buffer_status);
	126
	127	if (dev->buffer_status)
	128	wake_up_interruptible(&dev->poll_wait);
	129
	130	mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
	131	}
	132
	133	static void cm4040_stop_poll(struct reader_dev *dev)
	134	{
	135	del_timer_sync(&dev->poll_timer);
	136	}
	137
	138	static int wait_for_bulk_out_ready(struct reader_dev *dev)
	139	{
	140	int i, rc;
9a017a91	141	int iobase = dev->p_dev->resource[0]->start;
77c44ab1 HW	142
	143	for (i = 0; i < POLL_LOOP_COUNT; i++) {
	144	if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
	145	& BSR_BULK_OUT_FULL) == 0) {
	146	DEBUGP(4, dev, "BulkOut empty (i=%d)\n", i);
	147	return 1;
	148	}
	149	}
	150
	151	DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
	152	dev->timeout);
	153	rc = wait_event_interruptible_timeout(dev->write_wait,
	154	test_and_clear_bit(BS_WRITABLE,
	155	&dev->buffer_status),
	156	dev->timeout);
	157
	158	if (rc > 0)
	159	DEBUGP(4, dev, "woke up: BulkOut empty\n");
	160	else if (rc == 0)
	161	DEBUGP(4, dev, "woke up: BulkOut full, returning 0 :(\n");
	162	else if (rc < 0)
	163	DEBUGP(4, dev, "woke up: signal arrived\n");
	164
	165	return rc;
	166	}
	167
	168	/* Write to Sync Control Register */
	169	static int write_sync_reg(unsigned char val, struct reader_dev *dev)
	170	{
9a017a91	171	int iobase = dev->p_dev->resource[0]->start;
77c44ab1 HW	172	int rc;
	173
	174	rc = wait_for_bulk_out_ready(dev);
	175	if (rc <= 0)
	176	return rc;
	177
	178	xoutb(val, iobase + REG_OFFSET_SYNC_CONTROL);
	179	rc = wait_for_bulk_out_ready(dev);
	180	if (rc <= 0)
	181	return rc;
	182
	183	return 1;
	184	}
	185
	186	static int wait_for_bulk_in_ready(struct reader_dev *dev)
	187	{
	188	int i, rc;
9a017a91	189	int iobase = dev->p_dev->resource[0]->start;
77c44ab1 HW	190
	191	for (i = 0; i < POLL_LOOP_COUNT; i++) {
	192	if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
	193	& BSR_BULK_IN_FULL) == BSR_BULK_IN_FULL) {
	194	DEBUGP(3, dev, "BulkIn full (i=%d)\n", i);
	195	return 1;
	196	}
	197	}
	198
	199	DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
	200	dev->timeout);
	201	rc = wait_event_interruptible_timeout(dev->read_wait,
	202	test_and_clear_bit(BS_READABLE,
	203	&dev->buffer_status),
	204	dev->timeout);
	205	if (rc > 0)
	206	DEBUGP(4, dev, "woke up: BulkIn full\n");
	207	else if (rc == 0)
	208	DEBUGP(4, dev, "woke up: BulkIn not full, returning 0 :(\n");
	209	else if (rc < 0)
	210	DEBUGP(4, dev, "woke up: signal arrived\n");
	211
	212	return rc;
	213	}
	214
	215	static ssize_t cm4040_read(struct file filp, char __user buf,
	216	size_t count, loff_t *ppos)
	217	{
	218	struct reader_dev *dev = filp->private_data;
9a017a91	219	int iobase = dev->p_dev->resource[0]->start;
77c44ab1 HW	220	size_t bytes_to_read;
	221	unsigned long i;
	222	size_t min_bytes_to_read;
	223	int rc;
	224	unsigned char uc;
	225
	226	DEBUGP(2, dev, "-> cm4040_read(%s,%d)\n", current->comm, current->pid);
	227
	228	if (count == 0)
	229	return 0;
	230
	231	if (count < 10)
	232	return -EFAULT;
	233
	234	if (filp->f_flags & O_NONBLOCK) {
	235	DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
	236	DEBUGP(2, dev, "<- cm4040_read (failure)\n");
	237	return -EAGAIN;
	238	}
	239
e2d40963	240	if (!pcmcia_dev_present(dev->p_dev))
77c44ab1 HW	241	return -ENODEV;
	242
	243	for (i = 0; i < 5; i++) {
	244	rc = wait_for_bulk_in_ready(dev);
	245	if (rc <= 0) {
	246	DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
	247	DEBUGP(2, dev, "<- cm4040_read (failed)\n");
	248	if (rc == -ERESTARTSYS)
	249	return rc;
	250	return -EIO;
	251	}
	252	dev->r_buf[i] = xinb(iobase + REG_OFFSET_BULK_IN);
cbf624f0 DB	253	#ifdef CM4040_DEBUG
cbf624f0 DB	254	pr_debug("%lu:%2x ", i, dev->r_buf[i]);
77c44ab1	255	}
cbf624f0	256	pr_debug("\n");
77c44ab1 HW	257	#else
	258	}
	259	#endif
	260
	261	bytes_to_read = 5 + le32_to_cpu((__le32 )&dev->r_buf[1]);
	262
e657ea17	263	DEBUGP(6, dev, "BytesToRead=%zu\n", bytes_to_read);
77c44ab1 HW	264
77c44ab1 HW	265	min_bytes_to_read = min(count, bytes_to_read + 5);
059819a4	266	min_bytes_to_read = min_t(size_t, min_bytes_to_read, READ_WRITE_BUFFER_SIZE);
77c44ab1	267
e657ea17	268	DEBUGP(6, dev, "Min=%zu\n", min_bytes_to_read);
77c44ab1 HW	269
	270	for (i = 0; i < (min_bytes_to_read-5); i++) {
	271	rc = wait_for_bulk_in_ready(dev);
	272	if (rc <= 0) {
	273	DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
	274	DEBUGP(2, dev, "<- cm4040_read (failed)\n");
	275	if (rc == -ERESTARTSYS)
	276	return rc;
	277	return -EIO;
	278	}
	279	dev->r_buf[i+5] = xinb(iobase + REG_OFFSET_BULK_IN);
cbf624f0 DB	280	#ifdef CM4040_DEBUG
cbf624f0 DB	281	pr_debug("%lu:%2x ", i, dev->r_buf[i]);
77c44ab1	282	}
cbf624f0	283	pr_debug("\n");
77c44ab1 HW	284	#else
	285	}
	286	#endif
	287
	288	*ppos = min_bytes_to_read;
	289	if (copy_to_user(buf, dev->r_buf, min_bytes_to_read))
	290	return -EFAULT;
	291
	292	rc = wait_for_bulk_in_ready(dev);
	293	if (rc <= 0) {
	294	DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
	295	DEBUGP(2, dev, "<- cm4040_read (failed)\n");
	296	if (rc == -ERESTARTSYS)
	297	return rc;
	298	return -EIO;
	299	}
	300
	301	rc = write_sync_reg(SCR_READER_TO_HOST_DONE, dev);
	302	if (rc <= 0) {
	303	DEBUGP(5, dev, "write_sync_reg c=%.2x\n", rc);
	304	DEBUGP(2, dev, "<- cm4040_read (failed)\n");
	305	if (rc == -ERESTARTSYS)
	306	return rc;
	307	else
	308	return -EIO;
	309	}
	310
	311	uc = xinb(iobase + REG_OFFSET_BULK_IN);
	312
	313	DEBUGP(2, dev, "<- cm4040_read (successfully)\n");
	314	return min_bytes_to_read;
	315	}
	316
	317	static ssize_t cm4040_write(struct file filp, const char __user buf,
	318	size_t count, loff_t *ppos)
	319	{
	320	struct reader_dev *dev = filp->private_data;
9a017a91	321	int iobase = dev->p_dev->resource[0]->start;
77c44ab1 HW	322	ssize_t rc;
	323	int i;
	324	unsigned int bytes_to_write;
	325
	326	DEBUGP(2, dev, "-> cm4040_write(%s,%d)\n", current->comm, current->pid);
	327
	328	if (count == 0) {
	329	DEBUGP(2, dev, "<- cm4040_write empty read (successfully)\n");
	330	return 0;
	331	}
	332
059819a4	333	if ((count < 5) \|\| (count > READ_WRITE_BUFFER_SIZE)) {
5b5e0928	334	DEBUGP(2, dev, "<- cm4040_write buffersize=%zd < 5\n", count);
77c44ab1 HW	335	return -EIO;
	336	}
	337
	338	if (filp->f_flags & O_NONBLOCK) {
	339	DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
	340	DEBUGP(4, dev, "<- cm4040_write (failure)\n");
	341	return -EAGAIN;
	342	}
	343
e2d40963	344	if (!pcmcia_dev_present(dev->p_dev))
77c44ab1 HW	345	return -ENODEV;
	346
	347	bytes_to_write = count;
	348	if (copy_from_user(dev->s_buf, buf, bytes_to_write))
	349	return -EFAULT;
	350
	351	switch (dev->s_buf[0]) {
	352	case CMD_PC_TO_RDR_XFRBLOCK:
	353	case CMD_PC_TO_RDR_SECURE:
	354	case CMD_PC_TO_RDR_TEST_SECURE:
	355	case CMD_PC_TO_RDR_OK_SECURE:
	356	dev->timeout = CCID_DRIVER_BULK_DEFAULT_TIMEOUT;
	357	break;
	358
	359	case CMD_PC_TO_RDR_ICCPOWERON:
	360	dev->timeout = CCID_DRIVER_ASYNC_POWERUP_TIMEOUT;
	361	break;
	362
	363	case CMD_PC_TO_RDR_GETSLOTSTATUS:
	364	case CMD_PC_TO_RDR_ICCPOWEROFF:
	365	case CMD_PC_TO_RDR_GETPARAMETERS:
	366	case CMD_PC_TO_RDR_RESETPARAMETERS:
	367	case CMD_PC_TO_RDR_SETPARAMETERS:
	368	case CMD_PC_TO_RDR_ESCAPE:
	369	case CMD_PC_TO_RDR_ICCCLOCK:
	370	default:
	371	dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
	372	break;
	373	}
	374
	375	rc = write_sync_reg(SCR_HOST_TO_READER_START, dev);
	376	if (rc <= 0) {
ff5a2016	377	DEBUGP(5, dev, "write_sync_reg c=%.2zx\n", rc);
77c44ab1 HW	378	DEBUGP(2, dev, "<- cm4040_write (failed)\n");
	379	if (rc == -ERESTARTSYS)
	380	return rc;
	381	else
	382	return -EIO;
	383	}
	384
	385	DEBUGP(4, dev, "start \n");
	386
	387	for (i = 0; i < bytes_to_write; i++) {
	388	rc = wait_for_bulk_out_ready(dev);
	389	if (rc <= 0) {
ff5a2016	390	DEBUGP(5, dev, "wait_for_bulk_out_ready rc=%.2zx\n",
77c44ab1 HW	391	rc);
	392	DEBUGP(2, dev, "<- cm4040_write (failed)\n");
	393	if (rc == -ERESTARTSYS)
	394	return rc;
	395	else
	396	return -EIO;
	397	}
	398
	399	xoutb(dev->s_buf[i],iobase + REG_OFFSET_BULK_OUT);
	400	}
	401	DEBUGP(4, dev, "end\n");
	402
	403	rc = write_sync_reg(SCR_HOST_TO_READER_DONE, dev);
	404
	405	if (rc <= 0) {
ff5a2016	406	DEBUGP(5, dev, "write_sync_reg c=%.2zx\n", rc);
77c44ab1 HW	407	DEBUGP(2, dev, "<- cm4040_write (failed)\n");
	408	if (rc == -ERESTARTSYS)
	409	return rc;
	410	else
	411	return -EIO;
	412	}
	413
	414	DEBUGP(2, dev, "<- cm4040_write (successfully)\n");
	415	return count;
	416	}
	417
afc9a42b	418	static __poll_t cm4040_poll(struct file filp, poll_table wait)
77c44ab1 HW	419	{
77c44ab1 HW	420	struct reader_dev *dev = filp->private_data;
afc9a42b	421	__poll_t mask = 0;
77c44ab1 HW	422
	423	poll_wait(filp, &dev->poll_wait, wait);
	424
	425	if (test_and_clear_bit(BS_READABLE, &dev->buffer_status))
a9a08845	426	mask \|= EPOLLIN \| EPOLLRDNORM;
77c44ab1	427	if (test_and_clear_bit(BS_WRITABLE, &dev->buffer_status))
a9a08845	428	mask \|= EPOLLOUT \| EPOLLWRNORM;
77c44ab1 HW	429
	430	DEBUGP(2, dev, "<- cm4040_poll(%u)\n", mask);
	431
	432	return mask;
	433	}
	434
	435	static int cm4040_open(struct inode inode, struct file filp)
	436	{
	437	struct reader_dev *dev;
fba395ee	438	struct pcmcia_device *link;
77c44ab1	439	int minor = iminor(inode);
8b5332f6	440	int ret;
77c44ab1 HW	441
	442	if (minor >= CM_MAX_DEV)
	443	return -ENODEV;
	444
613655fa	445	mutex_lock(&cm4040_mutex);
77c44ab1	446	link = dev_table[minor];
8b5332f6 JC	447	if (link == NULL \|\| !pcmcia_dev_present(link)) {
	448	ret = -ENODEV;
	449	goto out;
	450	}
77c44ab1	451
8b5332f6 JC	452	if (link->open) {
	453	ret = -EBUSY;
	454	goto out;
	455	}
77c44ab1 HW	456
	457	dev = link->priv;
	458	filp->private_data = dev;
	459
	460	if (filp->f_flags & O_NONBLOCK) {
	461	DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
8b5332f6 JC	462	ret = -EAGAIN;
8b5332f6 JC	463	goto out;
77c44ab1 HW	464	}
	465
	466	link->open = 1;
	467
77c44ab1 HW	468	mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
	469
	470	DEBUGP(2, dev, "<- cm4040_open (successfully)\n");
8b5332f6 JC	471	ret = nonseekable_open(inode, filp);
8b5332f6 JC	472	out:
613655fa	473	mutex_unlock(&cm4040_mutex);
8b5332f6	474	return ret;
77c44ab1 HW	475	}
	476
	477	static int cm4040_close(struct inode inode, struct file filp)
	478	{
	479	struct reader_dev *dev = filp->private_data;
fba395ee	480	struct pcmcia_device *link;
77c44ab1 HW	481	int minor = iminor(inode);
	482
	483	DEBUGP(2, dev, "-> cm4040_close(maj/min=%d.%d)\n", imajor(inode),
	484	iminor(inode));
	485
	486	if (minor >= CM_MAX_DEV)
	487	return -ENODEV;
	488
	489	link = dev_table[minor];
	490	if (link == NULL)
	491	return -ENODEV;
	492
	493	cm4040_stop_poll(dev);
	494
	495	link->open = 0;
	496	wake_up(&dev->devq);
	497
	498	DEBUGP(2, dev, "<- cm4040_close\n");
	499	return 0;
	500	}
	501
fba395ee	502	static void cm4040_reader_release(struct pcmcia_device *link)
77c44ab1 HW	503	{
	504	struct reader_dev *dev = link->priv;
	505
	506	DEBUGP(3, dev, "-> cm4040_reader_release\n");
	507	while (link->open) {
	508	DEBUGP(3, dev, KERN_INFO MODULE_NAME ": delaying release "
	509	"until process has terminated\n");
	510	wait_event(dev->devq, (link->open == 0));
	511	}
	512	DEBUGP(3, dev, "<- cm4040_reader_release\n");
	513	return;
	514	}
	515
00990e7c	516	static int cm4040_config_check(struct pcmcia_device p_dev, void priv_data)
77c44ab1	517	{
00990e7c	518	return pcmcia_request_io(p_dev);
84e2d340 DB	519	}
	520
	521
	522	static int reader_config(struct pcmcia_device *link, int devno)
	523	{
	524	struct reader_dev *dev;
	525	int fail_rc;
77c44ab1	526
00990e7c DB	527	link->config_flags \|= CONF_AUTO_SET_IO;
00990e7c DB	528
84e2d340	529	if (pcmcia_loop_config(link, cm4040_config_check, NULL))
77c44ab1 HW	530	goto cs_release;
77c44ab1 HW	531
1ac71e5a	532	fail_rc = pcmcia_enable_device(link);
4c89e88b	533	if (fail_rc != 0) {
f2e6cf76 JP	534	dev_info(&link->dev, "pcmcia_enable_device failed 0x%x\n",
f2e6cf76 JP	535	fail_rc);
77c44ab1 HW	536	goto cs_release;
	537	}
	538
	539	dev = link->priv;
77c44ab1	540
9a017a91 DB	541	DEBUGP(2, dev, "device " DEVICE_NAME "%d at %pR\n", devno,
9a017a91 DB	542	link->resource[0]);
77c44ab1 HW	543	DEBUGP(2, dev, "<- reader_config (succ)\n");
77c44ab1 HW	544
15b99ac1	545	return 0;
77c44ab1	546
77c44ab1 HW	547	cs_release:
77c44ab1 HW	548	reader_release(link);
15b99ac1	549	return -ENODEV;
77c44ab1 HW	550	}
77c44ab1 HW	551
fba395ee	552	static void reader_release(struct pcmcia_device *link)
77c44ab1	553	{
925796e0	554	cm4040_reader_release(link);
fba395ee	555	pcmcia_disable_device(link);
77c44ab1 HW	556	}
77c44ab1 HW	557
15b99ac1	558	static int reader_probe(struct pcmcia_device *link)
77c44ab1 HW	559	{
77c44ab1 HW	560	struct reader_dev *dev;
15b99ac1	561	int i, ret;
77c44ab1 HW	562
	563	for (i = 0; i < CM_MAX_DEV; i++) {
	564	if (dev_table[i] == NULL)
	565	break;
	566	}
	567
	568	if (i == CM_MAX_DEV)
f8cfa618	569	return -ENODEV;
77c44ab1 HW	570
	571	dev = kzalloc(sizeof(struct reader_dev), GFP_KERNEL);
	572	if (dev == NULL)
f8cfa618	573	return -ENOMEM;
77c44ab1 HW	574
	575	dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
	576	dev->buffer_status = 0;
	577
77c44ab1	578	link->priv = dev;
fba395ee	579	dev->p_dev = link;
77c44ab1	580
77c44ab1 HW	581	dev_table[i] = link;
77c44ab1 HW	582
77c44ab1 HW	583	init_waitqueue_head(&dev->devq);
	584	init_waitqueue_head(&dev->poll_wait);
	585	init_waitqueue_head(&dev->read_wait);
	586	init_waitqueue_head(&dev->write_wait);
9577924b	587	timer_setup(&dev->poll_timer, cm4040_do_poll, 0);
77c44ab1	588
15b99ac1	589	ret = reader_config(link, i);
54493c10 AM	590	if (ret) {
	591	dev_table[i] = NULL;
	592	kfree(dev);
15b99ac1	593	return ret;
54493c10	594	}
f8cfa618	595
03457cd4	596	device_create(cmx_class, NULL, MKDEV(major, i), NULL, "cmx%d", i);
67bc6200	597
f8cfa618	598	return 0;
77c44ab1 HW	599	}
77c44ab1 HW	600
fba395ee	601	static void reader_detach(struct pcmcia_device *link)
77c44ab1 HW	602	{
77c44ab1 HW	603	struct reader_dev *dev = link->priv;
cc3b4866	604	int devno;
77c44ab1 HW	605
77c44ab1 HW	606	/* find device */
cc3b4866 DB	607	for (devno = 0; devno < CM_MAX_DEV; devno++) {
cc3b4866 DB	608	if (dev_table[devno] == link)
77c44ab1 HW	609	break;
77c44ab1 HW	610	}
cc3b4866	611	if (devno == CM_MAX_DEV)
77c44ab1 HW	612	return;
77c44ab1 HW	613
e2d40963	614	reader_release(link);
cc3b4866 DB	615
	616	dev_table[devno] = NULL;
	617	kfree(dev);
	618
07c015e7	619	device_destroy(cmx_class, MKDEV(major, devno));
67bc6200	620
77c44ab1 HW	621	return;
	622	}
	623
62322d25	624	static const struct file_operations reader_fops = {
77c44ab1 HW	625	.owner = THIS_MODULE,
	626	.read = cm4040_read,
	627	.write = cm4040_write,
	628	.open = cm4040_open,
	629	.release = cm4040_close,
	630	.poll = cm4040_poll,
6038f373	631	.llseek = no_llseek,
77c44ab1 HW	632	};
77c44ab1 HW	633
25f8f54f	634	static const struct pcmcia_device_id cm4040_ids[] = {
77c44ab1 HW	635	PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0200),
	636	PCMCIA_DEVICE_PROD_ID12("OMNIKEY", "CardMan 4040",
	637	0xE32CDD8C, 0x8F23318B),
	638	PCMCIA_DEVICE_NULL,
	639	};
	640	MODULE_DEVICE_TABLE(pcmcia, cm4040_ids);
	641
	642	static struct pcmcia_driver reader_driver = {
	643	.owner = THIS_MODULE,
2e9b981a	644	.name = "cm4040_cs",
15b99ac1	645	.probe = reader_probe,
cc3b4866	646	.remove = reader_detach,
77c44ab1 HW	647	.id_table = cm4040_ids,
	648	};
	649
	650	static int __init cm4040_init(void)
	651	{
67bc6200 HW	652	int rc;
67bc6200 HW	653
67bc6200	654	cmx_class = class_create(THIS_MODULE, "cardman_4040");
5eb5fc97 AM	655	if (IS_ERR(cmx_class))
5eb5fc97 AM	656	return PTR_ERR(cmx_class);
67bc6200	657
77c44ab1 HW	658	major = register_chrdev(0, DEVICE_NAME, &reader_fops);
	659	if (major < 0) {
	660	printk(KERN_WARNING MODULE_NAME
	661	": could not get major number\n");
54493c10	662	class_destroy(cmx_class);
5eb5fc97	663	return major;
77c44ab1	664	}
7fc5b1e3 HW	665
	666	rc = pcmcia_register_driver(&reader_driver);
	667	if (rc < 0) {
	668	unregister_chrdev(major, DEVICE_NAME);
54493c10	669	class_destroy(cmx_class);
7fc5b1e3 HW	670	return rc;
	671	}
	672
77c44ab1 HW	673	return 0;
	674	}
	675
	676	static void __exit cm4040_exit(void)
	677	{
77c44ab1	678	pcmcia_unregister_driver(&reader_driver);
77c44ab1	679	unregister_chrdev(major, DEVICE_NAME);
67bc6200	680	class_destroy(cmx_class);
77c44ab1 HW	681	}
	682
	683	module_init(cm4040_init);
	684	module_exit(cm4040_exit);
	685	MODULE_LICENSE("Dual BSD/GPL");