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tpm_tis: fix build warning with tpm_tis_resume
[people/arne_f/kernel.git] / drivers / char / tpm / tpm_tis.c
CommitLineData
27084efe
LD
1/*
2 * Copyright (C) 2005, 2006 IBM Corporation
399235dc 3 * Copyright (C) 2014, 2015 Intel Corporation
27084efe
LD
4 *
5 * Authors:
6 * Leendert van Doorn <leendert@watson.ibm.com>
7 * Kylene Hall <kjhall@us.ibm.com>
8 *
8e81cc13
KY
9 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
10 *
27084efe
LD
11 * Device driver for TCG/TCPA TPM (trusted platform module).
12 * Specifications at www.trustedcomputinggroup.org
13 *
14 * This device driver implements the TPM interface as defined in
15 * the TCG TPM Interface Spec version 1.2, revision 1.0.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation, version 2 of the
20 * License.
21 */
57135568
KJH
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/moduleparam.h>
27084efe 25#include <linux/pnp.h>
5a0e3ad6 26#include <linux/slab.h>
27084efe
LD
27#include <linux/interrupt.h>
28#include <linux/wait.h>
3f0d3d01 29#include <linux/acpi.h>
20b87bbf 30#include <linux/freezer.h>
27084efe
LD
31#include "tpm.h"
32
27084efe
LD
33enum tis_access {
34 TPM_ACCESS_VALID = 0x80,
35 TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
36 TPM_ACCESS_REQUEST_PENDING = 0x04,
37 TPM_ACCESS_REQUEST_USE = 0x02,
38};
39
40enum tis_status {
41 TPM_STS_VALID = 0x80,
42 TPM_STS_COMMAND_READY = 0x40,
43 TPM_STS_GO = 0x20,
44 TPM_STS_DATA_AVAIL = 0x10,
45 TPM_STS_DATA_EXPECT = 0x08,
46};
47
48enum tis_int_flags {
49 TPM_GLOBAL_INT_ENABLE = 0x80000000,
50 TPM_INTF_BURST_COUNT_STATIC = 0x100,
51 TPM_INTF_CMD_READY_INT = 0x080,
52 TPM_INTF_INT_EDGE_FALLING = 0x040,
53 TPM_INTF_INT_EDGE_RISING = 0x020,
54 TPM_INTF_INT_LEVEL_LOW = 0x010,
55 TPM_INTF_INT_LEVEL_HIGH = 0x008,
56 TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
57 TPM_INTF_STS_VALID_INT = 0x002,
58 TPM_INTF_DATA_AVAIL_INT = 0x001,
59};
60
36b20020 61enum tis_defaults {
b09d5300 62 TIS_MEM_LEN = 0x5000,
cb535425
KJH
63 TIS_SHORT_TIMEOUT = 750, /* ms */
64 TIS_LONG_TIMEOUT = 2000, /* 2 sec */
36b20020
KJH
65};
66
399235dc 67struct tpm_info {
51dd43df 68 struct resource res;
ef7b81dc
JG
69 /* irq > 0 means: use irq $irq;
70 * irq = 0 means: autoprobe for an irq;
71 * irq = -1 means: no irq support
72 */
73 int irq;
399235dc
JS
74};
75
aec04cbd
JS
76/* Some timeout values are needed before it is known whether the chip is
77 * TPM 1.0 or TPM 2.0.
78 */
79#define TIS_TIMEOUT_A_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_A)
80#define TIS_TIMEOUT_B_MAX max(TIS_LONG_TIMEOUT, TPM2_TIMEOUT_B)
81#define TIS_TIMEOUT_C_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_C)
82#define TIS_TIMEOUT_D_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_D)
83
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LD
84#define TPM_ACCESS(l) (0x0000 | ((l) << 12))
85#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
86#define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
87#define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
88#define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
89#define TPM_STS(l) (0x0018 | ((l) << 12))
aec04cbd 90#define TPM_STS3(l) (0x001b | ((l) << 12))
27084efe
LD
91#define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
92
93#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
94#define TPM_RID(l) (0x0F04 | ((l) << 12))
95
448e9c55
SD
96struct priv_data {
97 bool irq_tested;
98};
99
1560ffe6 100#if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
399235dc 101static int has_hid(struct acpi_device *dev, const char *hid)
3f0d3d01 102{
3f0d3d01
MG
103 struct acpi_hardware_id *id;
104
399235dc
JS
105 list_for_each_entry(id, &dev->pnp.ids, list)
106 if (!strcmp(hid, id->id))
3f0d3d01 107 return 1;
3f0d3d01
MG
108
109 return 0;
110}
399235dc
JS
111
112static inline int is_itpm(struct acpi_device *dev)
113{
114 return has_hid(dev, "INTC0102");
115}
1560ffe6 116#else
399235dc 117static inline int is_itpm(struct acpi_device *dev)
1560ffe6
RD
118{
119 return 0;
120}
3f0d3d01
MG
121#endif
122
7240b983
JG
123/* Before we attempt to access the TPM we must see that the valid bit is set.
124 * The specification says that this bit is 0 at reset and remains 0 until the
125 * 'TPM has gone through its self test and initialization and has established
126 * correct values in the other bits.' */
127static int wait_startup(struct tpm_chip *chip, int l)
128{
129 unsigned long stop = jiffies + chip->vendor.timeout_a;
130 do {
131 if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
132 TPM_ACCESS_VALID)
133 return 0;
134 msleep(TPM_TIMEOUT);
135 } while (time_before(jiffies, stop));
136 return -1;
137}
138
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LD
139static int check_locality(struct tpm_chip *chip, int l)
140{
141 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
142 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
143 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
144 return chip->vendor.locality = l;
145
146 return -1;
147}
148
149static void release_locality(struct tpm_chip *chip, int l, int force)
150{
151 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
152 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
153 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
154 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
155 chip->vendor.iobase + TPM_ACCESS(l));
156}
157
158static int request_locality(struct tpm_chip *chip, int l)
159{
20b87bbf 160 unsigned long stop, timeout;
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LD
161 long rc;
162
163 if (check_locality(chip, l) >= 0)
164 return l;
165
166 iowrite8(TPM_ACCESS_REQUEST_USE,
167 chip->vendor.iobase + TPM_ACCESS(l));
168
20b87bbf
SB
169 stop = jiffies + chip->vendor.timeout_a;
170
27084efe 171 if (chip->vendor.irq) {
20b87bbf
SB
172again:
173 timeout = stop - jiffies;
174 if ((long)timeout <= 0)
175 return -1;
36b20020 176 rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
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LD
177 (check_locality
178 (chip, l) >= 0),
20b87bbf 179 timeout);
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LD
180 if (rc > 0)
181 return l;
20b87bbf
SB
182 if (rc == -ERESTARTSYS && freezing(current)) {
183 clear_thread_flag(TIF_SIGPENDING);
184 goto again;
185 }
27084efe
LD
186 } else {
187 /* wait for burstcount */
27084efe
LD
188 do {
189 if (check_locality(chip, l) >= 0)
190 return l;
191 msleep(TPM_TIMEOUT);
192 }
193 while (time_before(jiffies, stop));
194 }
195 return -1;
196}
197
198static u8 tpm_tis_status(struct tpm_chip *chip)
199{
200 return ioread8(chip->vendor.iobase +
201 TPM_STS(chip->vendor.locality));
202}
203
204static void tpm_tis_ready(struct tpm_chip *chip)
205{
206 /* this causes the current command to be aborted */
207 iowrite8(TPM_STS_COMMAND_READY,
208 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
209}
210
211static int get_burstcount(struct tpm_chip *chip)
212{
213 unsigned long stop;
214 int burstcnt;
215
216 /* wait for burstcount */
217 /* which timeout value, spec has 2 answers (c & d) */
36b20020 218 stop = jiffies + chip->vendor.timeout_d;
27084efe
LD
219 do {
220 burstcnt = ioread8(chip->vendor.iobase +
221 TPM_STS(chip->vendor.locality) + 1);
222 burstcnt += ioread8(chip->vendor.iobase +
223 TPM_STS(chip->vendor.locality) +
224 2) << 8;
225 if (burstcnt)
226 return burstcnt;
227 msleep(TPM_TIMEOUT);
228 } while (time_before(jiffies, stop));
229 return -EBUSY;
230}
231
cb535425 232static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
27084efe
LD
233{
234 int size = 0, burstcnt;
235 while (size < count &&
fd048866
RA
236 wait_for_tpm_stat(chip,
237 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
238 chip->vendor.timeout_c,
78f09cc2 239 &chip->vendor.read_queue, true)
27084efe
LD
240 == 0) {
241 burstcnt = get_burstcount(chip);
242 for (; burstcnt > 0 && size < count; burstcnt--)
243 buf[size++] = ioread8(chip->vendor.iobase +
244 TPM_DATA_FIFO(chip->vendor.
245 locality));
246 }
247 return size;
248}
249
cb535425 250static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
27084efe
LD
251{
252 int size = 0;
253 int expected, status;
254
255 if (count < TPM_HEADER_SIZE) {
256 size = -EIO;
257 goto out;
258 }
259
260 /* read first 10 bytes, including tag, paramsize, and result */
261 if ((size =
262 recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
71ed848f 263 dev_err(chip->pdev, "Unable to read header\n");
27084efe
LD
264 goto out;
265 }
266
267 expected = be32_to_cpu(*(__be32 *) (buf + 2));
268 if (expected > count) {
269 size = -EIO;
270 goto out;
271 }
272
273 if ((size +=
274 recv_data(chip, &buf[TPM_HEADER_SIZE],
275 expected - TPM_HEADER_SIZE)) < expected) {
71ed848f 276 dev_err(chip->pdev, "Unable to read remainder of result\n");
27084efe
LD
277 size = -ETIME;
278 goto out;
279 }
280
fd048866 281 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
78f09cc2 282 &chip->vendor.int_queue, false);
27084efe
LD
283 status = tpm_tis_status(chip);
284 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
71ed848f 285 dev_err(chip->pdev, "Error left over data\n");
27084efe
LD
286 size = -EIO;
287 goto out;
288 }
289
290out:
291 tpm_tis_ready(chip);
292 release_locality(chip, chip->vendor.locality, 0);
293 return size;
294}
295
90ab5ee9 296static bool itpm;
3507d612
RA
297module_param(itpm, bool, 0444);
298MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
299
27084efe
LD
300/*
301 * If interrupts are used (signaled by an irq set in the vendor structure)
302 * tpm.c can skip polling for the data to be available as the interrupt is
303 * waited for here
304 */
9519de3f 305static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
27084efe
LD
306{
307 int rc, status, burstcnt;
308 size_t count = 0;
27084efe
LD
309
310 if (request_locality(chip, 0) < 0)
311 return -EBUSY;
312
313 status = tpm_tis_status(chip);
314 if ((status & TPM_STS_COMMAND_READY) == 0) {
315 tpm_tis_ready(chip);
fd048866 316 if (wait_for_tpm_stat
27084efe 317 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
78f09cc2 318 &chip->vendor.int_queue, false) < 0) {
27084efe
LD
319 rc = -ETIME;
320 goto out_err;
321 }
322 }
323
324 while (count < len - 1) {
325 burstcnt = get_burstcount(chip);
326 for (; burstcnt > 0 && count < len - 1; burstcnt--) {
327 iowrite8(buf[count], chip->vendor.iobase +
328 TPM_DATA_FIFO(chip->vendor.locality));
329 count++;
330 }
331
fd048866 332 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
78f09cc2 333 &chip->vendor.int_queue, false);
27084efe 334 status = tpm_tis_status(chip);
3507d612 335 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
27084efe
LD
336 rc = -EIO;
337 goto out_err;
338 }
339 }
340
341 /* write last byte */
342 iowrite8(buf[count],
9519de3f 343 chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality));
fd048866 344 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
78f09cc2 345 &chip->vendor.int_queue, false);
27084efe
LD
346 status = tpm_tis_status(chip);
347 if ((status & TPM_STS_DATA_EXPECT) != 0) {
348 rc = -EIO;
349 goto out_err;
350 }
351
9519de3f
SB
352 return 0;
353
354out_err:
355 tpm_tis_ready(chip);
356 release_locality(chip, chip->vendor.locality, 0);
357 return rc;
358}
359
448e9c55
SD
360static void disable_interrupts(struct tpm_chip *chip)
361{
362 u32 intmask;
363
364 intmask =
365 ioread32(chip->vendor.iobase +
366 TPM_INT_ENABLE(chip->vendor.locality));
367 intmask &= ~TPM_GLOBAL_INT_ENABLE;
368 iowrite32(intmask,
369 chip->vendor.iobase +
370 TPM_INT_ENABLE(chip->vendor.locality));
727f28b8 371 devm_free_irq(chip->pdev, chip->vendor.irq, chip);
448e9c55
SD
372 chip->vendor.irq = 0;
373}
374
9519de3f
SB
375/*
376 * If interrupts are used (signaled by an irq set in the vendor structure)
377 * tpm.c can skip polling for the data to be available as the interrupt is
378 * waited for here
379 */
448e9c55 380static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
9519de3f
SB
381{
382 int rc;
383 u32 ordinal;
aec04cbd 384 unsigned long dur;
9519de3f
SB
385
386 rc = tpm_tis_send_data(chip, buf, len);
387 if (rc < 0)
388 return rc;
389
27084efe
LD
390 /* go and do it */
391 iowrite8(TPM_STS_GO,
392 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
393
394 if (chip->vendor.irq) {
395 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
aec04cbd
JS
396
397 if (chip->flags & TPM_CHIP_FLAG_TPM2)
398 dur = tpm2_calc_ordinal_duration(chip, ordinal);
399 else
400 dur = tpm_calc_ordinal_duration(chip, ordinal);
401
fd048866 402 if (wait_for_tpm_stat
aec04cbd 403 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
78f09cc2 404 &chip->vendor.read_queue, false) < 0) {
27084efe
LD
405 rc = -ETIME;
406 goto out_err;
407 }
408 }
409 return len;
410out_err:
411 tpm_tis_ready(chip);
412 release_locality(chip, chip->vendor.locality, 0);
413 return rc;
414}
415
448e9c55
SD
416static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
417{
418 int rc, irq;
419 struct priv_data *priv = chip->vendor.priv;
420
421 if (!chip->vendor.irq || priv->irq_tested)
422 return tpm_tis_send_main(chip, buf, len);
423
424 /* Verify receipt of the expected IRQ */
425 irq = chip->vendor.irq;
426 chip->vendor.irq = 0;
427 rc = tpm_tis_send_main(chip, buf, len);
428 chip->vendor.irq = irq;
429 if (!priv->irq_tested)
430 msleep(1);
e3837e74 431 if (!priv->irq_tested)
448e9c55 432 disable_interrupts(chip);
448e9c55
SD
433 priv->irq_tested = true;
434 return rc;
435}
436
8e54caf4
JG
437struct tis_vendor_timeout_override {
438 u32 did_vid;
439 unsigned long timeout_us[4];
440};
441
442static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
443 /* Atmel 3204 */
444 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
445 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
446};
447
448static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
449 unsigned long *timeout_cap)
450{
451 int i;
452 u32 did_vid;
453
454 did_vid = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
455
456 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
457 if (vendor_timeout_overrides[i].did_vid != did_vid)
458 continue;
459 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
460 sizeof(vendor_timeout_overrides[i].timeout_us));
461 return true;
462 }
463
464 return false;
465}
466
9519de3f
SB
467/*
468 * Early probing for iTPM with STS_DATA_EXPECT flaw.
469 * Try sending command without itpm flag set and if that
470 * fails, repeat with itpm flag set.
471 */
472static int probe_itpm(struct tpm_chip *chip)
473{
474 int rc = 0;
475 u8 cmd_getticks[] = {
476 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
477 0x00, 0x00, 0x00, 0xf1
478 };
479 size_t len = sizeof(cmd_getticks);
968de8e2 480 bool rem_itpm = itpm;
4e401fb0
SB
481 u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0));
482
483 /* probe only iTPMS */
484 if (vendor != TPM_VID_INTEL)
485 return 0;
9519de3f 486
73249695 487 itpm = false;
9519de3f
SB
488
489 rc = tpm_tis_send_data(chip, cmd_getticks, len);
490 if (rc == 0)
491 goto out;
492
493 tpm_tis_ready(chip);
494 release_locality(chip, chip->vendor.locality, 0);
495
73249695 496 itpm = true;
9519de3f
SB
497
498 rc = tpm_tis_send_data(chip, cmd_getticks, len);
499 if (rc == 0) {
71ed848f 500 dev_info(chip->pdev, "Detected an iTPM.\n");
9519de3f
SB
501 rc = 1;
502 } else
503 rc = -EFAULT;
504
505out:
506 itpm = rem_itpm;
507 tpm_tis_ready(chip);
508 release_locality(chip, chip->vendor.locality, 0);
509
510 return rc;
511}
512
1f866057
SB
513static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
514{
515 switch (chip->vendor.manufacturer_id) {
516 case TPM_VID_WINBOND:
517 return ((status == TPM_STS_VALID) ||
518 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
519 case TPM_VID_STM:
520 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
521 default:
522 return (status == TPM_STS_COMMAND_READY);
523 }
524}
525
01ad1fa7 526static const struct tpm_class_ops tpm_tis = {
27084efe
LD
527 .status = tpm_tis_status,
528 .recv = tpm_tis_recv,
529 .send = tpm_tis_send,
530 .cancel = tpm_tis_ready,
8e54caf4 531 .update_timeouts = tpm_tis_update_timeouts,
27084efe
LD
532 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
533 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
1f866057 534 .req_canceled = tpm_tis_req_canceled,
27084efe
LD
535};
536
a6f97b29 537static irqreturn_t tis_int_handler(int dummy, void *dev_id)
27084efe 538{
06efcad0 539 struct tpm_chip *chip = dev_id;
27084efe
LD
540 u32 interrupt;
541 int i;
542
543 interrupt = ioread32(chip->vendor.iobase +
544 TPM_INT_STATUS(chip->vendor.locality));
545
546 if (interrupt == 0)
547 return IRQ_NONE;
548
448e9c55 549 ((struct priv_data *)chip->vendor.priv)->irq_tested = true;
27084efe
LD
550 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
551 wake_up_interruptible(&chip->vendor.read_queue);
552 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
553 for (i = 0; i < 5; i++)
554 if (check_locality(chip, i) >= 0)
555 break;
556 if (interrupt &
557 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
558 TPM_INTF_CMD_READY_INT))
559 wake_up_interruptible(&chip->vendor.int_queue);
560
561 /* Clear interrupts handled with TPM_EOI */
562 iowrite32(interrupt,
563 chip->vendor.iobase +
564 TPM_INT_STATUS(chip->vendor.locality));
cab091ea 565 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
27084efe
LD
566 return IRQ_HANDLED;
567}
568
e3837e74
JG
569/* Register the IRQ and issue a command that will cause an interrupt. If an
570 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
571 * everything and leave in polling mode. Returns 0 on success.
572 */
b8ba1e74
JG
573static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
574 int flags, int irq)
e3837e74
JG
575{
576 struct priv_data *priv = chip->vendor.priv;
577 u8 original_int_vec;
578
b8ba1e74 579 if (devm_request_irq(chip->pdev, irq, tis_int_handler, flags,
e3837e74
JG
580 chip->devname, chip) != 0) {
581 dev_info(chip->pdev, "Unable to request irq: %d for probe\n",
582 irq);
583 return -1;
584 }
585 chip->vendor.irq = irq;
586
587 original_int_vec = ioread8(chip->vendor.iobase +
588 TPM_INT_VECTOR(chip->vendor.locality));
589 iowrite8(irq,
590 chip->vendor.iobase + TPM_INT_VECTOR(chip->vendor.locality));
591
592 /* Clear all existing */
593 iowrite32(ioread32(chip->vendor.iobase +
594 TPM_INT_STATUS(chip->vendor.locality)),
595 chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
596
597 /* Turn on */
598 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
599 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
600
601 priv->irq_tested = false;
602
603 /* Generate an interrupt by having the core call through to
604 * tpm_tis_send
605 */
606 if (chip->flags & TPM_CHIP_FLAG_TPM2)
607 tpm2_gen_interrupt(chip);
608 else
609 tpm_gen_interrupt(chip);
610
611 /* tpm_tis_send will either confirm the interrupt is working or it
612 * will call disable_irq which undoes all of the above.
613 */
614 if (!chip->vendor.irq) {
615 iowrite8(original_int_vec,
616 chip->vendor.iobase +
617 TPM_INT_VECTOR(chip->vendor.locality));
618 return 1;
619 }
620
621 return 0;
622}
623
624/* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
625 * do not have ACPI/etc. We typically expect the interrupt to be declared if
626 * present.
627 */
628static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
629{
630 u8 original_int_vec;
631 int i;
632
633 original_int_vec = ioread8(chip->vendor.iobase +
634 TPM_INT_VECTOR(chip->vendor.locality));
635
636 if (!original_int_vec) {
b8ba1e74
JG
637 if (IS_ENABLED(CONFIG_X86))
638 for (i = 3; i <= 15; i++)
639 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
640 i))
641 return;
642 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
643 original_int_vec))
e3837e74
JG
644 return;
645}
646
73249695 647static bool interrupts = true;
57135568
KJH
648module_param(interrupts, bool, 0444);
649MODULE_PARM_DESC(interrupts, "Enable interrupts");
650
afb5abc2
JS
651static void tpm_tis_remove(struct tpm_chip *chip)
652{
74d6b3ce
JS
653 if (chip->flags & TPM_CHIP_FLAG_TPM2)
654 tpm2_shutdown(chip, TPM2_SU_CLEAR);
655
afb5abc2
JS
656 iowrite32(~TPM_GLOBAL_INT_ENABLE &
657 ioread32(chip->vendor.iobase +
658 TPM_INT_ENABLE(chip->vendor.
659 locality)),
660 chip->vendor.iobase +
661 TPM_INT_ENABLE(chip->vendor.locality));
662 release_locality(chip, chip->vendor.locality, 1);
663}
664
399235dc
JS
665static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
666 acpi_handle acpi_dev_handle)
27084efe
LD
667{
668 u32 vendor, intfcaps, intmask;
e3837e74 669 int rc, probe;
27084efe 670 struct tpm_chip *chip;
448e9c55 671 struct priv_data *priv;
27084efe 672
448e9c55
SD
673 priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
674 if (priv == NULL)
675 return -ENOMEM;
afb5abc2
JS
676
677 chip = tpmm_chip_alloc(dev, &tpm_tis);
678 if (IS_ERR(chip))
679 return PTR_ERR(chip);
680
448e9c55 681 chip->vendor.priv = priv;
aec04cbd 682#ifdef CONFIG_ACPI
0dc55365 683 chip->acpi_dev_handle = acpi_dev_handle;
aec04cbd 684#endif
27084efe 685
51dd43df
JG
686 chip->vendor.iobase = devm_ioremap_resource(dev, &tpm_info->res);
687 if (IS_ERR(chip->vendor.iobase))
688 return PTR_ERR(chip->vendor.iobase);
27084efe 689
aec04cbd
JS
690 /* Maximum timeouts */
691 chip->vendor.timeout_a = TIS_TIMEOUT_A_MAX;
692 chip->vendor.timeout_b = TIS_TIMEOUT_B_MAX;
693 chip->vendor.timeout_c = TIS_TIMEOUT_C_MAX;
694 chip->vendor.timeout_d = TIS_TIMEOUT_D_MAX;
ec579358 695
7240b983
JG
696 if (wait_startup(chip, 0) != 0) {
697 rc = -ENODEV;
698 goto out_err;
699 }
700
036bb38f
JG
701 /* Take control of the TPM's interrupt hardware and shut it off */
702 intmask = ioread32(chip->vendor.iobase +
703 TPM_INT_ENABLE(chip->vendor.locality));
704 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
705 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
706 intmask &= ~TPM_GLOBAL_INT_ENABLE;
707 iowrite32(intmask,
708 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
709
05a462af
MS
710 if (request_locality(chip, 0) != 0) {
711 rc = -ENODEV;
712 goto out_err;
713 }
714
4d5f2051
JS
715 rc = tpm2_probe(chip);
716 if (rc)
717 goto out_err;
aec04cbd 718
27084efe 719 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
3e3a5e90 720 chip->vendor.manufacturer_id = vendor;
27084efe 721
aec04cbd
JS
722 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
723 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
27084efe
LD
724 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
725
9519de3f 726 if (!itpm) {
968de8e2
SB
727 probe = probe_itpm(chip);
728 if (probe < 0) {
9519de3f
SB
729 rc = -ENODEV;
730 goto out_err;
731 }
73249695 732 itpm = !!probe;
9519de3f
SB
733 }
734
3507d612
RA
735 if (itpm)
736 dev_info(dev, "Intel iTPM workaround enabled\n");
737
738
27084efe
LD
739 /* Figure out the capabilities */
740 intfcaps =
741 ioread32(chip->vendor.iobase +
742 TPM_INTF_CAPS(chip->vendor.locality));
9e323d3e 743 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
27084efe
LD
744 intfcaps);
745 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
9e323d3e 746 dev_dbg(dev, "\tBurst Count Static\n");
27084efe 747 if (intfcaps & TPM_INTF_CMD_READY_INT)
9e323d3e 748 dev_dbg(dev, "\tCommand Ready Int Support\n");
27084efe 749 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
9e323d3e 750 dev_dbg(dev, "\tInterrupt Edge Falling\n");
27084efe 751 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
9e323d3e 752 dev_dbg(dev, "\tInterrupt Edge Rising\n");
27084efe 753 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
9e323d3e 754 dev_dbg(dev, "\tInterrupt Level Low\n");
27084efe 755 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
9e323d3e 756 dev_dbg(dev, "\tInterrupt Level High\n");
27084efe 757 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
9e323d3e 758 dev_dbg(dev, "\tLocality Change Int Support\n");
27084efe 759 if (intfcaps & TPM_INTF_STS_VALID_INT)
9e323d3e 760 dev_dbg(dev, "\tSts Valid Int Support\n");
27084efe 761 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
9e323d3e 762 dev_dbg(dev, "\tData Avail Int Support\n");
27084efe 763
25112048
JG
764 /* Very early on issue a command to the TPM in polling mode to make
765 * sure it works. May as well use that command to set the proper
766 * timeouts for the driver.
767 */
768 if (tpm_get_timeouts(chip)) {
769 dev_err(dev, "Could not get TPM timeouts and durations\n");
770 rc = -ENODEV;
771 goto out_err;
772 }
773
27084efe
LD
774 /* INTERRUPT Setup */
775 init_waitqueue_head(&chip->vendor.read_queue);
776 init_waitqueue_head(&chip->vendor.int_queue);
ef7b81dc 777 if (interrupts && tpm_info->irq != -1) {
e3837e74 778 if (tpm_info->irq) {
b8ba1e74
JG
779 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
780 tpm_info->irq);
e3837e74
JG
781 if (!chip->vendor.irq)
782 dev_err(chip->pdev, FW_BUG
783 "TPM interrupt not working, polling instead\n");
784 } else
785 tpm_tis_probe_irq(chip, intmask);
25112048 786 }
aec04cbd 787
25112048 788 if (chip->flags & TPM_CHIP_FLAG_TPM2) {
aec04cbd
JS
789 rc = tpm2_do_selftest(chip);
790 if (rc == TPM2_RC_INITIALIZE) {
791 dev_warn(dev, "Firmware has not started TPM\n");
792 rc = tpm2_startup(chip, TPM2_SU_CLEAR);
793 if (!rc)
794 rc = tpm2_do_selftest(chip);
795 }
448e9c55 796
aec04cbd
JS
797 if (rc) {
798 dev_err(dev, "TPM self test failed\n");
799 if (rc > 0)
800 rc = -ENODEV;
801 goto out_err;
802 }
803 } else {
aec04cbd
JS
804 if (tpm_do_selftest(chip)) {
805 dev_err(dev, "TPM self test failed\n");
806 rc = -ENODEV;
807 goto out_err;
808 }
448e9c55
SD
809 }
810
afb5abc2 811 return tpm_chip_register(chip);
27084efe 812out_err:
afb5abc2 813 tpm_tis_remove(chip);
27084efe
LD
814 return rc;
815}
96854310 816
2cb6d646 817#ifdef CONFIG_PM_SLEEP
96854310
SB
818static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
819{
820 u32 intmask;
821
822 /* reenable interrupts that device may have lost or
823 BIOS/firmware may have disabled */
824 iowrite8(chip->vendor.irq, chip->vendor.iobase +
825 TPM_INT_VECTOR(chip->vendor.locality));
826
827 intmask =
828 ioread32(chip->vendor.iobase +
829 TPM_INT_ENABLE(chip->vendor.locality));
830
831 intmask |= TPM_INTF_CMD_READY_INT
832 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
833 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
834
835 iowrite32(intmask,
836 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
837}
96854310 838
a2fa3fb0
SK
839static int tpm_tis_resume(struct device *dev)
840{
841 struct tpm_chip *chip = dev_get_drvdata(dev);
74d6b3ce 842 int ret;
a2fa3fb0
SK
843
844 if (chip->vendor.irq)
845 tpm_tis_reenable_interrupts(chip);
846
74d6b3ce
JS
847 ret = tpm_pm_resume(dev);
848 if (ret)
849 return ret;
aec04cbd 850
74d6b3ce
JS
851 /* TPM 1.2 requires self-test on resume. This function actually returns
852 * an error code but for unknown reason it isn't handled.
853 */
854 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
855 tpm_do_selftest(chip);
a2fa3fb0 856
74d6b3ce 857 return 0;
a2fa3fb0 858}
2cb6d646 859#endif
a2fa3fb0
SK
860
861static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume);
862
afc6d369 863static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
ef7b81dc 864 const struct pnp_device_id *pnp_id)
9e323d3e 865{
ef7b81dc 866 struct tpm_info tpm_info = {};
0dc55365 867 acpi_handle acpi_dev_handle = NULL;
51dd43df 868 struct resource *res;
7917ff9a 869
51dd43df
JG
870 res = pnp_get_resource(pnp_dev, IORESOURCE_MEM, 0);
871 if (!res)
872 return -ENODEV;
873 tpm_info.res = *res;
9e323d3e 874
7917ff9a 875 if (pnp_irq_valid(pnp_dev, 0))
399235dc 876 tpm_info.irq = pnp_irq(pnp_dev, 0);
7917ff9a 877 else
ef7b81dc 878 tpm_info.irq = -1;
7917ff9a 879
399235dc
JS
880 if (pnp_acpi_device(pnp_dev)) {
881 if (is_itpm(pnp_acpi_device(pnp_dev)))
882 itpm = true;
883
00194826 884 acpi_dev_handle = ACPI_HANDLE(&pnp_dev->dev);
399235dc 885 }
0dc55365 886
399235dc 887 return tpm_tis_init(&pnp_dev->dev, &tpm_info, acpi_dev_handle);
9e323d3e
KJH
888}
889
0bbed20e 890static struct pnp_device_id tpm_pnp_tbl[] = {
27084efe 891 {"PNP0C31", 0}, /* TPM */
93e1b7d4
KJH
892 {"ATM1200", 0}, /* Atmel */
893 {"IFX0102", 0}, /* Infineon */
894 {"BCM0101", 0}, /* Broadcom */
061991ec 895 {"BCM0102", 0}, /* Broadcom */
93e1b7d4 896 {"NSC1200", 0}, /* National */
fb0e7e11 897 {"ICO0102", 0}, /* Intel */
93e1b7d4
KJH
898 /* Add new here */
899 {"", 0}, /* User Specified */
900 {"", 0} /* Terminator */
27084efe 901};
31bde71c 902MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
27084efe 903
39af33fc 904static void tpm_tis_pnp_remove(struct pnp_dev *dev)
253115b7
RA
905{
906 struct tpm_chip *chip = pnp_get_drvdata(dev);
399235dc 907
afb5abc2
JS
908 tpm_chip_unregister(chip);
909 tpm_tis_remove(chip);
253115b7
RA
910}
911
27084efe
LD
912static struct pnp_driver tis_pnp_driver = {
913 .name = "tpm_tis",
914 .id_table = tpm_pnp_tbl,
915 .probe = tpm_tis_pnp_init,
253115b7 916 .remove = tpm_tis_pnp_remove,
a2fa3fb0
SK
917 .driver = {
918 .pm = &tpm_tis_pm,
919 },
27084efe
LD
920};
921
93e1b7d4
KJH
922#define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
923module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
924 sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
925MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
7a192ec3 926
399235dc
JS
927#ifdef CONFIG_ACPI
928static int tpm_check_resource(struct acpi_resource *ares, void *data)
929{
930 struct tpm_info *tpm_info = (struct tpm_info *) data;
931 struct resource res;
932
51dd43df 933 if (acpi_dev_resource_interrupt(ares, 0, &res))
399235dc 934 tpm_info->irq = res.start;
30f9c8c9 935 else if (acpi_dev_resource_memory(ares, &res)) {
51dd43df 936 tpm_info->res = res;
30f9c8c9
JS
937 tpm_info->res.name = NULL;
938 }
399235dc
JS
939
940 return 1;
941}
942
943static int tpm_tis_acpi_init(struct acpi_device *acpi_dev)
944{
4d627e67
JG
945 struct acpi_table_tpm2 *tbl;
946 acpi_status st;
399235dc 947 struct list_head resources;
4d627e67 948 struct tpm_info tpm_info = {};
399235dc
JS
949 int ret;
950
4d627e67
JG
951 st = acpi_get_table(ACPI_SIG_TPM2, 1,
952 (struct acpi_table_header **) &tbl);
953 if (ACPI_FAILURE(st) || tbl->header.length < sizeof(*tbl)) {
954 dev_err(&acpi_dev->dev,
955 FW_BUG "failed to get TPM2 ACPI table\n");
956 return -EINVAL;
957 }
958
959 if (tbl->start_method != ACPI_TPM2_MEMORY_MAPPED)
399235dc
JS
960 return -ENODEV;
961
962 INIT_LIST_HEAD(&resources);
ef7b81dc 963 tpm_info.irq = -1;
399235dc
JS
964 ret = acpi_dev_get_resources(acpi_dev, &resources, tpm_check_resource,
965 &tpm_info);
966 if (ret < 0)
967 return ret;
968
969 acpi_dev_free_resource_list(&resources);
970
51dd43df 971 if (resource_type(&tpm_info.res) != IORESOURCE_MEM) {
4d627e67
JG
972 dev_err(&acpi_dev->dev,
973 FW_BUG "TPM2 ACPI table does not define a memory resource\n");
974 return -EINVAL;
975 }
976
399235dc
JS
977 if (is_itpm(acpi_dev))
978 itpm = true;
979
980 return tpm_tis_init(&acpi_dev->dev, &tpm_info, acpi_dev->handle);
981}
982
983static int tpm_tis_acpi_remove(struct acpi_device *dev)
984{
985 struct tpm_chip *chip = dev_get_drvdata(&dev->dev);
986
987 tpm_chip_unregister(chip);
988 tpm_tis_remove(chip);
989
990 return 0;
991}
992
993static struct acpi_device_id tpm_acpi_tbl[] = {
994 {"MSFT0101", 0}, /* TPM 2.0 */
995 /* Add new here */
996 {"", 0}, /* User Specified */
997 {"", 0} /* Terminator */
998};
999MODULE_DEVICE_TABLE(acpi, tpm_acpi_tbl);
1000
1001static struct acpi_driver tis_acpi_driver = {
1002 .name = "tpm_tis",
1003 .ids = tpm_acpi_tbl,
1004 .ops = {
1005 .add = tpm_tis_acpi_init,
1006 .remove = tpm_tis_acpi_remove,
1007 },
1008 .drv = {
1009 .pm = &tpm_tis_pm,
1010 },
1011};
1012#endif
1013
00194826
JG
1014static struct platform_device *force_pdev;
1015
1016static int tpm_tis_plat_probe(struct platform_device *pdev)
1017{
1018 struct tpm_info tpm_info = {};
1019 struct resource *res;
1020
1021 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1022 if (res == NULL) {
1023 dev_err(&pdev->dev, "no memory resource defined\n");
1024 return -ENODEV;
1025 }
1026 tpm_info.res = *res;
1027
1028 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1029 if (res) {
1030 tpm_info.irq = res->start;
1031 } else {
1032 if (pdev == force_pdev)
1033 tpm_info.irq = -1;
1034 else
1035 /* When forcing auto probe the IRQ */
1036 tpm_info.irq = 0;
1037 }
1038
1039 return tpm_tis_init(&pdev->dev, &tpm_info, NULL);
1040}
1041
1042static int tpm_tis_plat_remove(struct platform_device *pdev)
1043{
1044 struct tpm_chip *chip = dev_get_drvdata(&pdev->dev);
1045
1046 tpm_chip_unregister(chip);
1047 tpm_tis_remove(chip);
1048
1049 return 0;
1050}
1051
7a192ec3 1052static struct platform_driver tis_drv = {
00194826
JG
1053 .probe = tpm_tis_plat_probe,
1054 .remove = tpm_tis_plat_remove,
7a192ec3 1055 .driver = {
afb5abc2 1056 .name = "tpm_tis",
b633f050 1057 .pm = &tpm_tis_pm,
7a192ec3 1058 },
9e323d3e
KJH
1059};
1060
90ab5ee9 1061static bool force;
00194826 1062#ifdef CONFIG_X86
9e323d3e
KJH
1063module_param(force, bool, 0444);
1064MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
00194826
JG
1065#endif
1066
1067static int tpm_tis_force_device(void)
1068{
1069 struct platform_device *pdev;
1070 static const struct resource x86_resources[] = {
1071 {
1072 .start = 0xFED40000,
1073 .end = 0xFED40000 + TIS_MEM_LEN - 1,
1074 .flags = IORESOURCE_MEM,
1075 },
1076 };
1077
1078 if (!force)
1079 return 0;
1080
1081 /* The driver core will match the name tpm_tis of the device to
1082 * the tpm_tis platform driver and complete the setup via
1083 * tpm_tis_plat_probe
1084 */
1085 pdev = platform_device_register_simple("tpm_tis", -1, x86_resources,
1086 ARRAY_SIZE(x86_resources));
1087 if (IS_ERR(pdev))
1088 return PTR_ERR(pdev);
1089 force_pdev = pdev;
1090
1091 return 0;
1092}
1093
27084efe
LD
1094static int __init init_tis(void)
1095{
9e323d3e 1096 int rc;
00194826
JG
1097
1098 rc = tpm_tis_force_device();
1099 if (rc)
1100 goto err_force;
1101
1102 rc = platform_driver_register(&tis_drv);
1103 if (rc)
1104 goto err_platform;
1105
399235dc 1106#ifdef CONFIG_ACPI
00194826
JG
1107 rc = acpi_bus_register_driver(&tis_acpi_driver);
1108 if (rc)
1109 goto err_acpi;
399235dc 1110#endif
9e323d3e 1111
00194826
JG
1112 if (IS_ENABLED(CONFIG_PNP)) {
1113 rc = pnp_register_driver(&tis_pnp_driver);
1114 if (rc)
1115 goto err_pnp;
9e323d3e 1116 }
00194826 1117
4fba3c3b 1118 return 0;
00194826
JG
1119
1120err_pnp:
1121#ifdef CONFIG_ACPI
1122 acpi_bus_unregister_driver(&tis_acpi_driver);
1123err_acpi:
1124#endif
1125 platform_device_unregister(force_pdev);
1126err_platform:
1127 if (force_pdev)
1128 platform_device_unregister(force_pdev);
1129err_force:
7f2ab000 1130 return rc;
27084efe
LD
1131}
1132
1133static void __exit cleanup_tis(void)
1134{
00194826 1135 pnp_unregister_driver(&tis_pnp_driver);
399235dc 1136#ifdef CONFIG_ACPI
00194826 1137 acpi_bus_unregister_driver(&tis_acpi_driver);
7f2ab000 1138#endif
7f2ab000 1139 platform_driver_unregister(&tis_drv);
00194826
JG
1140
1141 if (force_pdev)
1142 platform_device_unregister(force_pdev);
27084efe
LD
1143}
1144
1145module_init(init_tis);
1146module_exit(cleanup_tis);
1147MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
1148MODULE_DESCRIPTION("TPM Driver");
1149MODULE_VERSION("2.0");
1150MODULE_LICENSE("GPL");