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9e5935c0 WY |
1 | /* |
2 | * Copyright (C) 2016 Atmel Corporation | |
3 | * Wenyou.Yang <wenyou.yang@atmel.com> | |
4 | * | |
5 | * SPDX-License-Identifier: GPL-2.0+ | |
6 | */ | |
7 | ||
8 | #include <common.h> | |
9 | #include <clk-uclass.h> | |
10 | #include <dm/device.h> | |
11 | ||
12 | static int at91_slow_clk_enable(struct clk *clk) | |
13 | { | |
14 | return 0; | |
15 | } | |
16 | ||
17 | static ulong at91_slow_clk_get_rate(struct clk *clk) | |
18 | { | |
19 | return CONFIG_SYS_AT91_SLOW_CLOCK; | |
20 | } | |
21 | ||
22 | static struct clk_ops at91_slow_clk_ops = { | |
23 | .enable = at91_slow_clk_enable, | |
24 | .get_rate = at91_slow_clk_get_rate, | |
25 | }; | |
26 | ||
27 | static const struct udevice_id at91_slow_clk_match[] = { | |
28 | { .compatible = "atmel,at91sam9x5-clk-slow" }, | |
29 | {} | |
30 | }; | |
31 | ||
32 | U_BOOT_DRIVER(at91_slow_clk) = { | |
33 | .name = "at91-slow-clk", | |
34 | .id = UCLASS_CLK, | |
35 | .of_match = at91_slow_clk_match, | |
36 | .ops = &at91_slow_clk_ops, | |
37 | }; |