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[thirdparty/kernel/stable.git] / drivers / clk / clk.c
CommitLineData
ebafb63d 1// SPDX-License-Identifier: GPL-2.0
b2476490
MT
2/*
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
5 *
5fb94e9c 6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
b2476490
MT
7 */
8
3c373117 9#include <linux/clk.h>
b09d6d99 10#include <linux/clk-provider.h>
86be408b 11#include <linux/clk/clk-conf.h>
b2476490
MT
12#include <linux/module.h>
13#include <linux/mutex.h>
14#include <linux/spinlock.h>
15#include <linux/err.h>
16#include <linux/list.h>
17#include <linux/slab.h>
766e6a4e 18#include <linux/of.h>
46c8773a 19#include <linux/device.h>
f2f6c255 20#include <linux/init.h>
9a34b453 21#include <linux/pm_runtime.h>
533ddeb1 22#include <linux/sched.h>
562ef0b0 23#include <linux/clkdev.h>
b2476490 24
d6782c26
SN
25#include "clk.h"
26
b2476490
MT
27static DEFINE_SPINLOCK(enable_lock);
28static DEFINE_MUTEX(prepare_lock);
29
533ddeb1
MT
30static struct task_struct *prepare_owner;
31static struct task_struct *enable_owner;
32
33static int prepare_refcnt;
34static int enable_refcnt;
35
b2476490
MT
36static HLIST_HEAD(clk_root_list);
37static HLIST_HEAD(clk_orphan_list);
38static LIST_HEAD(clk_notifier_list);
39
b09d6d99
MT
40/*** private data structures ***/
41
42struct clk_core {
43 const char *name;
44 const struct clk_ops *ops;
45 struct clk_hw *hw;
46 struct module *owner;
9a34b453 47 struct device *dev;
b09d6d99
MT
48 struct clk_core *parent;
49 const char **parent_names;
50 struct clk_core **parents;
51 u8 num_parents;
52 u8 new_parent_index;
53 unsigned long rate;
1c8e6004 54 unsigned long req_rate;
b09d6d99
MT
55 unsigned long new_rate;
56 struct clk_core *new_parent;
57 struct clk_core *new_child;
58 unsigned long flags;
e6500344 59 bool orphan;
24478839 60 bool rpm_enabled;
b09d6d99
MT
61 unsigned int enable_count;
62 unsigned int prepare_count;
e55a839a 63 unsigned int protect_count;
9783c0d9
SB
64 unsigned long min_rate;
65 unsigned long max_rate;
b09d6d99
MT
66 unsigned long accuracy;
67 int phase;
9fba738a 68 struct clk_duty duty;
b09d6d99
MT
69 struct hlist_head children;
70 struct hlist_node child_node;
1c8e6004 71 struct hlist_head clks;
b09d6d99
MT
72 unsigned int notifier_count;
73#ifdef CONFIG_DEBUG_FS
74 struct dentry *dentry;
8c9a8a8f 75 struct hlist_node debug_node;
b09d6d99
MT
76#endif
77 struct kref ref;
78};
79
dfc202ea
SB
80#define CREATE_TRACE_POINTS
81#include <trace/events/clk.h>
82
b09d6d99
MT
83struct clk {
84 struct clk_core *core;
efa85048 85 struct device *dev;
b09d6d99
MT
86 const char *dev_id;
87 const char *con_id;
1c8e6004
TV
88 unsigned long min_rate;
89 unsigned long max_rate;
55e9b8b7 90 unsigned int exclusive_count;
50595f8b 91 struct hlist_node clks_node;
b09d6d99
MT
92};
93
9a34b453
MS
94/*** runtime pm ***/
95static int clk_pm_runtime_get(struct clk_core *core)
96{
24478839 97 int ret;
9a34b453 98
24478839 99 if (!core->rpm_enabled)
9a34b453
MS
100 return 0;
101
102 ret = pm_runtime_get_sync(core->dev);
103 return ret < 0 ? ret : 0;
104}
105
106static void clk_pm_runtime_put(struct clk_core *core)
107{
24478839 108 if (!core->rpm_enabled)
9a34b453
MS
109 return;
110
111 pm_runtime_put_sync(core->dev);
112}
113
eab89f69
MT
114/*** locking ***/
115static void clk_prepare_lock(void)
116{
533ddeb1
MT
117 if (!mutex_trylock(&prepare_lock)) {
118 if (prepare_owner == current) {
119 prepare_refcnt++;
120 return;
121 }
122 mutex_lock(&prepare_lock);
123 }
124 WARN_ON_ONCE(prepare_owner != NULL);
125 WARN_ON_ONCE(prepare_refcnt != 0);
126 prepare_owner = current;
127 prepare_refcnt = 1;
eab89f69
MT
128}
129
130static void clk_prepare_unlock(void)
131{
533ddeb1
MT
132 WARN_ON_ONCE(prepare_owner != current);
133 WARN_ON_ONCE(prepare_refcnt == 0);
134
135 if (--prepare_refcnt)
136 return;
137 prepare_owner = NULL;
eab89f69
MT
138 mutex_unlock(&prepare_lock);
139}
140
141static unsigned long clk_enable_lock(void)
a57aa185 142 __acquires(enable_lock)
eab89f69
MT
143{
144 unsigned long flags;
533ddeb1 145
a12aa8a6
DL
146 /*
147 * On UP systems, spin_trylock_irqsave() always returns true, even if
148 * we already hold the lock. So, in that case, we rely only on
149 * reference counting.
150 */
151 if (!IS_ENABLED(CONFIG_SMP) ||
152 !spin_trylock_irqsave(&enable_lock, flags)) {
533ddeb1
MT
153 if (enable_owner == current) {
154 enable_refcnt++;
a57aa185 155 __acquire(enable_lock);
a12aa8a6
DL
156 if (!IS_ENABLED(CONFIG_SMP))
157 local_save_flags(flags);
533ddeb1
MT
158 return flags;
159 }
160 spin_lock_irqsave(&enable_lock, flags);
161 }
162 WARN_ON_ONCE(enable_owner != NULL);
163 WARN_ON_ONCE(enable_refcnt != 0);
164 enable_owner = current;
165 enable_refcnt = 1;
eab89f69
MT
166 return flags;
167}
168
169static void clk_enable_unlock(unsigned long flags)
a57aa185 170 __releases(enable_lock)
eab89f69 171{
533ddeb1
MT
172 WARN_ON_ONCE(enable_owner != current);
173 WARN_ON_ONCE(enable_refcnt == 0);
174
a57aa185
SB
175 if (--enable_refcnt) {
176 __release(enable_lock);
533ddeb1 177 return;
a57aa185 178 }
533ddeb1 179 enable_owner = NULL;
eab89f69
MT
180 spin_unlock_irqrestore(&enable_lock, flags);
181}
182
e55a839a
JB
183static bool clk_core_rate_is_protected(struct clk_core *core)
184{
185 return core->protect_count;
186}
187
4dff95dc
SB
188static bool clk_core_is_prepared(struct clk_core *core)
189{
9a34b453
MS
190 bool ret = false;
191
4dff95dc
SB
192 /*
193 * .is_prepared is optional for clocks that can prepare
194 * fall back to software usage counter if it is missing
195 */
196 if (!core->ops->is_prepared)
197 return core->prepare_count;
b2476490 198
9a34b453
MS
199 if (!clk_pm_runtime_get(core)) {
200 ret = core->ops->is_prepared(core->hw);
201 clk_pm_runtime_put(core);
202 }
203
204 return ret;
4dff95dc 205}
b2476490 206
4dff95dc
SB
207static bool clk_core_is_enabled(struct clk_core *core)
208{
9a34b453
MS
209 bool ret = false;
210
4dff95dc
SB
211 /*
212 * .is_enabled is only mandatory for clocks that gate
213 * fall back to software usage counter if .is_enabled is missing
214 */
215 if (!core->ops->is_enabled)
216 return core->enable_count;
6b44c854 217
9a34b453
MS
218 /*
219 * Check if clock controller's device is runtime active before
220 * calling .is_enabled callback. If not, assume that clock is
221 * disabled, because we might be called from atomic context, from
222 * which pm_runtime_get() is not allowed.
223 * This function is called mainly from clk_disable_unused_subtree,
224 * which ensures proper runtime pm activation of controller before
225 * taking enable spinlock, but the below check is needed if one tries
226 * to call it from other places.
227 */
24478839 228 if (core->rpm_enabled) {
9a34b453
MS
229 pm_runtime_get_noresume(core->dev);
230 if (!pm_runtime_active(core->dev)) {
231 ret = false;
232 goto done;
233 }
234 }
235
236 ret = core->ops->is_enabled(core->hw);
237done:
24478839 238 if (core->rpm_enabled)
756efe13 239 pm_runtime_put(core->dev);
9a34b453
MS
240
241 return ret;
4dff95dc 242}
6b44c854 243
4dff95dc 244/*** helper functions ***/
1af599df 245
b76281cb 246const char *__clk_get_name(const struct clk *clk)
1af599df 247{
4dff95dc 248 return !clk ? NULL : clk->core->name;
1af599df 249}
4dff95dc 250EXPORT_SYMBOL_GPL(__clk_get_name);
1af599df 251
e7df6f6e 252const char *clk_hw_get_name(const struct clk_hw *hw)
1a9c069c
SB
253{
254 return hw->core->name;
255}
256EXPORT_SYMBOL_GPL(clk_hw_get_name);
257
4dff95dc
SB
258struct clk_hw *__clk_get_hw(struct clk *clk)
259{
260 return !clk ? NULL : clk->core->hw;
261}
262EXPORT_SYMBOL_GPL(__clk_get_hw);
1af599df 263
e7df6f6e 264unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
1a9c069c
SB
265{
266 return hw->core->num_parents;
267}
268EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
269
e7df6f6e 270struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
1a9c069c
SB
271{
272 return hw->core->parent ? hw->core->parent->hw : NULL;
273}
274EXPORT_SYMBOL_GPL(clk_hw_get_parent);
275
4dff95dc
SB
276static struct clk_core *__clk_lookup_subtree(const char *name,
277 struct clk_core *core)
bddca894 278{
035a61c3 279 struct clk_core *child;
4dff95dc 280 struct clk_core *ret;
bddca894 281
4dff95dc
SB
282 if (!strcmp(core->name, name))
283 return core;
bddca894 284
4dff95dc
SB
285 hlist_for_each_entry(child, &core->children, child_node) {
286 ret = __clk_lookup_subtree(name, child);
287 if (ret)
288 return ret;
bddca894
PG
289 }
290
4dff95dc 291 return NULL;
bddca894
PG
292}
293
4dff95dc 294static struct clk_core *clk_core_lookup(const char *name)
bddca894 295{
4dff95dc
SB
296 struct clk_core *root_clk;
297 struct clk_core *ret;
bddca894 298
4dff95dc
SB
299 if (!name)
300 return NULL;
bddca894 301
4dff95dc
SB
302 /* search the 'proper' clk tree first */
303 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
304 ret = __clk_lookup_subtree(name, root_clk);
305 if (ret)
306 return ret;
bddca894
PG
307 }
308
4dff95dc
SB
309 /* if not found, then search the orphan tree */
310 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
311 ret = __clk_lookup_subtree(name, root_clk);
312 if (ret)
313 return ret;
314 }
bddca894 315
4dff95dc 316 return NULL;
bddca894
PG
317}
318
4dff95dc
SB
319static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
320 u8 index)
bddca894 321{
4dff95dc
SB
322 if (!core || index >= core->num_parents)
323 return NULL;
88cfbef2
MY
324
325 if (!core->parents[index])
326 core->parents[index] =
327 clk_core_lookup(core->parent_names[index]);
328
329 return core->parents[index];
bddca894
PG
330}
331
e7df6f6e
SB
332struct clk_hw *
333clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
1a9c069c
SB
334{
335 struct clk_core *parent;
336
337 parent = clk_core_get_parent_by_index(hw->core, index);
338
339 return !parent ? NULL : parent->hw;
340}
341EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
342
4dff95dc
SB
343unsigned int __clk_get_enable_count(struct clk *clk)
344{
345 return !clk ? 0 : clk->core->enable_count;
346}
b2476490 347
4dff95dc
SB
348static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
349{
350 unsigned long ret;
b2476490 351
4dff95dc
SB
352 if (!core) {
353 ret = 0;
354 goto out;
355 }
b2476490 356
4dff95dc 357 ret = core->rate;
b2476490 358
47b0eeb3 359 if (!core->num_parents)
4dff95dc 360 goto out;
c646cbf1 361
4dff95dc
SB
362 if (!core->parent)
363 ret = 0;
b2476490 364
b2476490
MT
365out:
366 return ret;
367}
368
e7df6f6e 369unsigned long clk_hw_get_rate(const struct clk_hw *hw)
1a9c069c
SB
370{
371 return clk_core_get_rate_nolock(hw->core);
372}
373EXPORT_SYMBOL_GPL(clk_hw_get_rate);
374
4dff95dc
SB
375static unsigned long __clk_get_accuracy(struct clk_core *core)
376{
377 if (!core)
378 return 0;
b2476490 379
4dff95dc 380 return core->accuracy;
b2476490
MT
381}
382
4dff95dc 383unsigned long __clk_get_flags(struct clk *clk)
fcb0ee6a 384{
4dff95dc 385 return !clk ? 0 : clk->core->flags;
fcb0ee6a 386}
4dff95dc 387EXPORT_SYMBOL_GPL(__clk_get_flags);
fcb0ee6a 388
e7df6f6e 389unsigned long clk_hw_get_flags(const struct clk_hw *hw)
1a9c069c
SB
390{
391 return hw->core->flags;
392}
393EXPORT_SYMBOL_GPL(clk_hw_get_flags);
394
e7df6f6e 395bool clk_hw_is_prepared(const struct clk_hw *hw)
1a9c069c
SB
396{
397 return clk_core_is_prepared(hw->core);
398}
12aa377b 399EXPORT_SYMBOL_GPL(clk_hw_is_prepared);
1a9c069c 400
e55a839a
JB
401bool clk_hw_rate_is_protected(const struct clk_hw *hw)
402{
403 return clk_core_rate_is_protected(hw->core);
404}
12aa377b 405EXPORT_SYMBOL_GPL(clk_hw_rate_is_protected);
e55a839a 406
be68bf88
JE
407bool clk_hw_is_enabled(const struct clk_hw *hw)
408{
409 return clk_core_is_enabled(hw->core);
410}
12aa377b 411EXPORT_SYMBOL_GPL(clk_hw_is_enabled);
be68bf88 412
4dff95dc 413bool __clk_is_enabled(struct clk *clk)
b2476490 414{
4dff95dc
SB
415 if (!clk)
416 return false;
b2476490 417
4dff95dc
SB
418 return clk_core_is_enabled(clk->core);
419}
420EXPORT_SYMBOL_GPL(__clk_is_enabled);
b2476490 421
4dff95dc
SB
422static bool mux_is_better_rate(unsigned long rate, unsigned long now,
423 unsigned long best, unsigned long flags)
424{
425 if (flags & CLK_MUX_ROUND_CLOSEST)
426 return abs(now - rate) < abs(best - rate);
1af599df 427
4dff95dc
SB
428 return now <= rate && now > best;
429}
bddca894 430
4ad69b80
JB
431int clk_mux_determine_rate_flags(struct clk_hw *hw,
432 struct clk_rate_request *req,
433 unsigned long flags)
4dff95dc
SB
434{
435 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
0817b62c
BB
436 int i, num_parents, ret;
437 unsigned long best = 0;
438 struct clk_rate_request parent_req = *req;
b2476490 439
4dff95dc
SB
440 /* if NO_REPARENT flag set, pass through to current parent */
441 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
442 parent = core->parent;
0817b62c
BB
443 if (core->flags & CLK_SET_RATE_PARENT) {
444 ret = __clk_determine_rate(parent ? parent->hw : NULL,
445 &parent_req);
446 if (ret)
447 return ret;
448
449 best = parent_req.rate;
450 } else if (parent) {
4dff95dc 451 best = clk_core_get_rate_nolock(parent);
0817b62c 452 } else {
4dff95dc 453 best = clk_core_get_rate_nolock(core);
0817b62c
BB
454 }
455
4dff95dc
SB
456 goto out;
457 }
b2476490 458
4dff95dc
SB
459 /* find the parent that can provide the fastest rate <= rate */
460 num_parents = core->num_parents;
461 for (i = 0; i < num_parents; i++) {
462 parent = clk_core_get_parent_by_index(core, i);
463 if (!parent)
464 continue;
0817b62c
BB
465
466 if (core->flags & CLK_SET_RATE_PARENT) {
467 parent_req = *req;
468 ret = __clk_determine_rate(parent->hw, &parent_req);
469 if (ret)
470 continue;
471 } else {
472 parent_req.rate = clk_core_get_rate_nolock(parent);
473 }
474
475 if (mux_is_better_rate(req->rate, parent_req.rate,
476 best, flags)) {
4dff95dc 477 best_parent = parent;
0817b62c 478 best = parent_req.rate;
4dff95dc
SB
479 }
480 }
b2476490 481
57d866e6
BB
482 if (!best_parent)
483 return -EINVAL;
484
4dff95dc
SB
485out:
486 if (best_parent)
0817b62c
BB
487 req->best_parent_hw = best_parent->hw;
488 req->best_parent_rate = best;
489 req->rate = best;
b2476490 490
0817b62c 491 return 0;
b33d212f 492}
4ad69b80 493EXPORT_SYMBOL_GPL(clk_mux_determine_rate_flags);
4dff95dc
SB
494
495struct clk *__clk_lookup(const char *name)
fcb0ee6a 496{
4dff95dc
SB
497 struct clk_core *core = clk_core_lookup(name);
498
499 return !core ? NULL : core->hw->clk;
fcb0ee6a 500}
b2476490 501
4dff95dc
SB
502static void clk_core_get_boundaries(struct clk_core *core,
503 unsigned long *min_rate,
504 unsigned long *max_rate)
1c155b3d 505{
4dff95dc 506 struct clk *clk_user;
1c155b3d 507
9783c0d9
SB
508 *min_rate = core->min_rate;
509 *max_rate = core->max_rate;
496eadf8 510
4dff95dc
SB
511 hlist_for_each_entry(clk_user, &core->clks, clks_node)
512 *min_rate = max(*min_rate, clk_user->min_rate);
1c155b3d 513
4dff95dc
SB
514 hlist_for_each_entry(clk_user, &core->clks, clks_node)
515 *max_rate = min(*max_rate, clk_user->max_rate);
516}
1c155b3d 517
9783c0d9
SB
518void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
519 unsigned long max_rate)
520{
521 hw->core->min_rate = min_rate;
522 hw->core->max_rate = max_rate;
523}
524EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
525
4dff95dc
SB
526/*
527 * Helper for finding best parent to provide a given frequency. This can be used
528 * directly as a determine_rate callback (e.g. for a mux), or from a more
529 * complex clock that may combine a mux with other operations.
530 */
0817b62c
BB
531int __clk_mux_determine_rate(struct clk_hw *hw,
532 struct clk_rate_request *req)
4dff95dc 533{
0817b62c 534 return clk_mux_determine_rate_flags(hw, req, 0);
1c155b3d 535}
4dff95dc 536EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
1c155b3d 537
0817b62c
BB
538int __clk_mux_determine_rate_closest(struct clk_hw *hw,
539 struct clk_rate_request *req)
b2476490 540{
0817b62c 541 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
4dff95dc
SB
542}
543EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
b2476490 544
4dff95dc 545/*** clk api ***/
496eadf8 546
e55a839a
JB
547static void clk_core_rate_unprotect(struct clk_core *core)
548{
549 lockdep_assert_held(&prepare_lock);
550
551 if (!core)
552 return;
553
ab525dcc
FE
554 if (WARN(core->protect_count == 0,
555 "%s already unprotected\n", core->name))
e55a839a
JB
556 return;
557
558 if (--core->protect_count > 0)
559 return;
560
561 clk_core_rate_unprotect(core->parent);
562}
563
564static int clk_core_rate_nuke_protect(struct clk_core *core)
565{
566 int ret;
567
568 lockdep_assert_held(&prepare_lock);
569
570 if (!core)
571 return -EINVAL;
572
573 if (core->protect_count == 0)
574 return 0;
575
576 ret = core->protect_count;
577 core->protect_count = 1;
578 clk_core_rate_unprotect(core);
579
580 return ret;
581}
582
55e9b8b7
JB
583/**
584 * clk_rate_exclusive_put - release exclusivity over clock rate control
585 * @clk: the clk over which the exclusivity is released
586 *
587 * clk_rate_exclusive_put() completes a critical section during which a clock
588 * consumer cannot tolerate any other consumer making any operation on the
589 * clock which could result in a rate change or rate glitch. Exclusive clocks
590 * cannot have their rate changed, either directly or indirectly due to changes
591 * further up the parent chain of clocks. As a result, clocks up parent chain
592 * also get under exclusive control of the calling consumer.
593 *
594 * If exlusivity is claimed more than once on clock, even by the same consumer,
595 * the rate effectively gets locked as exclusivity can't be preempted.
596 *
597 * Calls to clk_rate_exclusive_put() must be balanced with calls to
598 * clk_rate_exclusive_get(). Calls to this function may sleep, and do not return
599 * error status.
600 */
601void clk_rate_exclusive_put(struct clk *clk)
602{
603 if (!clk)
604 return;
605
606 clk_prepare_lock();
607
608 /*
609 * if there is something wrong with this consumer protect count, stop
610 * here before messing with the provider
611 */
612 if (WARN_ON(clk->exclusive_count <= 0))
613 goto out;
614
615 clk_core_rate_unprotect(clk->core);
616 clk->exclusive_count--;
617out:
618 clk_prepare_unlock();
619}
620EXPORT_SYMBOL_GPL(clk_rate_exclusive_put);
621
e55a839a
JB
622static void clk_core_rate_protect(struct clk_core *core)
623{
624 lockdep_assert_held(&prepare_lock);
625
626 if (!core)
627 return;
628
629 if (core->protect_count == 0)
630 clk_core_rate_protect(core->parent);
631
632 core->protect_count++;
633}
634
635static void clk_core_rate_restore_protect(struct clk_core *core, int count)
636{
637 lockdep_assert_held(&prepare_lock);
638
639 if (!core)
640 return;
641
642 if (count == 0)
643 return;
644
645 clk_core_rate_protect(core);
646 core->protect_count = count;
647}
648
55e9b8b7
JB
649/**
650 * clk_rate_exclusive_get - get exclusivity over the clk rate control
651 * @clk: the clk over which the exclusity of rate control is requested
652 *
653 * clk_rate_exlusive_get() begins a critical section during which a clock
654 * consumer cannot tolerate any other consumer making any operation on the
655 * clock which could result in a rate change or rate glitch. Exclusive clocks
656 * cannot have their rate changed, either directly or indirectly due to changes
657 * further up the parent chain of clocks. As a result, clocks up parent chain
658 * also get under exclusive control of the calling consumer.
659 *
660 * If exlusivity is claimed more than once on clock, even by the same consumer,
661 * the rate effectively gets locked as exclusivity can't be preempted.
662 *
663 * Calls to clk_rate_exclusive_get() should be balanced with calls to
664 * clk_rate_exclusive_put(). Calls to this function may sleep.
665 * Returns 0 on success, -EERROR otherwise
666 */
667int clk_rate_exclusive_get(struct clk *clk)
668{
669 if (!clk)
670 return 0;
671
672 clk_prepare_lock();
673 clk_core_rate_protect(clk->core);
674 clk->exclusive_count++;
675 clk_prepare_unlock();
676
677 return 0;
678}
679EXPORT_SYMBOL_GPL(clk_rate_exclusive_get);
680
4dff95dc
SB
681static void clk_core_unprepare(struct clk_core *core)
682{
a6334725
SB
683 lockdep_assert_held(&prepare_lock);
684
4dff95dc
SB
685 if (!core)
686 return;
b2476490 687
ab525dcc
FE
688 if (WARN(core->prepare_count == 0,
689 "%s already unprepared\n", core->name))
4dff95dc 690 return;
b2476490 691
ab525dcc
FE
692 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
693 "Unpreparing critical %s\n", core->name))
2e20fbf5
LJ
694 return;
695
9461f7b3
JB
696 if (core->flags & CLK_SET_RATE_GATE)
697 clk_core_rate_unprotect(core);
698
4dff95dc
SB
699 if (--core->prepare_count > 0)
700 return;
b2476490 701
ab525dcc 702 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
b2476490 703
4dff95dc 704 trace_clk_unprepare(core);
b2476490 705
4dff95dc
SB
706 if (core->ops->unprepare)
707 core->ops->unprepare(core->hw);
708
9a34b453
MS
709 clk_pm_runtime_put(core);
710
4dff95dc
SB
711 trace_clk_unprepare_complete(core);
712 clk_core_unprepare(core->parent);
b2476490
MT
713}
714
a6adc30b
DA
715static void clk_core_unprepare_lock(struct clk_core *core)
716{
717 clk_prepare_lock();
718 clk_core_unprepare(core);
719 clk_prepare_unlock();
720}
721
4dff95dc
SB
722/**
723 * clk_unprepare - undo preparation of a clock source
724 * @clk: the clk being unprepared
725 *
726 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
727 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
728 * if the operation may sleep. One example is a clk which is accessed over
729 * I2c. In the complex case a clk gate operation may require a fast and a slow
730 * part. It is this reason that clk_unprepare and clk_disable are not mutually
731 * exclusive. In fact clk_disable must be called before clk_unprepare.
732 */
733void clk_unprepare(struct clk *clk)
1e435256 734{
4dff95dc
SB
735 if (IS_ERR_OR_NULL(clk))
736 return;
737
a6adc30b 738 clk_core_unprepare_lock(clk->core);
1e435256 739}
4dff95dc 740EXPORT_SYMBOL_GPL(clk_unprepare);
1e435256 741
4dff95dc 742static int clk_core_prepare(struct clk_core *core)
b2476490 743{
4dff95dc 744 int ret = 0;
b2476490 745
a6334725
SB
746 lockdep_assert_held(&prepare_lock);
747
4dff95dc 748 if (!core)
1e435256 749 return 0;
1e435256 750
4dff95dc 751 if (core->prepare_count == 0) {
9a34b453 752 ret = clk_pm_runtime_get(core);
4dff95dc
SB
753 if (ret)
754 return ret;
b2476490 755
9a34b453
MS
756 ret = clk_core_prepare(core->parent);
757 if (ret)
758 goto runtime_put;
759
4dff95dc 760 trace_clk_prepare(core);
b2476490 761
4dff95dc
SB
762 if (core->ops->prepare)
763 ret = core->ops->prepare(core->hw);
b2476490 764
4dff95dc 765 trace_clk_prepare_complete(core);
1c155b3d 766
9a34b453
MS
767 if (ret)
768 goto unprepare;
4dff95dc 769 }
1c155b3d 770
4dff95dc 771 core->prepare_count++;
b2476490 772
9461f7b3
JB
773 /*
774 * CLK_SET_RATE_GATE is a special case of clock protection
775 * Instead of a consumer claiming exclusive rate control, it is
776 * actually the provider which prevents any consumer from making any
777 * operation which could result in a rate change or rate glitch while
778 * the clock is prepared.
779 */
780 if (core->flags & CLK_SET_RATE_GATE)
781 clk_core_rate_protect(core);
782
b2476490 783 return 0;
9a34b453
MS
784unprepare:
785 clk_core_unprepare(core->parent);
786runtime_put:
787 clk_pm_runtime_put(core);
788 return ret;
b2476490 789}
b2476490 790
a6adc30b
DA
791static int clk_core_prepare_lock(struct clk_core *core)
792{
793 int ret;
794
795 clk_prepare_lock();
796 ret = clk_core_prepare(core);
797 clk_prepare_unlock();
798
799 return ret;
800}
801
4dff95dc
SB
802/**
803 * clk_prepare - prepare a clock source
804 * @clk: the clk being prepared
805 *
806 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
807 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
808 * operation may sleep. One example is a clk which is accessed over I2c. In
809 * the complex case a clk ungate operation may require a fast and a slow part.
810 * It is this reason that clk_prepare and clk_enable are not mutually
811 * exclusive. In fact clk_prepare must be called before clk_enable.
812 * Returns 0 on success, -EERROR otherwise.
813 */
814int clk_prepare(struct clk *clk)
b2476490 815{
4dff95dc
SB
816 if (!clk)
817 return 0;
b2476490 818
a6adc30b 819 return clk_core_prepare_lock(clk->core);
b2476490 820}
4dff95dc 821EXPORT_SYMBOL_GPL(clk_prepare);
b2476490 822
4dff95dc 823static void clk_core_disable(struct clk_core *core)
b2476490 824{
a6334725
SB
825 lockdep_assert_held(&enable_lock);
826
4dff95dc
SB
827 if (!core)
828 return;
035a61c3 829
ab525dcc 830 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
4dff95dc 831 return;
b2476490 832
ab525dcc
FE
833 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
834 "Disabling critical %s\n", core->name))
2e20fbf5
LJ
835 return;
836
4dff95dc
SB
837 if (--core->enable_count > 0)
838 return;
035a61c3 839
2f87a6ea 840 trace_clk_disable_rcuidle(core);
035a61c3 841
4dff95dc
SB
842 if (core->ops->disable)
843 core->ops->disable(core->hw);
035a61c3 844
2f87a6ea 845 trace_clk_disable_complete_rcuidle(core);
035a61c3 846
4dff95dc 847 clk_core_disable(core->parent);
035a61c3 848}
7ef3dcc8 849
a6adc30b
DA
850static void clk_core_disable_lock(struct clk_core *core)
851{
852 unsigned long flags;
853
854 flags = clk_enable_lock();
855 clk_core_disable(core);
856 clk_enable_unlock(flags);
857}
858
4dff95dc
SB
859/**
860 * clk_disable - gate a clock
861 * @clk: the clk being gated
862 *
863 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
864 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
865 * clk if the operation is fast and will never sleep. One example is a
866 * SoC-internal clk which is controlled via simple register writes. In the
867 * complex case a clk gate operation may require a fast and a slow part. It is
868 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
869 * In fact clk_disable must be called before clk_unprepare.
870 */
871void clk_disable(struct clk *clk)
b2476490 872{
4dff95dc
SB
873 if (IS_ERR_OR_NULL(clk))
874 return;
875
a6adc30b 876 clk_core_disable_lock(clk->core);
b2476490 877}
4dff95dc 878EXPORT_SYMBOL_GPL(clk_disable);
b2476490 879
4dff95dc 880static int clk_core_enable(struct clk_core *core)
b2476490 881{
4dff95dc 882 int ret = 0;
b2476490 883
a6334725
SB
884 lockdep_assert_held(&enable_lock);
885
4dff95dc
SB
886 if (!core)
887 return 0;
b2476490 888
ab525dcc
FE
889 if (WARN(core->prepare_count == 0,
890 "Enabling unprepared %s\n", core->name))
4dff95dc 891 return -ESHUTDOWN;
b2476490 892
4dff95dc
SB
893 if (core->enable_count == 0) {
894 ret = clk_core_enable(core->parent);
b2476490 895
4dff95dc
SB
896 if (ret)
897 return ret;
b2476490 898
f17a0dd1 899 trace_clk_enable_rcuidle(core);
035a61c3 900
4dff95dc
SB
901 if (core->ops->enable)
902 ret = core->ops->enable(core->hw);
035a61c3 903
f17a0dd1 904 trace_clk_enable_complete_rcuidle(core);
4dff95dc
SB
905
906 if (ret) {
907 clk_core_disable(core->parent);
908 return ret;
909 }
910 }
911
912 core->enable_count++;
913 return 0;
035a61c3 914}
b2476490 915
a6adc30b
DA
916static int clk_core_enable_lock(struct clk_core *core)
917{
918 unsigned long flags;
919 int ret;
920
921 flags = clk_enable_lock();
922 ret = clk_core_enable(core);
923 clk_enable_unlock(flags);
924
925 return ret;
926}
927
43536548
K
928/**
929 * clk_gate_restore_context - restore context for poweroff
930 * @hw: the clk_hw pointer of clock whose state is to be restored
931 *
932 * The clock gate restore context function enables or disables
933 * the gate clocks based on the enable_count. This is done in cases
934 * where the clock context is lost and based on the enable_count
935 * the clock either needs to be enabled/disabled. This
936 * helps restore the state of gate clocks.
937 */
938void clk_gate_restore_context(struct clk_hw *hw)
939{
9be76627
SB
940 struct clk_core *core = hw->core;
941
942 if (core->enable_count)
943 core->ops->enable(hw);
43536548 944 else
9be76627 945 core->ops->disable(hw);
43536548
K
946}
947EXPORT_SYMBOL_GPL(clk_gate_restore_context);
948
9be76627 949static int clk_core_save_context(struct clk_core *core)
8b95d1ce
RD
950{
951 struct clk_core *child;
952 int ret = 0;
953
9be76627
SB
954 hlist_for_each_entry(child, &core->children, child_node) {
955 ret = clk_core_save_context(child);
8b95d1ce
RD
956 if (ret < 0)
957 return ret;
958 }
959
9be76627
SB
960 if (core->ops && core->ops->save_context)
961 ret = core->ops->save_context(core->hw);
8b95d1ce
RD
962
963 return ret;
964}
965
9be76627 966static void clk_core_restore_context(struct clk_core *core)
8b95d1ce
RD
967{
968 struct clk_core *child;
969
9be76627
SB
970 if (core->ops && core->ops->restore_context)
971 core->ops->restore_context(core->hw);
8b95d1ce 972
9be76627
SB
973 hlist_for_each_entry(child, &core->children, child_node)
974 clk_core_restore_context(child);
8b95d1ce
RD
975}
976
977/**
978 * clk_save_context - save clock context for poweroff
979 *
980 * Saves the context of the clock register for powerstates in which the
981 * contents of the registers will be lost. Occurs deep within the suspend
982 * code. Returns 0 on success.
983 */
984int clk_save_context(void)
985{
986 struct clk_core *clk;
987 int ret;
988
989 hlist_for_each_entry(clk, &clk_root_list, child_node) {
9be76627 990 ret = clk_core_save_context(clk);
8b95d1ce
RD
991 if (ret < 0)
992 return ret;
993 }
994
995 hlist_for_each_entry(clk, &clk_orphan_list, child_node) {
9be76627 996 ret = clk_core_save_context(clk);
8b95d1ce
RD
997 if (ret < 0)
998 return ret;
999 }
1000
1001 return 0;
1002}
1003EXPORT_SYMBOL_GPL(clk_save_context);
1004
1005/**
1006 * clk_restore_context - restore clock context after poweroff
1007 *
1008 * Restore the saved clock context upon resume.
1009 *
1010 */
1011void clk_restore_context(void)
1012{
9be76627 1013 struct clk_core *core;
8b95d1ce 1014
9be76627
SB
1015 hlist_for_each_entry(core, &clk_root_list, child_node)
1016 clk_core_restore_context(core);
8b95d1ce 1017
9be76627
SB
1018 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1019 clk_core_restore_context(core);
8b95d1ce
RD
1020}
1021EXPORT_SYMBOL_GPL(clk_restore_context);
1022
4dff95dc
SB
1023/**
1024 * clk_enable - ungate a clock
1025 * @clk: the clk being ungated
1026 *
1027 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
1028 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
1029 * if the operation will never sleep. One example is a SoC-internal clk which
1030 * is controlled via simple register writes. In the complex case a clk ungate
1031 * operation may require a fast and a slow part. It is this reason that
1032 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
1033 * must be called before clk_enable. Returns 0 on success, -EERROR
1034 * otherwise.
1035 */
1036int clk_enable(struct clk *clk)
5279fc40 1037{
4dff95dc 1038 if (!clk)
5279fc40
BB
1039 return 0;
1040
a6adc30b
DA
1041 return clk_core_enable_lock(clk->core);
1042}
1043EXPORT_SYMBOL_GPL(clk_enable);
1044
1045static int clk_core_prepare_enable(struct clk_core *core)
1046{
1047 int ret;
1048
1049 ret = clk_core_prepare_lock(core);
1050 if (ret)
1051 return ret;
1052
1053 ret = clk_core_enable_lock(core);
1054 if (ret)
1055 clk_core_unprepare_lock(core);
5279fc40 1056
4dff95dc 1057 return ret;
b2476490 1058}
a6adc30b
DA
1059
1060static void clk_core_disable_unprepare(struct clk_core *core)
1061{
1062 clk_core_disable_lock(core);
1063 clk_core_unprepare_lock(core);
1064}
b2476490 1065
7ec986ef
DA
1066static void clk_unprepare_unused_subtree(struct clk_core *core)
1067{
1068 struct clk_core *child;
1069
1070 lockdep_assert_held(&prepare_lock);
1071
1072 hlist_for_each_entry(child, &core->children, child_node)
1073 clk_unprepare_unused_subtree(child);
1074
1075 if (core->prepare_count)
1076 return;
1077
1078 if (core->flags & CLK_IGNORE_UNUSED)
1079 return;
1080
9a34b453
MS
1081 if (clk_pm_runtime_get(core))
1082 return;
1083
7ec986ef
DA
1084 if (clk_core_is_prepared(core)) {
1085 trace_clk_unprepare(core);
1086 if (core->ops->unprepare_unused)
1087 core->ops->unprepare_unused(core->hw);
1088 else if (core->ops->unprepare)
1089 core->ops->unprepare(core->hw);
1090 trace_clk_unprepare_complete(core);
1091 }
9a34b453
MS
1092
1093 clk_pm_runtime_put(core);
7ec986ef
DA
1094}
1095
1096static void clk_disable_unused_subtree(struct clk_core *core)
1097{
1098 struct clk_core *child;
1099 unsigned long flags;
1100
1101 lockdep_assert_held(&prepare_lock);
1102
1103 hlist_for_each_entry(child, &core->children, child_node)
1104 clk_disable_unused_subtree(child);
1105
a4b3518d
DA
1106 if (core->flags & CLK_OPS_PARENT_ENABLE)
1107 clk_core_prepare_enable(core->parent);
1108
9a34b453
MS
1109 if (clk_pm_runtime_get(core))
1110 goto unprepare_out;
1111
7ec986ef
DA
1112 flags = clk_enable_lock();
1113
1114 if (core->enable_count)
1115 goto unlock_out;
1116
1117 if (core->flags & CLK_IGNORE_UNUSED)
1118 goto unlock_out;
1119
1120 /*
1121 * some gate clocks have special needs during the disable-unused
1122 * sequence. call .disable_unused if available, otherwise fall
1123 * back to .disable
1124 */
1125 if (clk_core_is_enabled(core)) {
1126 trace_clk_disable(core);
1127 if (core->ops->disable_unused)
1128 core->ops->disable_unused(core->hw);
1129 else if (core->ops->disable)
1130 core->ops->disable(core->hw);
1131 trace_clk_disable_complete(core);
1132 }
1133
1134unlock_out:
1135 clk_enable_unlock(flags);
9a34b453
MS
1136 clk_pm_runtime_put(core);
1137unprepare_out:
a4b3518d
DA
1138 if (core->flags & CLK_OPS_PARENT_ENABLE)
1139 clk_core_disable_unprepare(core->parent);
7ec986ef
DA
1140}
1141
1142static bool clk_ignore_unused;
1143static int __init clk_ignore_unused_setup(char *__unused)
1144{
1145 clk_ignore_unused = true;
1146 return 1;
1147}
1148__setup("clk_ignore_unused", clk_ignore_unused_setup);
1149
1150static int clk_disable_unused(void)
1151{
1152 struct clk_core *core;
1153
1154 if (clk_ignore_unused) {
1155 pr_warn("clk: Not disabling unused clocks\n");
1156 return 0;
1157 }
1158
1159 clk_prepare_lock();
1160
1161 hlist_for_each_entry(core, &clk_root_list, child_node)
1162 clk_disable_unused_subtree(core);
1163
1164 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1165 clk_disable_unused_subtree(core);
1166
1167 hlist_for_each_entry(core, &clk_root_list, child_node)
1168 clk_unprepare_unused_subtree(core);
1169
1170 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1171 clk_unprepare_unused_subtree(core);
1172
1173 clk_prepare_unlock();
1174
1175 return 0;
1176}
1177late_initcall_sync(clk_disable_unused);
1178
0f6cc2b8
JB
1179static int clk_core_determine_round_nolock(struct clk_core *core,
1180 struct clk_rate_request *req)
3d6ee287 1181{
0817b62c 1182 long rate;
4dff95dc
SB
1183
1184 lockdep_assert_held(&prepare_lock);
3d6ee287 1185
d6968fca 1186 if (!core)
4dff95dc 1187 return 0;
3d6ee287 1188
55e9b8b7
JB
1189 /*
1190 * At this point, core protection will be disabled if
1191 * - if the provider is not protected at all
1192 * - if the calling consumer is the only one which has exclusivity
1193 * over the provider
1194 */
e55a839a
JB
1195 if (clk_core_rate_is_protected(core)) {
1196 req->rate = core->rate;
1197 } else if (core->ops->determine_rate) {
0817b62c
BB
1198 return core->ops->determine_rate(core->hw, req);
1199 } else if (core->ops->round_rate) {
1200 rate = core->ops->round_rate(core->hw, req->rate,
1201 &req->best_parent_rate);
1202 if (rate < 0)
1203 return rate;
1204
1205 req->rate = rate;
0817b62c 1206 } else {
0f6cc2b8 1207 return -EINVAL;
0817b62c
BB
1208 }
1209
1210 return 0;
3d6ee287
UH
1211}
1212
0f6cc2b8
JB
1213static void clk_core_init_rate_req(struct clk_core * const core,
1214 struct clk_rate_request *req)
1215{
1216 struct clk_core *parent;
1217
1218 if (WARN_ON(!core || !req))
1219 return;
1220
1221 parent = core->parent;
1222 if (parent) {
1223 req->best_parent_hw = parent->hw;
1224 req->best_parent_rate = parent->rate;
1225 } else {
1226 req->best_parent_hw = NULL;
1227 req->best_parent_rate = 0;
0817b62c 1228 }
0f6cc2b8 1229}
0817b62c 1230
0f6cc2b8
JB
1231static bool clk_core_can_round(struct clk_core * const core)
1232{
1233 if (core->ops->determine_rate || core->ops->round_rate)
1234 return true;
1235
1236 return false;
1237}
1238
1239static int clk_core_round_rate_nolock(struct clk_core *core,
1240 struct clk_rate_request *req)
1241{
1242 lockdep_assert_held(&prepare_lock);
1243
04bf9ab3
JB
1244 if (!core) {
1245 req->rate = 0;
0f6cc2b8 1246 return 0;
04bf9ab3 1247 }
0817b62c 1248
0f6cc2b8
JB
1249 clk_core_init_rate_req(core, req);
1250
1251 if (clk_core_can_round(core))
1252 return clk_core_determine_round_nolock(core, req);
1253 else if (core->flags & CLK_SET_RATE_PARENT)
1254 return clk_core_round_rate_nolock(core->parent, req);
1255
1256 req->rate = core->rate;
0817b62c 1257 return 0;
3d6ee287
UH
1258}
1259
4dff95dc
SB
1260/**
1261 * __clk_determine_rate - get the closest rate actually supported by a clock
1262 * @hw: determine the rate of this clock
2d5b520c 1263 * @req: target rate request
4dff95dc 1264 *
6e5ab41b 1265 * Useful for clk_ops such as .set_rate and .determine_rate.
4dff95dc 1266 */
0817b62c 1267int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
035a61c3 1268{
0817b62c
BB
1269 if (!hw) {
1270 req->rate = 0;
4dff95dc 1271 return 0;
0817b62c 1272 }
035a61c3 1273
0817b62c 1274 return clk_core_round_rate_nolock(hw->core, req);
035a61c3 1275}
4dff95dc 1276EXPORT_SYMBOL_GPL(__clk_determine_rate);
035a61c3 1277
1a9c069c
SB
1278unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
1279{
1280 int ret;
1281 struct clk_rate_request req;
1282
1283 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
1284 req.rate = rate;
1285
1286 ret = clk_core_round_rate_nolock(hw->core, &req);
1287 if (ret)
1288 return 0;
1289
1290 return req.rate;
1291}
1292EXPORT_SYMBOL_GPL(clk_hw_round_rate);
1293
4dff95dc
SB
1294/**
1295 * clk_round_rate - round the given rate for a clk
1296 * @clk: the clk for which we are rounding a rate
1297 * @rate: the rate which is to be rounded
1298 *
1299 * Takes in a rate as input and rounds it to a rate that the clk can actually
1300 * use which is then returned. If clk doesn't support round_rate operation
1301 * then the parent rate is returned.
1302 */
1303long clk_round_rate(struct clk *clk, unsigned long rate)
035a61c3 1304{
fc4a05d4
SB
1305 struct clk_rate_request req;
1306 int ret;
4dff95dc 1307
035a61c3 1308 if (!clk)
4dff95dc 1309 return 0;
035a61c3 1310
4dff95dc 1311 clk_prepare_lock();
fc4a05d4 1312
55e9b8b7
JB
1313 if (clk->exclusive_count)
1314 clk_core_rate_unprotect(clk->core);
1315
fc4a05d4
SB
1316 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
1317 req.rate = rate;
1318
1319 ret = clk_core_round_rate_nolock(clk->core, &req);
55e9b8b7
JB
1320
1321 if (clk->exclusive_count)
1322 clk_core_rate_protect(clk->core);
1323
4dff95dc
SB
1324 clk_prepare_unlock();
1325
fc4a05d4
SB
1326 if (ret)
1327 return ret;
1328
1329 return req.rate;
035a61c3 1330}
4dff95dc 1331EXPORT_SYMBOL_GPL(clk_round_rate);
b2476490 1332
4dff95dc
SB
1333/**
1334 * __clk_notify - call clk notifier chain
1335 * @core: clk that is changing rate
1336 * @msg: clk notifier type (see include/linux/clk.h)
1337 * @old_rate: old clk rate
1338 * @new_rate: new clk rate
1339 *
1340 * Triggers a notifier call chain on the clk rate-change notification
1341 * for 'clk'. Passes a pointer to the struct clk and the previous
1342 * and current rates to the notifier callback. Intended to be called by
1343 * internal clock code only. Returns NOTIFY_DONE from the last driver
1344 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
1345 * a driver returns that.
1346 */
1347static int __clk_notify(struct clk_core *core, unsigned long msg,
1348 unsigned long old_rate, unsigned long new_rate)
b2476490 1349{
4dff95dc
SB
1350 struct clk_notifier *cn;
1351 struct clk_notifier_data cnd;
1352 int ret = NOTIFY_DONE;
b2476490 1353
4dff95dc
SB
1354 cnd.old_rate = old_rate;
1355 cnd.new_rate = new_rate;
b2476490 1356
4dff95dc
SB
1357 list_for_each_entry(cn, &clk_notifier_list, node) {
1358 if (cn->clk->core == core) {
1359 cnd.clk = cn->clk;
1360 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1361 &cnd);
17c34c56
PDS
1362 if (ret & NOTIFY_STOP_MASK)
1363 return ret;
4dff95dc 1364 }
b2476490
MT
1365 }
1366
4dff95dc 1367 return ret;
b2476490
MT
1368}
1369
4dff95dc
SB
1370/**
1371 * __clk_recalc_accuracies
1372 * @core: first clk in the subtree
1373 *
1374 * Walks the subtree of clks starting with clk and recalculates accuracies as
1375 * it goes. Note that if a clk does not implement the .recalc_accuracy
6e5ab41b 1376 * callback then it is assumed that the clock will take on the accuracy of its
4dff95dc 1377 * parent.
4dff95dc
SB
1378 */
1379static void __clk_recalc_accuracies(struct clk_core *core)
b2476490 1380{
4dff95dc
SB
1381 unsigned long parent_accuracy = 0;
1382 struct clk_core *child;
b2476490 1383
4dff95dc 1384 lockdep_assert_held(&prepare_lock);
b2476490 1385
4dff95dc
SB
1386 if (core->parent)
1387 parent_accuracy = core->parent->accuracy;
b2476490 1388
4dff95dc
SB
1389 if (core->ops->recalc_accuracy)
1390 core->accuracy = core->ops->recalc_accuracy(core->hw,
1391 parent_accuracy);
1392 else
1393 core->accuracy = parent_accuracy;
b2476490 1394
4dff95dc
SB
1395 hlist_for_each_entry(child, &core->children, child_node)
1396 __clk_recalc_accuracies(child);
b2476490
MT
1397}
1398
4dff95dc 1399static long clk_core_get_accuracy(struct clk_core *core)
e366fdd7 1400{
4dff95dc 1401 unsigned long accuracy;
15a02c1f 1402
4dff95dc
SB
1403 clk_prepare_lock();
1404 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1405 __clk_recalc_accuracies(core);
15a02c1f 1406
4dff95dc
SB
1407 accuracy = __clk_get_accuracy(core);
1408 clk_prepare_unlock();
e366fdd7 1409
4dff95dc 1410 return accuracy;
e366fdd7 1411}
15a02c1f 1412
4dff95dc
SB
1413/**
1414 * clk_get_accuracy - return the accuracy of clk
1415 * @clk: the clk whose accuracy is being returned
1416 *
1417 * Simply returns the cached accuracy of the clk, unless
1418 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
1419 * issued.
1420 * If clk is NULL then returns 0.
1421 */
1422long clk_get_accuracy(struct clk *clk)
035a61c3 1423{
4dff95dc
SB
1424 if (!clk)
1425 return 0;
035a61c3 1426
4dff95dc 1427 return clk_core_get_accuracy(clk->core);
035a61c3 1428}
4dff95dc 1429EXPORT_SYMBOL_GPL(clk_get_accuracy);
035a61c3 1430
4dff95dc
SB
1431static unsigned long clk_recalc(struct clk_core *core,
1432 unsigned long parent_rate)
1c8e6004 1433{
9a34b453
MS
1434 unsigned long rate = parent_rate;
1435
1436 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
1437 rate = core->ops->recalc_rate(core->hw, parent_rate);
1438 clk_pm_runtime_put(core);
1439 }
1440 return rate;
1c8e6004
TV
1441}
1442
4dff95dc
SB
1443/**
1444 * __clk_recalc_rates
1445 * @core: first clk in the subtree
1446 * @msg: notification type (see include/linux/clk.h)
1447 *
1448 * Walks the subtree of clks starting with clk and recalculates rates as it
1449 * goes. Note that if a clk does not implement the .recalc_rate callback then
1450 * it is assumed that the clock will take on the rate of its parent.
1451 *
1452 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1453 * if necessary.
15a02c1f 1454 */
4dff95dc 1455static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
15a02c1f 1456{
4dff95dc
SB
1457 unsigned long old_rate;
1458 unsigned long parent_rate = 0;
1459 struct clk_core *child;
e366fdd7 1460
4dff95dc 1461 lockdep_assert_held(&prepare_lock);
15a02c1f 1462
4dff95dc 1463 old_rate = core->rate;
b2476490 1464
4dff95dc
SB
1465 if (core->parent)
1466 parent_rate = core->parent->rate;
b2476490 1467
4dff95dc 1468 core->rate = clk_recalc(core, parent_rate);
b2476490 1469
4dff95dc
SB
1470 /*
1471 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1472 * & ABORT_RATE_CHANGE notifiers
1473 */
1474 if (core->notifier_count && msg)
1475 __clk_notify(core, msg, old_rate, core->rate);
b2476490 1476
4dff95dc
SB
1477 hlist_for_each_entry(child, &core->children, child_node)
1478 __clk_recalc_rates(child, msg);
1479}
b2476490 1480
4dff95dc
SB
1481static unsigned long clk_core_get_rate(struct clk_core *core)
1482{
1483 unsigned long rate;
dfc202ea 1484
4dff95dc 1485 clk_prepare_lock();
b2476490 1486
4dff95dc
SB
1487 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1488 __clk_recalc_rates(core, 0);
1489
1490 rate = clk_core_get_rate_nolock(core);
1491 clk_prepare_unlock();
1492
1493 return rate;
b2476490
MT
1494}
1495
1496/**
4dff95dc
SB
1497 * clk_get_rate - return the rate of clk
1498 * @clk: the clk whose rate is being returned
b2476490 1499 *
4dff95dc
SB
1500 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1501 * is set, which means a recalc_rate will be issued.
1502 * If clk is NULL then returns 0.
b2476490 1503 */
4dff95dc 1504unsigned long clk_get_rate(struct clk *clk)
b2476490 1505{
4dff95dc
SB
1506 if (!clk)
1507 return 0;
63589e92 1508
4dff95dc 1509 return clk_core_get_rate(clk->core);
b2476490 1510}
4dff95dc 1511EXPORT_SYMBOL_GPL(clk_get_rate);
b2476490 1512
4dff95dc
SB
1513static int clk_fetch_parent_index(struct clk_core *core,
1514 struct clk_core *parent)
b2476490 1515{
4dff95dc 1516 int i;
b2476490 1517
508f884a
MY
1518 if (!parent)
1519 return -EINVAL;
1520
ede77858
DB
1521 for (i = 0; i < core->num_parents; i++) {
1522 if (core->parents[i] == parent)
4dff95dc 1523 return i;
b2476490 1524
ede77858
DB
1525 if (core->parents[i])
1526 continue;
1527
1528 /* Fallback to comparing globally unique names */
1529 if (!strcmp(parent->name, core->parent_names[i])) {
1530 core->parents[i] = parent;
1531 return i;
1532 }
1533 }
1534
4dff95dc 1535 return -EINVAL;
b2476490
MT
1536}
1537
e6500344
HS
1538/*
1539 * Update the orphan status of @core and all its children.
1540 */
1541static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1542{
1543 struct clk_core *child;
1544
1545 core->orphan = is_orphan;
1546
1547 hlist_for_each_entry(child, &core->children, child_node)
1548 clk_core_update_orphan_status(child, is_orphan);
1549}
1550
4dff95dc 1551static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
b2476490 1552{
e6500344
HS
1553 bool was_orphan = core->orphan;
1554
4dff95dc 1555 hlist_del(&core->child_node);
035a61c3 1556
4dff95dc 1557 if (new_parent) {
e6500344
HS
1558 bool becomes_orphan = new_parent->orphan;
1559
4dff95dc
SB
1560 /* avoid duplicate POST_RATE_CHANGE notifications */
1561 if (new_parent->new_child == core)
1562 new_parent->new_child = NULL;
b2476490 1563
4dff95dc 1564 hlist_add_head(&core->child_node, &new_parent->children);
e6500344
HS
1565
1566 if (was_orphan != becomes_orphan)
1567 clk_core_update_orphan_status(core, becomes_orphan);
4dff95dc
SB
1568 } else {
1569 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
1570 if (!was_orphan)
1571 clk_core_update_orphan_status(core, true);
4dff95dc 1572 }
dfc202ea 1573
4dff95dc 1574 core->parent = new_parent;
035a61c3
TV
1575}
1576
4dff95dc
SB
1577static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1578 struct clk_core *parent)
b2476490
MT
1579{
1580 unsigned long flags;
4dff95dc 1581 struct clk_core *old_parent = core->parent;
b2476490 1582
4dff95dc 1583 /*
fc8726a2
DA
1584 * 1. enable parents for CLK_OPS_PARENT_ENABLE clock
1585 *
1586 * 2. Migrate prepare state between parents and prevent race with
4dff95dc
SB
1587 * clk_enable().
1588 *
1589 * If the clock is not prepared, then a race with
1590 * clk_enable/disable() is impossible since we already have the
1591 * prepare lock (future calls to clk_enable() need to be preceded by
1592 * a clk_prepare()).
1593 *
1594 * If the clock is prepared, migrate the prepared state to the new
1595 * parent and also protect against a race with clk_enable() by
1596 * forcing the clock and the new parent on. This ensures that all
1597 * future calls to clk_enable() are practically NOPs with respect to
1598 * hardware and software states.
1599 *
1600 * See also: Comment for clk_set_parent() below.
1601 */
fc8726a2
DA
1602
1603 /* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */
1604 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1605 clk_core_prepare_enable(old_parent);
1606 clk_core_prepare_enable(parent);
1607 }
1608
1609 /* migrate prepare count if > 0 */
4dff95dc 1610 if (core->prepare_count) {
fc8726a2
DA
1611 clk_core_prepare_enable(parent);
1612 clk_core_enable_lock(core);
4dff95dc 1613 }
63589e92 1614
4dff95dc 1615 /* update the clk tree topology */
eab89f69 1616 flags = clk_enable_lock();
4dff95dc 1617 clk_reparent(core, parent);
eab89f69 1618 clk_enable_unlock(flags);
4dff95dc
SB
1619
1620 return old_parent;
b2476490 1621}
b2476490 1622
4dff95dc
SB
1623static void __clk_set_parent_after(struct clk_core *core,
1624 struct clk_core *parent,
1625 struct clk_core *old_parent)
b2476490 1626{
4dff95dc
SB
1627 /*
1628 * Finish the migration of prepare state and undo the changes done
1629 * for preventing a race with clk_enable().
1630 */
1631 if (core->prepare_count) {
fc8726a2
DA
1632 clk_core_disable_lock(core);
1633 clk_core_disable_unprepare(old_parent);
1634 }
1635
1636 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
1637 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1638 clk_core_disable_unprepare(parent);
1639 clk_core_disable_unprepare(old_parent);
4dff95dc
SB
1640 }
1641}
b2476490 1642
4dff95dc
SB
1643static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1644 u8 p_index)
1645{
1646 unsigned long flags;
1647 int ret = 0;
1648 struct clk_core *old_parent;
b2476490 1649
4dff95dc 1650 old_parent = __clk_set_parent_before(core, parent);
b2476490 1651
4dff95dc 1652 trace_clk_set_parent(core, parent);
b2476490 1653
4dff95dc
SB
1654 /* change clock input source */
1655 if (parent && core->ops->set_parent)
1656 ret = core->ops->set_parent(core->hw, p_index);
dfc202ea 1657
4dff95dc 1658 trace_clk_set_parent_complete(core, parent);
dfc202ea 1659
4dff95dc
SB
1660 if (ret) {
1661 flags = clk_enable_lock();
1662 clk_reparent(core, old_parent);
1663 clk_enable_unlock(flags);
c660b2eb 1664 __clk_set_parent_after(core, old_parent, parent);
dfc202ea 1665
4dff95dc 1666 return ret;
b2476490
MT
1667 }
1668
4dff95dc
SB
1669 __clk_set_parent_after(core, parent, old_parent);
1670
b2476490
MT
1671 return 0;
1672}
1673
1674/**
4dff95dc
SB
1675 * __clk_speculate_rates
1676 * @core: first clk in the subtree
1677 * @parent_rate: the "future" rate of clk's parent
b2476490 1678 *
4dff95dc
SB
1679 * Walks the subtree of clks starting with clk, speculating rates as it
1680 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1681 *
1682 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1683 * pre-rate change notifications and returns early if no clks in the
1684 * subtree have subscribed to the notifications. Note that if a clk does not
1685 * implement the .recalc_rate callback then it is assumed that the clock will
1686 * take on the rate of its parent.
b2476490 1687 */
4dff95dc
SB
1688static int __clk_speculate_rates(struct clk_core *core,
1689 unsigned long parent_rate)
b2476490 1690{
4dff95dc
SB
1691 struct clk_core *child;
1692 unsigned long new_rate;
1693 int ret = NOTIFY_DONE;
b2476490 1694
4dff95dc 1695 lockdep_assert_held(&prepare_lock);
864e160a 1696
4dff95dc
SB
1697 new_rate = clk_recalc(core, parent_rate);
1698
1699 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1700 if (core->notifier_count)
1701 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1702
1703 if (ret & NOTIFY_STOP_MASK) {
1704 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1705 __func__, core->name, ret);
1706 goto out;
1707 }
1708
1709 hlist_for_each_entry(child, &core->children, child_node) {
1710 ret = __clk_speculate_rates(child, new_rate);
1711 if (ret & NOTIFY_STOP_MASK)
1712 break;
1713 }
b2476490 1714
4dff95dc 1715out:
b2476490
MT
1716 return ret;
1717}
b2476490 1718
4dff95dc
SB
1719static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1720 struct clk_core *new_parent, u8 p_index)
b2476490 1721{
4dff95dc 1722 struct clk_core *child;
b2476490 1723
4dff95dc
SB
1724 core->new_rate = new_rate;
1725 core->new_parent = new_parent;
1726 core->new_parent_index = p_index;
1727 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1728 core->new_child = NULL;
1729 if (new_parent && new_parent != core->parent)
1730 new_parent->new_child = core;
496eadf8 1731
4dff95dc
SB
1732 hlist_for_each_entry(child, &core->children, child_node) {
1733 child->new_rate = clk_recalc(child, new_rate);
1734 clk_calc_subtree(child, child->new_rate, NULL, 0);
1735 }
1736}
b2476490 1737
4dff95dc
SB
1738/*
1739 * calculate the new rates returning the topmost clock that has to be
1740 * changed.
1741 */
1742static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1743 unsigned long rate)
1744{
1745 struct clk_core *top = core;
1746 struct clk_core *old_parent, *parent;
4dff95dc
SB
1747 unsigned long best_parent_rate = 0;
1748 unsigned long new_rate;
1749 unsigned long min_rate;
1750 unsigned long max_rate;
1751 int p_index = 0;
1752 long ret;
1753
1754 /* sanity */
1755 if (IS_ERR_OR_NULL(core))
1756 return NULL;
1757
1758 /* save parent rate, if it exists */
1759 parent = old_parent = core->parent;
71472c0c 1760 if (parent)
4dff95dc 1761 best_parent_rate = parent->rate;
71472c0c 1762
4dff95dc
SB
1763 clk_core_get_boundaries(core, &min_rate, &max_rate);
1764
1765 /* find the closest rate and parent clk/rate */
0f6cc2b8 1766 if (clk_core_can_round(core)) {
0817b62c
BB
1767 struct clk_rate_request req;
1768
1769 req.rate = rate;
1770 req.min_rate = min_rate;
1771 req.max_rate = max_rate;
0817b62c 1772
0f6cc2b8
JB
1773 clk_core_init_rate_req(core, &req);
1774
1775 ret = clk_core_determine_round_nolock(core, &req);
4dff95dc
SB
1776 if (ret < 0)
1777 return NULL;
1c8e6004 1778
0817b62c
BB
1779 best_parent_rate = req.best_parent_rate;
1780 new_rate = req.rate;
1781 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
035a61c3 1782
4dff95dc
SB
1783 if (new_rate < min_rate || new_rate > max_rate)
1784 return NULL;
1785 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1786 /* pass-through clock without adjustable parent */
1787 core->new_rate = core->rate;
1788 return NULL;
1789 } else {
1790 /* pass-through clock with adjustable parent */
1791 top = clk_calc_new_rates(parent, rate);
1792 new_rate = parent->new_rate;
1793 goto out;
1794 }
1c8e6004 1795
4dff95dc
SB
1796 /* some clocks must be gated to change parent */
1797 if (parent != old_parent &&
1798 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1799 pr_debug("%s: %s not gated but wants to reparent\n",
1800 __func__, core->name);
1801 return NULL;
1802 }
b2476490 1803
4dff95dc
SB
1804 /* try finding the new parent index */
1805 if (parent && core->num_parents > 1) {
1806 p_index = clk_fetch_parent_index(core, parent);
1807 if (p_index < 0) {
1808 pr_debug("%s: clk %s can not be parent of clk %s\n",
1809 __func__, parent->name, core->name);
1810 return NULL;
1811 }
1812 }
b2476490 1813
4dff95dc
SB
1814 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1815 best_parent_rate != parent->rate)
1816 top = clk_calc_new_rates(parent, best_parent_rate);
035a61c3 1817
4dff95dc
SB
1818out:
1819 clk_calc_subtree(core, new_rate, parent, p_index);
b2476490 1820
4dff95dc 1821 return top;
b2476490 1822}
b2476490 1823
4dff95dc
SB
1824/*
1825 * Notify about rate changes in a subtree. Always walk down the whole tree
1826 * so that in case of an error we can walk down the whole tree again and
1827 * abort the change.
b2476490 1828 */
4dff95dc
SB
1829static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
1830 unsigned long event)
b2476490 1831{
4dff95dc 1832 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
b2476490
MT
1833 int ret = NOTIFY_DONE;
1834
4dff95dc
SB
1835 if (core->rate == core->new_rate)
1836 return NULL;
b2476490 1837
4dff95dc
SB
1838 if (core->notifier_count) {
1839 ret = __clk_notify(core, event, core->rate, core->new_rate);
1840 if (ret & NOTIFY_STOP_MASK)
1841 fail_clk = core;
b2476490
MT
1842 }
1843
4dff95dc
SB
1844 hlist_for_each_entry(child, &core->children, child_node) {
1845 /* Skip children who will be reparented to another clock */
1846 if (child->new_parent && child->new_parent != core)
1847 continue;
1848 tmp_clk = clk_propagate_rate_change(child, event);
1849 if (tmp_clk)
1850 fail_clk = tmp_clk;
1851 }
5279fc40 1852
4dff95dc
SB
1853 /* handle the new child who might not be in core->children yet */
1854 if (core->new_child) {
1855 tmp_clk = clk_propagate_rate_change(core->new_child, event);
1856 if (tmp_clk)
1857 fail_clk = tmp_clk;
1858 }
5279fc40 1859
4dff95dc 1860 return fail_clk;
5279fc40
BB
1861}
1862
4dff95dc
SB
1863/*
1864 * walk down a subtree and set the new rates notifying the rate
1865 * change on the way
1866 */
1867static void clk_change_rate(struct clk_core *core)
035a61c3 1868{
4dff95dc
SB
1869 struct clk_core *child;
1870 struct hlist_node *tmp;
1871 unsigned long old_rate;
1872 unsigned long best_parent_rate = 0;
1873 bool skip_set_rate = false;
1874 struct clk_core *old_parent;
fc8726a2 1875 struct clk_core *parent = NULL;
035a61c3 1876
4dff95dc 1877 old_rate = core->rate;
035a61c3 1878
fc8726a2
DA
1879 if (core->new_parent) {
1880 parent = core->new_parent;
4dff95dc 1881 best_parent_rate = core->new_parent->rate;
fc8726a2
DA
1882 } else if (core->parent) {
1883 parent = core->parent;
4dff95dc 1884 best_parent_rate = core->parent->rate;
fc8726a2 1885 }
035a61c3 1886
588fb54b
MS
1887 if (clk_pm_runtime_get(core))
1888 return;
1889
2eb8c710
HS
1890 if (core->flags & CLK_SET_RATE_UNGATE) {
1891 unsigned long flags;
1892
1893 clk_core_prepare(core);
1894 flags = clk_enable_lock();
1895 clk_core_enable(core);
1896 clk_enable_unlock(flags);
1897 }
1898
4dff95dc
SB
1899 if (core->new_parent && core->new_parent != core->parent) {
1900 old_parent = __clk_set_parent_before(core, core->new_parent);
1901 trace_clk_set_parent(core, core->new_parent);
5279fc40 1902
4dff95dc
SB
1903 if (core->ops->set_rate_and_parent) {
1904 skip_set_rate = true;
1905 core->ops->set_rate_and_parent(core->hw, core->new_rate,
1906 best_parent_rate,
1907 core->new_parent_index);
1908 } else if (core->ops->set_parent) {
1909 core->ops->set_parent(core->hw, core->new_parent_index);
1910 }
5279fc40 1911
4dff95dc
SB
1912 trace_clk_set_parent_complete(core, core->new_parent);
1913 __clk_set_parent_after(core, core->new_parent, old_parent);
1914 }
8f2c2db1 1915
fc8726a2
DA
1916 if (core->flags & CLK_OPS_PARENT_ENABLE)
1917 clk_core_prepare_enable(parent);
1918
4dff95dc 1919 trace_clk_set_rate(core, core->new_rate);
b2476490 1920
4dff95dc
SB
1921 if (!skip_set_rate && core->ops->set_rate)
1922 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
496eadf8 1923
4dff95dc 1924 trace_clk_set_rate_complete(core, core->new_rate);
b2476490 1925
4dff95dc 1926 core->rate = clk_recalc(core, best_parent_rate);
b2476490 1927
2eb8c710
HS
1928 if (core->flags & CLK_SET_RATE_UNGATE) {
1929 unsigned long flags;
1930
1931 flags = clk_enable_lock();
1932 clk_core_disable(core);
1933 clk_enable_unlock(flags);
1934 clk_core_unprepare(core);
1935 }
1936
fc8726a2
DA
1937 if (core->flags & CLK_OPS_PARENT_ENABLE)
1938 clk_core_disable_unprepare(parent);
1939
4dff95dc
SB
1940 if (core->notifier_count && old_rate != core->rate)
1941 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
b2476490 1942
85e88fab
MT
1943 if (core->flags & CLK_RECALC_NEW_RATES)
1944 (void)clk_calc_new_rates(core, core->new_rate);
d8d91987 1945
b2476490 1946 /*
4dff95dc
SB
1947 * Use safe iteration, as change_rate can actually swap parents
1948 * for certain clock types.
b2476490 1949 */
4dff95dc
SB
1950 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
1951 /* Skip children who will be reparented to another clock */
1952 if (child->new_parent && child->new_parent != core)
1953 continue;
1954 clk_change_rate(child);
1955 }
b2476490 1956
4dff95dc
SB
1957 /* handle the new child who might not be in core->children yet */
1958 if (core->new_child)
1959 clk_change_rate(core->new_child);
588fb54b
MS
1960
1961 clk_pm_runtime_put(core);
b2476490
MT
1962}
1963
ca5e089a
JB
1964static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core,
1965 unsigned long req_rate)
1966{
e55a839a 1967 int ret, cnt;
ca5e089a
JB
1968 struct clk_rate_request req;
1969
1970 lockdep_assert_held(&prepare_lock);
1971
1972 if (!core)
1973 return 0;
1974
e55a839a
JB
1975 /* simulate what the rate would be if it could be freely set */
1976 cnt = clk_core_rate_nuke_protect(core);
1977 if (cnt < 0)
1978 return cnt;
1979
ca5e089a
JB
1980 clk_core_get_boundaries(core, &req.min_rate, &req.max_rate);
1981 req.rate = req_rate;
1982
1983 ret = clk_core_round_rate_nolock(core, &req);
1984
e55a839a
JB
1985 /* restore the protection */
1986 clk_core_rate_restore_protect(core, cnt);
1987
ca5e089a 1988 return ret ? 0 : req.rate;
b2476490
MT
1989}
1990
4dff95dc
SB
1991static int clk_core_set_rate_nolock(struct clk_core *core,
1992 unsigned long req_rate)
a093bde2 1993{
4dff95dc 1994 struct clk_core *top, *fail_clk;
ca5e089a 1995 unsigned long rate;
9a34b453 1996 int ret = 0;
a093bde2 1997
4dff95dc
SB
1998 if (!core)
1999 return 0;
a093bde2 2000
ca5e089a
JB
2001 rate = clk_core_req_round_rate_nolock(core, req_rate);
2002
4dff95dc
SB
2003 /* bail early if nothing to do */
2004 if (rate == clk_core_get_rate_nolock(core))
2005 return 0;
a093bde2 2006
e55a839a
JB
2007 /* fail on a direct rate set of a protected provider */
2008 if (clk_core_rate_is_protected(core))
2009 return -EBUSY;
2010
4dff95dc 2011 /* calculate new rates and get the topmost changed clock */
ca5e089a 2012 top = clk_calc_new_rates(core, req_rate);
4dff95dc
SB
2013 if (!top)
2014 return -EINVAL;
2015
9a34b453
MS
2016 ret = clk_pm_runtime_get(core);
2017 if (ret)
2018 return ret;
2019
4dff95dc
SB
2020 /* notify that we are about to change rates */
2021 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
2022 if (fail_clk) {
2023 pr_debug("%s: failed to set %s rate\n", __func__,
2024 fail_clk->name);
2025 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
9a34b453
MS
2026 ret = -EBUSY;
2027 goto err;
4dff95dc
SB
2028 }
2029
2030 /* change the rates */
2031 clk_change_rate(top);
2032
2033 core->req_rate = req_rate;
9a34b453
MS
2034err:
2035 clk_pm_runtime_put(core);
4dff95dc 2036
9a34b453 2037 return ret;
a093bde2 2038}
035a61c3
TV
2039
2040/**
4dff95dc
SB
2041 * clk_set_rate - specify a new rate for clk
2042 * @clk: the clk whose rate is being changed
2043 * @rate: the new rate for clk
035a61c3 2044 *
4dff95dc
SB
2045 * In the simplest case clk_set_rate will only adjust the rate of clk.
2046 *
2047 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
2048 * propagate up to clk's parent; whether or not this happens depends on the
2049 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
2050 * after calling .round_rate then upstream parent propagation is ignored. If
2051 * *parent_rate comes back with a new rate for clk's parent then we propagate
2052 * up to clk's parent and set its rate. Upward propagation will continue
2053 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
2054 * .round_rate stops requesting changes to clk's parent_rate.
2055 *
2056 * Rate changes are accomplished via tree traversal that also recalculates the
2057 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
2058 *
2059 * Returns 0 on success, -EERROR otherwise.
035a61c3 2060 */
4dff95dc 2061int clk_set_rate(struct clk *clk, unsigned long rate)
035a61c3 2062{
4dff95dc
SB
2063 int ret;
2064
035a61c3
TV
2065 if (!clk)
2066 return 0;
2067
4dff95dc
SB
2068 /* prevent racing with updates to the clock topology */
2069 clk_prepare_lock();
da0f0b2c 2070
55e9b8b7
JB
2071 if (clk->exclusive_count)
2072 clk_core_rate_unprotect(clk->core);
2073
4dff95dc 2074 ret = clk_core_set_rate_nolock(clk->core, rate);
da0f0b2c 2075
55e9b8b7
JB
2076 if (clk->exclusive_count)
2077 clk_core_rate_protect(clk->core);
2078
4dff95dc 2079 clk_prepare_unlock();
4935b22c 2080
4dff95dc 2081 return ret;
4935b22c 2082}
4dff95dc 2083EXPORT_SYMBOL_GPL(clk_set_rate);
4935b22c 2084
55e9b8b7
JB
2085/**
2086 * clk_set_rate_exclusive - specify a new rate get exclusive control
2087 * @clk: the clk whose rate is being changed
2088 * @rate: the new rate for clk
2089 *
2090 * This is a combination of clk_set_rate() and clk_rate_exclusive_get()
2091 * within a critical section
2092 *
2093 * This can be used initially to ensure that at least 1 consumer is
2094 * statisfied when several consumers are competing for exclusivity over the
2095 * same clock provider.
2096 *
2097 * The exclusivity is not applied if setting the rate failed.
2098 *
2099 * Calls to clk_rate_exclusive_get() should be balanced with calls to
2100 * clk_rate_exclusive_put().
2101 *
2102 * Returns 0 on success, -EERROR otherwise.
2103 */
2104int clk_set_rate_exclusive(struct clk *clk, unsigned long rate)
2105{
2106 int ret;
2107
2108 if (!clk)
2109 return 0;
2110
2111 /* prevent racing with updates to the clock topology */
2112 clk_prepare_lock();
2113
2114 /*
2115 * The temporary protection removal is not here, on purpose
2116 * This function is meant to be used instead of clk_rate_protect,
2117 * so before the consumer code path protect the clock provider
2118 */
2119
2120 ret = clk_core_set_rate_nolock(clk->core, rate);
2121 if (!ret) {
2122 clk_core_rate_protect(clk->core);
2123 clk->exclusive_count++;
2124 }
2125
2126 clk_prepare_unlock();
2127
2128 return ret;
2129}
2130EXPORT_SYMBOL_GPL(clk_set_rate_exclusive);
2131
4dff95dc
SB
2132/**
2133 * clk_set_rate_range - set a rate range for a clock source
2134 * @clk: clock source
2135 * @min: desired minimum clock rate in Hz, inclusive
2136 * @max: desired maximum clock rate in Hz, inclusive
2137 *
2138 * Returns success (0) or negative errno.
2139 */
2140int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
4935b22c 2141{
4dff95dc 2142 int ret = 0;
6562fbcf 2143 unsigned long old_min, old_max, rate;
4935b22c 2144
4dff95dc
SB
2145 if (!clk)
2146 return 0;
903efc55 2147
4dff95dc
SB
2148 if (min > max) {
2149 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
2150 __func__, clk->core->name, clk->dev_id, clk->con_id,
2151 min, max);
2152 return -EINVAL;
903efc55 2153 }
4935b22c 2154
4dff95dc 2155 clk_prepare_lock();
4935b22c 2156
55e9b8b7
JB
2157 if (clk->exclusive_count)
2158 clk_core_rate_unprotect(clk->core);
2159
6562fbcf
JB
2160 /* Save the current values in case we need to rollback the change */
2161 old_min = clk->min_rate;
2162 old_max = clk->max_rate;
2163 clk->min_rate = min;
2164 clk->max_rate = max;
2165
2166 rate = clk_core_get_rate_nolock(clk->core);
2167 if (rate < min || rate > max) {
2168 /*
2169 * FIXME:
2170 * We are in bit of trouble here, current rate is outside the
2171 * the requested range. We are going try to request appropriate
2172 * range boundary but there is a catch. It may fail for the
2173 * usual reason (clock broken, clock protected, etc) but also
2174 * because:
2175 * - round_rate() was not favorable and fell on the wrong
2176 * side of the boundary
2177 * - the determine_rate() callback does not really check for
2178 * this corner case when determining the rate
2179 */
2180
2181 if (rate < min)
2182 rate = min;
2183 else
2184 rate = max;
2185
2186 ret = clk_core_set_rate_nolock(clk->core, rate);
2187 if (ret) {
2188 /* rollback the changes */
2189 clk->min_rate = old_min;
2190 clk->max_rate = old_max;
2191 }
4935b22c
JH
2192 }
2193
55e9b8b7
JB
2194 if (clk->exclusive_count)
2195 clk_core_rate_protect(clk->core);
2196
4dff95dc 2197 clk_prepare_unlock();
4935b22c 2198
4dff95dc 2199 return ret;
3fa2252b 2200}
4dff95dc 2201EXPORT_SYMBOL_GPL(clk_set_rate_range);
3fa2252b 2202
4dff95dc
SB
2203/**
2204 * clk_set_min_rate - set a minimum clock rate for a clock source
2205 * @clk: clock source
2206 * @rate: desired minimum clock rate in Hz, inclusive
2207 *
2208 * Returns success (0) or negative errno.
2209 */
2210int clk_set_min_rate(struct clk *clk, unsigned long rate)
3fa2252b 2211{
4dff95dc
SB
2212 if (!clk)
2213 return 0;
2214
2215 return clk_set_rate_range(clk, rate, clk->max_rate);
3fa2252b 2216}
4dff95dc 2217EXPORT_SYMBOL_GPL(clk_set_min_rate);
3fa2252b 2218
4dff95dc
SB
2219/**
2220 * clk_set_max_rate - set a maximum clock rate for a clock source
2221 * @clk: clock source
2222 * @rate: desired maximum clock rate in Hz, inclusive
2223 *
2224 * Returns success (0) or negative errno.
2225 */
2226int clk_set_max_rate(struct clk *clk, unsigned long rate)
3fa2252b 2227{
4dff95dc
SB
2228 if (!clk)
2229 return 0;
4935b22c 2230
4dff95dc 2231 return clk_set_rate_range(clk, clk->min_rate, rate);
4935b22c 2232}
4dff95dc 2233EXPORT_SYMBOL_GPL(clk_set_max_rate);
4935b22c 2234
b2476490 2235/**
4dff95dc
SB
2236 * clk_get_parent - return the parent of a clk
2237 * @clk: the clk whose parent gets returned
b2476490 2238 *
4dff95dc 2239 * Simply returns clk->parent. Returns NULL if clk is NULL.
b2476490 2240 */
4dff95dc 2241struct clk *clk_get_parent(struct clk *clk)
b2476490 2242{
4dff95dc 2243 struct clk *parent;
b2476490 2244
fc4a05d4
SB
2245 if (!clk)
2246 return NULL;
2247
4dff95dc 2248 clk_prepare_lock();
fc4a05d4
SB
2249 /* TODO: Create a per-user clk and change callers to call clk_put */
2250 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
4dff95dc 2251 clk_prepare_unlock();
496eadf8 2252
4dff95dc
SB
2253 return parent;
2254}
2255EXPORT_SYMBOL_GPL(clk_get_parent);
b2476490 2256
4dff95dc
SB
2257static struct clk_core *__clk_init_parent(struct clk_core *core)
2258{
5146e0b0 2259 u8 index = 0;
4dff95dc 2260
2430a94d 2261 if (core->num_parents > 1 && core->ops->get_parent)
5146e0b0 2262 index = core->ops->get_parent(core->hw);
b2476490 2263
5146e0b0 2264 return clk_core_get_parent_by_index(core, index);
b2476490
MT
2265}
2266
4dff95dc
SB
2267static void clk_core_reparent(struct clk_core *core,
2268 struct clk_core *new_parent)
b2476490 2269{
4dff95dc
SB
2270 clk_reparent(core, new_parent);
2271 __clk_recalc_accuracies(core);
2272 __clk_recalc_rates(core, POST_RATE_CHANGE);
b2476490
MT
2273}
2274
42c86547
TV
2275void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
2276{
2277 if (!hw)
2278 return;
2279
2280 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
2281}
2282
4dff95dc
SB
2283/**
2284 * clk_has_parent - check if a clock is a possible parent for another
2285 * @clk: clock source
2286 * @parent: parent clock source
2287 *
2288 * This function can be used in drivers that need to check that a clock can be
2289 * the parent of another without actually changing the parent.
2290 *
2291 * Returns true if @parent is a possible parent for @clk, false otherwise.
b2476490 2292 */
4dff95dc 2293bool clk_has_parent(struct clk *clk, struct clk *parent)
b2476490 2294{
4dff95dc 2295 struct clk_core *core, *parent_core;
b2476490 2296
4dff95dc
SB
2297 /* NULL clocks should be nops, so return success if either is NULL. */
2298 if (!clk || !parent)
2299 return true;
7452b219 2300
4dff95dc
SB
2301 core = clk->core;
2302 parent_core = parent->core;
71472c0c 2303
4dff95dc
SB
2304 /* Optimize for the case where the parent is already the parent. */
2305 if (core->parent == parent_core)
2306 return true;
1c8e6004 2307
d6347445
YX
2308 return match_string(core->parent_names, core->num_parents,
2309 parent_core->name) >= 0;
4dff95dc
SB
2310}
2311EXPORT_SYMBOL_GPL(clk_has_parent);
03bc10ab 2312
91baa9ff
JB
2313static int clk_core_set_parent_nolock(struct clk_core *core,
2314 struct clk_core *parent)
4dff95dc
SB
2315{
2316 int ret = 0;
2317 int p_index = 0;
2318 unsigned long p_rate = 0;
2319
91baa9ff
JB
2320 lockdep_assert_held(&prepare_lock);
2321
4dff95dc
SB
2322 if (!core)
2323 return 0;
2324
4dff95dc 2325 if (core->parent == parent)
91baa9ff 2326 return 0;
4dff95dc
SB
2327
2328 /* verify ops for for multi-parent clks */
91baa9ff
JB
2329 if (core->num_parents > 1 && !core->ops->set_parent)
2330 return -EPERM;
7452b219 2331
4dff95dc 2332 /* check that we are allowed to re-parent if the clock is in use */
91baa9ff
JB
2333 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
2334 return -EBUSY;
b2476490 2335
e55a839a
JB
2336 if (clk_core_rate_is_protected(core))
2337 return -EBUSY;
b2476490 2338
71472c0c 2339 /* try finding the new parent index */
4dff95dc 2340 if (parent) {
d6968fca 2341 p_index = clk_fetch_parent_index(core, parent);
f1c8b2ed 2342 if (p_index < 0) {
71472c0c 2343 pr_debug("%s: clk %s can not be parent of clk %s\n",
4dff95dc 2344 __func__, parent->name, core->name);
91baa9ff 2345 return p_index;
71472c0c 2346 }
e8f0e68e 2347 p_rate = parent->rate;
b2476490
MT
2348 }
2349
9a34b453
MS
2350 ret = clk_pm_runtime_get(core);
2351 if (ret)
91baa9ff 2352 return ret;
9a34b453 2353
4dff95dc
SB
2354 /* propagate PRE_RATE_CHANGE notifications */
2355 ret = __clk_speculate_rates(core, p_rate);
b2476490 2356
4dff95dc
SB
2357 /* abort if a driver objects */
2358 if (ret & NOTIFY_STOP_MASK)
9a34b453 2359 goto runtime_put;
b2476490 2360
4dff95dc
SB
2361 /* do the re-parent */
2362 ret = __clk_set_parent(core, parent, p_index);
b2476490 2363
4dff95dc
SB
2364 /* propagate rate an accuracy recalculation accordingly */
2365 if (ret) {
2366 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
2367 } else {
2368 __clk_recalc_rates(core, POST_RATE_CHANGE);
2369 __clk_recalc_accuracies(core);
b2476490
MT
2370 }
2371
9a34b453
MS
2372runtime_put:
2373 clk_pm_runtime_put(core);
71472c0c 2374
4dff95dc
SB
2375 return ret;
2376}
b2476490 2377
4dff95dc
SB
2378/**
2379 * clk_set_parent - switch the parent of a mux clk
2380 * @clk: the mux clk whose input we are switching
2381 * @parent: the new input to clk
2382 *
2383 * Re-parent clk to use parent as its new input source. If clk is in
2384 * prepared state, the clk will get enabled for the duration of this call. If
2385 * that's not acceptable for a specific clk (Eg: the consumer can't handle
2386 * that, the reparenting is glitchy in hardware, etc), use the
2387 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
2388 *
2389 * After successfully changing clk's parent clk_set_parent will update the
2390 * clk topology, sysfs topology and propagate rate recalculation via
2391 * __clk_recalc_rates.
2392 *
2393 * Returns 0 on success, -EERROR otherwise.
2394 */
2395int clk_set_parent(struct clk *clk, struct clk *parent)
2396{
91baa9ff
JB
2397 int ret;
2398
4dff95dc
SB
2399 if (!clk)
2400 return 0;
2401
91baa9ff 2402 clk_prepare_lock();
55e9b8b7
JB
2403
2404 if (clk->exclusive_count)
2405 clk_core_rate_unprotect(clk->core);
2406
91baa9ff
JB
2407 ret = clk_core_set_parent_nolock(clk->core,
2408 parent ? parent->core : NULL);
55e9b8b7
JB
2409
2410 if (clk->exclusive_count)
2411 clk_core_rate_protect(clk->core);
2412
91baa9ff
JB
2413 clk_prepare_unlock();
2414
2415 return ret;
b2476490 2416}
4dff95dc 2417EXPORT_SYMBOL_GPL(clk_set_parent);
b2476490 2418
9e4d04ad
JB
2419static int clk_core_set_phase_nolock(struct clk_core *core, int degrees)
2420{
2421 int ret = -EINVAL;
2422
2423 lockdep_assert_held(&prepare_lock);
2424
2425 if (!core)
2426 return 0;
2427
e55a839a
JB
2428 if (clk_core_rate_is_protected(core))
2429 return -EBUSY;
2430
9e4d04ad
JB
2431 trace_clk_set_phase(core, degrees);
2432
7f95beea 2433 if (core->ops->set_phase) {
9e4d04ad 2434 ret = core->ops->set_phase(core->hw, degrees);
7f95beea
SL
2435 if (!ret)
2436 core->phase = degrees;
2437 }
9e4d04ad
JB
2438
2439 trace_clk_set_phase_complete(core, degrees);
2440
2441 return ret;
2442}
2443
4dff95dc
SB
2444/**
2445 * clk_set_phase - adjust the phase shift of a clock signal
2446 * @clk: clock signal source
2447 * @degrees: number of degrees the signal is shifted
2448 *
2449 * Shifts the phase of a clock signal by the specified
2450 * degrees. Returns 0 on success, -EERROR otherwise.
2451 *
2452 * This function makes no distinction about the input or reference
2453 * signal that we adjust the clock signal phase against. For example
2454 * phase locked-loop clock signal generators we may shift phase with
2455 * respect to feedback clock signal input, but for other cases the
2456 * clock phase may be shifted with respect to some other, unspecified
2457 * signal.
2458 *
2459 * Additionally the concept of phase shift does not propagate through
2460 * the clock tree hierarchy, which sets it apart from clock rates and
2461 * clock accuracy. A parent clock phase attribute does not have an
2462 * impact on the phase attribute of a child clock.
b2476490 2463 */
4dff95dc 2464int clk_set_phase(struct clk *clk, int degrees)
b2476490 2465{
9e4d04ad 2466 int ret;
b2476490 2467
4dff95dc
SB
2468 if (!clk)
2469 return 0;
b2476490 2470
4dff95dc
SB
2471 /* sanity check degrees */
2472 degrees %= 360;
2473 if (degrees < 0)
2474 degrees += 360;
bf47b4fd 2475
4dff95dc 2476 clk_prepare_lock();
3fa2252b 2477
55e9b8b7
JB
2478 if (clk->exclusive_count)
2479 clk_core_rate_unprotect(clk->core);
3fa2252b 2480
9e4d04ad 2481 ret = clk_core_set_phase_nolock(clk->core, degrees);
3fa2252b 2482
55e9b8b7
JB
2483 if (clk->exclusive_count)
2484 clk_core_rate_protect(clk->core);
b2476490 2485
4dff95dc 2486 clk_prepare_unlock();
dfc202ea 2487
4dff95dc
SB
2488 return ret;
2489}
2490EXPORT_SYMBOL_GPL(clk_set_phase);
b2476490 2491
4dff95dc
SB
2492static int clk_core_get_phase(struct clk_core *core)
2493{
2494 int ret;
b2476490 2495
4dff95dc 2496 clk_prepare_lock();
1f9c63e8
SL
2497 /* Always try to update cached phase if possible */
2498 if (core->ops->get_phase)
2499 core->phase = core->ops->get_phase(core->hw);
4dff95dc
SB
2500 ret = core->phase;
2501 clk_prepare_unlock();
71472c0c 2502
4dff95dc 2503 return ret;
b2476490
MT
2504}
2505
4dff95dc
SB
2506/**
2507 * clk_get_phase - return the phase shift of a clock signal
2508 * @clk: clock signal source
2509 *
2510 * Returns the phase shift of a clock node in degrees, otherwise returns
2511 * -EERROR.
2512 */
2513int clk_get_phase(struct clk *clk)
1c8e6004 2514{
4dff95dc 2515 if (!clk)
1c8e6004
TV
2516 return 0;
2517
4dff95dc
SB
2518 return clk_core_get_phase(clk->core);
2519}
2520EXPORT_SYMBOL_GPL(clk_get_phase);
1c8e6004 2521
9fba738a
JB
2522static void clk_core_reset_duty_cycle_nolock(struct clk_core *core)
2523{
2524 /* Assume a default value of 50% */
2525 core->duty.num = 1;
2526 core->duty.den = 2;
2527}
2528
2529static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core);
2530
2531static int clk_core_update_duty_cycle_nolock(struct clk_core *core)
2532{
2533 struct clk_duty *duty = &core->duty;
2534 int ret = 0;
2535
2536 if (!core->ops->get_duty_cycle)
2537 return clk_core_update_duty_cycle_parent_nolock(core);
2538
2539 ret = core->ops->get_duty_cycle(core->hw, duty);
2540 if (ret)
2541 goto reset;
2542
2543 /* Don't trust the clock provider too much */
2544 if (duty->den == 0 || duty->num > duty->den) {
2545 ret = -EINVAL;
2546 goto reset;
2547 }
2548
2549 return 0;
2550
2551reset:
2552 clk_core_reset_duty_cycle_nolock(core);
2553 return ret;
2554}
2555
2556static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core)
2557{
2558 int ret = 0;
2559
2560 if (core->parent &&
2561 core->flags & CLK_DUTY_CYCLE_PARENT) {
2562 ret = clk_core_update_duty_cycle_nolock(core->parent);
2563 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2564 } else {
2565 clk_core_reset_duty_cycle_nolock(core);
2566 }
2567
2568 return ret;
2569}
2570
2571static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
2572 struct clk_duty *duty);
2573
2574static int clk_core_set_duty_cycle_nolock(struct clk_core *core,
2575 struct clk_duty *duty)
2576{
2577 int ret;
2578
2579 lockdep_assert_held(&prepare_lock);
2580
2581 if (clk_core_rate_is_protected(core))
2582 return -EBUSY;
2583
2584 trace_clk_set_duty_cycle(core, duty);
2585
2586 if (!core->ops->set_duty_cycle)
2587 return clk_core_set_duty_cycle_parent_nolock(core, duty);
2588
2589 ret = core->ops->set_duty_cycle(core->hw, duty);
2590 if (!ret)
2591 memcpy(&core->duty, duty, sizeof(*duty));
2592
2593 trace_clk_set_duty_cycle_complete(core, duty);
2594
2595 return ret;
2596}
2597
2598static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
2599 struct clk_duty *duty)
2600{
2601 int ret = 0;
2602
2603 if (core->parent &&
2604 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
2605 ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
2606 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2607 }
2608
2609 return ret;
2610}
2611
2612/**
2613 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
2614 * @clk: clock signal source
2615 * @num: numerator of the duty cycle ratio to be applied
2616 * @den: denominator of the duty cycle ratio to be applied
2617 *
2618 * Apply the duty cycle ratio if the ratio is valid and the clock can
2619 * perform this operation
2620 *
2621 * Returns (0) on success, a negative errno otherwise.
2622 */
2623int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den)
2624{
2625 int ret;
2626 struct clk_duty duty;
2627
2628 if (!clk)
2629 return 0;
2630
2631 /* sanity check the ratio */
2632 if (den == 0 || num > den)
2633 return -EINVAL;
2634
2635 duty.num = num;
2636 duty.den = den;
2637
2638 clk_prepare_lock();
2639
2640 if (clk->exclusive_count)
2641 clk_core_rate_unprotect(clk->core);
2642
2643 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
2644
2645 if (clk->exclusive_count)
2646 clk_core_rate_protect(clk->core);
2647
2648 clk_prepare_unlock();
2649
2650 return ret;
2651}
2652EXPORT_SYMBOL_GPL(clk_set_duty_cycle);
2653
2654static int clk_core_get_scaled_duty_cycle(struct clk_core *core,
2655 unsigned int scale)
2656{
2657 struct clk_duty *duty = &core->duty;
2658 int ret;
2659
2660 clk_prepare_lock();
2661
2662 ret = clk_core_update_duty_cycle_nolock(core);
2663 if (!ret)
2664 ret = mult_frac(scale, duty->num, duty->den);
2665
2666 clk_prepare_unlock();
2667
2668 return ret;
2669}
2670
2671/**
2672 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
2673 * @clk: clock signal source
2674 * @scale: scaling factor to be applied to represent the ratio as an integer
2675 *
2676 * Returns the duty cycle ratio of a clock node multiplied by the provided
2677 * scaling factor, or negative errno on error.
2678 */
2679int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale)
2680{
2681 if (!clk)
2682 return 0;
2683
2684 return clk_core_get_scaled_duty_cycle(clk->core, scale);
2685}
2686EXPORT_SYMBOL_GPL(clk_get_scaled_duty_cycle);
2687
4dff95dc
SB
2688/**
2689 * clk_is_match - check if two clk's point to the same hardware clock
2690 * @p: clk compared against q
2691 * @q: clk compared against p
2692 *
2693 * Returns true if the two struct clk pointers both point to the same hardware
2694 * clock node. Put differently, returns true if struct clk *p and struct clk *q
2695 * share the same struct clk_core object.
2696 *
2697 * Returns false otherwise. Note that two NULL clks are treated as matching.
2698 */
2699bool clk_is_match(const struct clk *p, const struct clk *q)
2700{
2701 /* trivial case: identical struct clk's or both NULL */
2702 if (p == q)
2703 return true;
1c8e6004 2704
3fe003f9 2705 /* true if clk->core pointers match. Avoid dereferencing garbage */
4dff95dc
SB
2706 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
2707 if (p->core == q->core)
2708 return true;
1c8e6004 2709
4dff95dc
SB
2710 return false;
2711}
2712EXPORT_SYMBOL_GPL(clk_is_match);
1c8e6004 2713
4dff95dc 2714/*** debugfs support ***/
1c8e6004 2715
4dff95dc
SB
2716#ifdef CONFIG_DEBUG_FS
2717#include <linux/debugfs.h>
1c8e6004 2718
4dff95dc
SB
2719static struct dentry *rootdir;
2720static int inited = 0;
2721static DEFINE_MUTEX(clk_debug_lock);
2722static HLIST_HEAD(clk_debug_list);
1c8e6004 2723
4dff95dc
SB
2724static struct hlist_head *all_lists[] = {
2725 &clk_root_list,
2726 &clk_orphan_list,
2727 NULL,
2728};
2729
2730static struct hlist_head *orphan_list[] = {
2731 &clk_orphan_list,
2732 NULL,
2733};
2734
2735static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
2736 int level)
b2476490 2737{
4dff95dc
SB
2738 if (!c)
2739 return;
b2476490 2740
9fba738a 2741 seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu %5d %6d\n",
4dff95dc
SB
2742 level * 3 + 1, "",
2743 30 - level * 3, c->name,
e55a839a
JB
2744 c->enable_count, c->prepare_count, c->protect_count,
2745 clk_core_get_rate(c), clk_core_get_accuracy(c),
9fba738a
JB
2746 clk_core_get_phase(c),
2747 clk_core_get_scaled_duty_cycle(c, 100000));
4dff95dc 2748}
89ac8d7a 2749
4dff95dc
SB
2750static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
2751 int level)
2752{
2753 struct clk_core *child;
b2476490 2754
4dff95dc
SB
2755 if (!c)
2756 return;
b2476490 2757
4dff95dc 2758 clk_summary_show_one(s, c, level);
0e1c0301 2759
4dff95dc
SB
2760 hlist_for_each_entry(child, &c->children, child_node)
2761 clk_summary_show_subtree(s, child, level + 1);
1c8e6004 2762}
b2476490 2763
4dff95dc 2764static int clk_summary_show(struct seq_file *s, void *data)
1c8e6004 2765{
4dff95dc
SB
2766 struct clk_core *c;
2767 struct hlist_head **lists = (struct hlist_head **)s->private;
1c8e6004 2768
9fba738a
JB
2769 seq_puts(s, " enable prepare protect duty\n");
2770 seq_puts(s, " clock count count count rate accuracy phase cycle\n");
2771 seq_puts(s, "---------------------------------------------------------------------------------------------\n");
b2476490 2772
1c8e6004
TV
2773 clk_prepare_lock();
2774
4dff95dc
SB
2775 for (; *lists; lists++)
2776 hlist_for_each_entry(c, *lists, child_node)
2777 clk_summary_show_subtree(s, c, 0);
b2476490 2778
eab89f69 2779 clk_prepare_unlock();
b2476490 2780
4dff95dc 2781 return 0;
b2476490 2782}
fec0ef3f 2783DEFINE_SHOW_ATTRIBUTE(clk_summary);
b2476490 2784
4dff95dc
SB
2785static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
2786{
2787 if (!c)
2788 return;
b2476490 2789
7cb81136 2790 /* This should be JSON format, i.e. elements separated with a comma */
4dff95dc
SB
2791 seq_printf(s, "\"%s\": { ", c->name);
2792 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
2793 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
e55a839a 2794 seq_printf(s, "\"protect_count\": %d,", c->protect_count);
7cb81136
SW
2795 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
2796 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
c6e90997 2797 seq_printf(s, "\"phase\": %d,", clk_core_get_phase(c));
9fba738a
JB
2798 seq_printf(s, "\"duty_cycle\": %u",
2799 clk_core_get_scaled_duty_cycle(c, 100000));
b2476490 2800}
b2476490 2801
4dff95dc 2802static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
b2476490 2803{
4dff95dc 2804 struct clk_core *child;
b2476490 2805
4dff95dc
SB
2806 if (!c)
2807 return;
b2476490 2808
4dff95dc 2809 clk_dump_one(s, c, level);
b2476490 2810
4dff95dc 2811 hlist_for_each_entry(child, &c->children, child_node) {
4d327586 2812 seq_putc(s, ',');
4dff95dc 2813 clk_dump_subtree(s, child, level + 1);
b2476490
MT
2814 }
2815
4d327586 2816 seq_putc(s, '}');
b2476490
MT
2817}
2818
fec0ef3f 2819static int clk_dump_show(struct seq_file *s, void *data)
4e88f3de 2820{
4dff95dc
SB
2821 struct clk_core *c;
2822 bool first_node = true;
2823 struct hlist_head **lists = (struct hlist_head **)s->private;
4e88f3de 2824
4d327586 2825 seq_putc(s, '{');
4dff95dc 2826 clk_prepare_lock();
035a61c3 2827
4dff95dc
SB
2828 for (; *lists; lists++) {
2829 hlist_for_each_entry(c, *lists, child_node) {
2830 if (!first_node)
4d327586 2831 seq_putc(s, ',');
4dff95dc
SB
2832 first_node = false;
2833 clk_dump_subtree(s, c, 0);
2834 }
2835 }
4e88f3de 2836
4dff95dc 2837 clk_prepare_unlock();
4e88f3de 2838
70e9f4dd 2839 seq_puts(s, "}\n");
4dff95dc 2840 return 0;
4e88f3de 2841}
fec0ef3f 2842DEFINE_SHOW_ATTRIBUTE(clk_dump);
89ac8d7a 2843
a6059ab9
GU
2844static const struct {
2845 unsigned long flag;
2846 const char *name;
2847} clk_flags[] = {
40dd71c7 2848#define ENTRY(f) { f, #f }
a6059ab9
GU
2849 ENTRY(CLK_SET_RATE_GATE),
2850 ENTRY(CLK_SET_PARENT_GATE),
2851 ENTRY(CLK_SET_RATE_PARENT),
2852 ENTRY(CLK_IGNORE_UNUSED),
2853 ENTRY(CLK_IS_BASIC),
2854 ENTRY(CLK_GET_RATE_NOCACHE),
2855 ENTRY(CLK_SET_RATE_NO_REPARENT),
2856 ENTRY(CLK_GET_ACCURACY_NOCACHE),
2857 ENTRY(CLK_RECALC_NEW_RATES),
2858 ENTRY(CLK_SET_RATE_UNGATE),
2859 ENTRY(CLK_IS_CRITICAL),
2860 ENTRY(CLK_OPS_PARENT_ENABLE),
9fba738a 2861 ENTRY(CLK_DUTY_CYCLE_PARENT),
a6059ab9
GU
2862#undef ENTRY
2863};
2864
fec0ef3f 2865static int clk_flags_show(struct seq_file *s, void *data)
a6059ab9
GU
2866{
2867 struct clk_core *core = s->private;
2868 unsigned long flags = core->flags;
2869 unsigned int i;
2870
2871 for (i = 0; flags && i < ARRAY_SIZE(clk_flags); i++) {
2872 if (flags & clk_flags[i].flag) {
2873 seq_printf(s, "%s\n", clk_flags[i].name);
2874 flags &= ~clk_flags[i].flag;
2875 }
2876 }
2877 if (flags) {
2878 /* Unknown flags */
2879 seq_printf(s, "0x%lx\n", flags);
2880 }
2881
2882 return 0;
2883}
fec0ef3f 2884DEFINE_SHOW_ATTRIBUTE(clk_flags);
a6059ab9 2885
fec0ef3f 2886static int possible_parents_show(struct seq_file *s, void *data)
92031575
PDS
2887{
2888 struct clk_core *core = s->private;
2889 int i;
2890
2891 for (i = 0; i < core->num_parents - 1; i++)
2892 seq_printf(s, "%s ", core->parent_names[i]);
2893
2894 seq_printf(s, "%s\n", core->parent_names[i]);
2895
2896 return 0;
2897}
fec0ef3f 2898DEFINE_SHOW_ATTRIBUTE(possible_parents);
92031575 2899
9fba738a
JB
2900static int clk_duty_cycle_show(struct seq_file *s, void *data)
2901{
2902 struct clk_core *core = s->private;
2903 struct clk_duty *duty = &core->duty;
2904
2905 seq_printf(s, "%u/%u\n", duty->num, duty->den);
2906
2907 return 0;
2908}
2909DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle);
2910
8a26bbbb 2911static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
4dff95dc 2912{
8a26bbbb 2913 struct dentry *root;
b61c43c0 2914
8a26bbbb
GKH
2915 if (!core || !pdentry)
2916 return;
b2476490 2917
8a26bbbb
GKH
2918 root = debugfs_create_dir(core->name, pdentry);
2919 core->dentry = root;
92031575 2920
8a26bbbb
GKH
2921 debugfs_create_ulong("clk_rate", 0444, root, &core->rate);
2922 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
2923 debugfs_create_u32("clk_phase", 0444, root, &core->phase);
2924 debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops);
2925 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
2926 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
2927 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
2928 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
9fba738a
JB
2929 debugfs_create_file("clk_duty_cycle", 0444, root, core,
2930 &clk_duty_cycle_fops);
b2476490 2931
8a26bbbb
GKH
2932 if (core->num_parents > 1)
2933 debugfs_create_file("clk_possible_parents", 0444, root, core,
2934 &possible_parents_fops);
b2476490 2935
8a26bbbb
GKH
2936 if (core->ops->debug_init)
2937 core->ops->debug_init(core->hw, core->dentry);
b2476490 2938}
035a61c3
TV
2939
2940/**
6e5ab41b
SB
2941 * clk_debug_register - add a clk node to the debugfs clk directory
2942 * @core: the clk being added to the debugfs clk directory
035a61c3 2943 *
6e5ab41b
SB
2944 * Dynamically adds a clk to the debugfs clk directory if debugfs has been
2945 * initialized. Otherwise it bails out early since the debugfs clk directory
4dff95dc 2946 * will be created lazily by clk_debug_init as part of a late_initcall.
035a61c3 2947 */
8a26bbbb 2948static void clk_debug_register(struct clk_core *core)
035a61c3 2949{
4dff95dc
SB
2950 mutex_lock(&clk_debug_lock);
2951 hlist_add_head(&core->debug_node, &clk_debug_list);
db3188fa 2952 if (inited)
8a26bbbb 2953 clk_debug_create_one(core, rootdir);
4dff95dc 2954 mutex_unlock(&clk_debug_lock);
035a61c3 2955}
b2476490 2956
4dff95dc 2957 /**
6e5ab41b
SB
2958 * clk_debug_unregister - remove a clk node from the debugfs clk directory
2959 * @core: the clk being removed from the debugfs clk directory
e59c5371 2960 *
6e5ab41b
SB
2961 * Dynamically removes a clk and all its child nodes from the
2962 * debugfs clk directory if clk->dentry points to debugfs created by
706d5c73 2963 * clk_debug_register in __clk_core_init.
e59c5371 2964 */
4dff95dc 2965static void clk_debug_unregister(struct clk_core *core)
e59c5371 2966{
4dff95dc
SB
2967 mutex_lock(&clk_debug_lock);
2968 hlist_del_init(&core->debug_node);
2969 debugfs_remove_recursive(core->dentry);
2970 core->dentry = NULL;
2971 mutex_unlock(&clk_debug_lock);
2972}
e59c5371 2973
4dff95dc 2974/**
6e5ab41b 2975 * clk_debug_init - lazily populate the debugfs clk directory
4dff95dc 2976 *
6e5ab41b
SB
2977 * clks are often initialized very early during boot before memory can be
2978 * dynamically allocated and well before debugfs is setup. This function
2979 * populates the debugfs clk directory once at boot-time when we know that
2980 * debugfs is setup. It should only be called once at boot-time, all other clks
2981 * added dynamically will be done so with clk_debug_register.
4dff95dc
SB
2982 */
2983static int __init clk_debug_init(void)
2984{
2985 struct clk_core *core;
dfc202ea 2986
4dff95dc 2987 rootdir = debugfs_create_dir("clk", NULL);
e59c5371 2988
8a26bbbb
GKH
2989 debugfs_create_file("clk_summary", 0444, rootdir, &all_lists,
2990 &clk_summary_fops);
2991 debugfs_create_file("clk_dump", 0444, rootdir, &all_lists,
2992 &clk_dump_fops);
2993 debugfs_create_file("clk_orphan_summary", 0444, rootdir, &orphan_list,
2994 &clk_summary_fops);
2995 debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list,
2996 &clk_dump_fops);
e59c5371 2997
4dff95dc
SB
2998 mutex_lock(&clk_debug_lock);
2999 hlist_for_each_entry(core, &clk_debug_list, debug_node)
3000 clk_debug_create_one(core, rootdir);
e59c5371 3001
4dff95dc
SB
3002 inited = 1;
3003 mutex_unlock(&clk_debug_lock);
e59c5371 3004
4dff95dc
SB
3005 return 0;
3006}
3007late_initcall(clk_debug_init);
3008#else
8a26bbbb 3009static inline void clk_debug_register(struct clk_core *core) { }
4dff95dc
SB
3010static inline void clk_debug_reparent(struct clk_core *core,
3011 struct clk_core *new_parent)
035a61c3 3012{
035a61c3 3013}
4dff95dc 3014static inline void clk_debug_unregister(struct clk_core *core)
3d3801ef 3015{
3d3801ef 3016}
4dff95dc 3017#endif
3d3801ef 3018
b2476490 3019/**
be45ebf2 3020 * __clk_core_init - initialize the data structures in a struct clk_core
d35c80c2 3021 * @core: clk_core being initialized
b2476490 3022 *
035a61c3 3023 * Initializes the lists in struct clk_core, queries the hardware for the
b2476490 3024 * parent and rate and sets them both.
b2476490 3025 */
be45ebf2 3026static int __clk_core_init(struct clk_core *core)
b2476490 3027{
9a34b453 3028 int i, ret;
035a61c3 3029 struct clk_core *orphan;
b67bfe0d 3030 struct hlist_node *tmp2;
1c8e6004 3031 unsigned long rate;
b2476490 3032
d35c80c2 3033 if (!core)
d1302a36 3034 return -EINVAL;
b2476490 3035
eab89f69 3036 clk_prepare_lock();
b2476490 3037
9a34b453
MS
3038 ret = clk_pm_runtime_get(core);
3039 if (ret)
3040 goto unlock;
3041
b2476490 3042 /* check to see if a clock with this name is already registered */
d6968fca 3043 if (clk_core_lookup(core->name)) {
d1302a36 3044 pr_debug("%s: clk %s already initialized\n",
d6968fca 3045 __func__, core->name);
d1302a36 3046 ret = -EEXIST;
b2476490 3047 goto out;
d1302a36 3048 }
b2476490 3049
5fb94e9c 3050 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */
d6968fca
SB
3051 if (core->ops->set_rate &&
3052 !((core->ops->round_rate || core->ops->determine_rate) &&
3053 core->ops->recalc_rate)) {
c44fccb5
MY
3054 pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
3055 __func__, core->name);
d1302a36 3056 ret = -EINVAL;
d4d7e3dd
MT
3057 goto out;
3058 }
3059
d6968fca 3060 if (core->ops->set_parent && !core->ops->get_parent) {
c44fccb5
MY
3061 pr_err("%s: %s must implement .get_parent & .set_parent\n",
3062 __func__, core->name);
d1302a36 3063 ret = -EINVAL;
d4d7e3dd
MT
3064 goto out;
3065 }
3066
3c8e77dd
MY
3067 if (core->num_parents > 1 && !core->ops->get_parent) {
3068 pr_err("%s: %s must implement .get_parent as it has multi parents\n",
3069 __func__, core->name);
3070 ret = -EINVAL;
3071 goto out;
3072 }
3073
d6968fca
SB
3074 if (core->ops->set_rate_and_parent &&
3075 !(core->ops->set_parent && core->ops->set_rate)) {
c44fccb5 3076 pr_err("%s: %s must implement .set_parent & .set_rate\n",
d6968fca 3077 __func__, core->name);
3fa2252b
SB
3078 ret = -EINVAL;
3079 goto out;
3080 }
3081
b2476490 3082 /* throw a WARN if any entries in parent_names are NULL */
d6968fca
SB
3083 for (i = 0; i < core->num_parents; i++)
3084 WARN(!core->parent_names[i],
b2476490 3085 "%s: invalid NULL in %s's .parent_names\n",
d6968fca 3086 __func__, core->name);
b2476490 3087
d6968fca 3088 core->parent = __clk_init_parent(core);
b2476490
MT
3089
3090 /*
706d5c73
SB
3091 * Populate core->parent if parent has already been clk_core_init'd. If
3092 * parent has not yet been clk_core_init'd then place clk in the orphan
47b0eeb3 3093 * list. If clk doesn't have any parents then place it in the root
b2476490
MT
3094 * clk list.
3095 *
3096 * Every time a new clk is clk_init'd then we walk the list of orphan
3097 * clocks and re-parent any that are children of the clock currently
3098 * being clk_init'd.
3099 */
e6500344 3100 if (core->parent) {
d6968fca
SB
3101 hlist_add_head(&core->child_node,
3102 &core->parent->children);
e6500344 3103 core->orphan = core->parent->orphan;
47b0eeb3 3104 } else if (!core->num_parents) {
d6968fca 3105 hlist_add_head(&core->child_node, &clk_root_list);
e6500344
HS
3106 core->orphan = false;
3107 } else {
d6968fca 3108 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
3109 core->orphan = true;
3110 }
b2476490 3111
541debae
JB
3112 /*
3113 * optional platform-specific magic
3114 *
3115 * The .init callback is not used by any of the basic clock types, but
3116 * exists for weird hardware that must perform initialization magic.
3117 * Please consider other ways of solving initialization problems before
3118 * using this callback, as its use is discouraged.
3119 */
3120 if (core->ops->init)
3121 core->ops->init(core->hw);
3122
5279fc40
BB
3123 /*
3124 * Set clk's accuracy. The preferred method is to use
3125 * .recalc_accuracy. For simple clocks and lazy developers the default
3126 * fallback is to use the parent's accuracy. If a clock doesn't have a
3127 * parent (or is orphaned) then accuracy is set to zero (perfect
3128 * clock).
3129 */
d6968fca
SB
3130 if (core->ops->recalc_accuracy)
3131 core->accuracy = core->ops->recalc_accuracy(core->hw,
3132 __clk_get_accuracy(core->parent));
3133 else if (core->parent)
3134 core->accuracy = core->parent->accuracy;
5279fc40 3135 else
d6968fca 3136 core->accuracy = 0;
5279fc40 3137
9824cf73
MR
3138 /*
3139 * Set clk's phase.
3140 * Since a phase is by definition relative to its parent, just
3141 * query the current clock phase, or just assume it's in phase.
3142 */
d6968fca
SB
3143 if (core->ops->get_phase)
3144 core->phase = core->ops->get_phase(core->hw);
9824cf73 3145 else
d6968fca 3146 core->phase = 0;
9824cf73 3147
9fba738a
JB
3148 /*
3149 * Set clk's duty cycle.
3150 */
3151 clk_core_update_duty_cycle_nolock(core);
3152
b2476490
MT
3153 /*
3154 * Set clk's rate. The preferred method is to use .recalc_rate. For
3155 * simple clocks and lazy developers the default fallback is to use the
3156 * parent's rate. If a clock doesn't have a parent (or is orphaned)
3157 * then rate is set to zero.
3158 */
d6968fca
SB
3159 if (core->ops->recalc_rate)
3160 rate = core->ops->recalc_rate(core->hw,
3161 clk_core_get_rate_nolock(core->parent));
3162 else if (core->parent)
3163 rate = core->parent->rate;
b2476490 3164 else
1c8e6004 3165 rate = 0;
d6968fca 3166 core->rate = core->req_rate = rate;
b2476490 3167
99652a46
JB
3168 /*
3169 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
3170 * don't get accidentally disabled when walking the orphan tree and
3171 * reparenting clocks
3172 */
3173 if (core->flags & CLK_IS_CRITICAL) {
3174 unsigned long flags;
3175
3176 clk_core_prepare(core);
3177
3178 flags = clk_enable_lock();
3179 clk_core_enable(core);
3180 clk_enable_unlock(flags);
3181 }
3182
b2476490 3183 /*
0e8f6e49
MY
3184 * walk the list of orphan clocks and reparent any that newly finds a
3185 * parent.
b2476490 3186 */
b67bfe0d 3187 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
0e8f6e49 3188 struct clk_core *parent = __clk_init_parent(orphan);
1f61e5f1 3189
904e6ead 3190 /*
99652a46
JB
3191 * We need to use __clk_set_parent_before() and _after() to
3192 * to properly migrate any prepare/enable count of the orphan
3193 * clock. This is important for CLK_IS_CRITICAL clocks, which
3194 * are enabled during init but might not have a parent yet.
904e6ead
MT
3195 */
3196 if (parent) {
f8f8f1d0 3197 /* update the clk tree topology */
99652a46
JB
3198 __clk_set_parent_before(orphan, parent);
3199 __clk_set_parent_after(orphan, parent, NULL);
904e6ead
MT
3200 __clk_recalc_accuracies(orphan);
3201 __clk_recalc_rates(orphan, 0);
3202 }
0e8f6e49 3203 }
b2476490 3204
d6968fca 3205 kref_init(&core->ref);
b2476490 3206out:
9a34b453
MS
3207 clk_pm_runtime_put(core);
3208unlock:
eab89f69 3209 clk_prepare_unlock();
b2476490 3210
89f7e9de 3211 if (!ret)
d6968fca 3212 clk_debug_register(core);
89f7e9de 3213
d1302a36 3214 return ret;
b2476490
MT
3215}
3216
1df4046a
SB
3217/**
3218 * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core
3219 * @core: clk to add consumer to
3220 * @clk: consumer to link to a clk
3221 */
3222static void clk_core_link_consumer(struct clk_core *core, struct clk *clk)
3223{
3224 clk_prepare_lock();
3225 hlist_add_head(&clk->clks_node, &core->clks);
3226 clk_prepare_unlock();
3227}
3228
3229/**
3230 * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core
3231 * @clk: consumer to unlink
3232 */
3233static void clk_core_unlink_consumer(struct clk *clk)
3234{
3235 lockdep_assert_held(&prepare_lock);
3236 hlist_del(&clk->clks_node);
3237}
3238
3239/**
3240 * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core
3241 * @core: clk to allocate a consumer for
3242 * @dev_id: string describing device name
3243 * @con_id: connection ID string on device
3244 *
3245 * Returns: clk consumer left unlinked from the consumer list
3246 */
3247static struct clk *alloc_clk(struct clk_core *core, const char *dev_id,
035a61c3 3248 const char *con_id)
0197b3ea 3249{
0197b3ea
SK
3250 struct clk *clk;
3251
035a61c3
TV
3252 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
3253 if (!clk)
3254 return ERR_PTR(-ENOMEM);
3255
1df4046a 3256 clk->core = core;
035a61c3 3257 clk->dev_id = dev_id;
253160a8 3258 clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
1c8e6004
TV
3259 clk->max_rate = ULONG_MAX;
3260
0197b3ea
SK
3261 return clk;
3262}
035a61c3 3263
1df4046a
SB
3264/**
3265 * free_clk - Free a clk consumer
3266 * @clk: clk consumer to free
3267 *
3268 * Note, this assumes the clk has been unlinked from the clk_core consumer
3269 * list.
3270 */
3271static void free_clk(struct clk *clk)
1c8e6004 3272{
253160a8 3273 kfree_const(clk->con_id);
1c8e6004
TV
3274 kfree(clk);
3275}
0197b3ea 3276
1df4046a
SB
3277/**
3278 * clk_hw_create_clk: Allocate and link a clk consumer to a clk_core given
3279 * a clk_hw
efa85048 3280 * @dev: clk consumer device
1df4046a
SB
3281 * @hw: clk_hw associated with the clk being consumed
3282 * @dev_id: string describing device name
3283 * @con_id: connection ID string on device
3284 *
3285 * This is the main function used to create a clk pointer for use by clk
3286 * consumers. It connects a consumer to the clk_core and clk_hw structures
3287 * used by the framework and clk provider respectively.
3288 */
efa85048 3289struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw,
1df4046a
SB
3290 const char *dev_id, const char *con_id)
3291{
3292 struct clk *clk;
3293 struct clk_core *core;
3294
3295 /* This is to allow this function to be chained to others */
3296 if (IS_ERR_OR_NULL(hw))
3297 return ERR_CAST(hw);
3298
3299 core = hw->core;
3300 clk = alloc_clk(core, dev_id, con_id);
3301 if (IS_ERR(clk))
3302 return clk;
efa85048 3303 clk->dev = dev;
1df4046a
SB
3304
3305 if (!try_module_get(core->owner)) {
3306 free_clk(clk);
3307 return ERR_PTR(-ENOENT);
3308 }
3309
3310 kref_get(&core->ref);
3311 clk_core_link_consumer(core, clk);
3312
3313 return clk;
3314}
3315
293ba3b4
SB
3316/**
3317 * clk_register - allocate a new clock, register it and return an opaque cookie
3318 * @dev: device that is registering this clock
3319 * @hw: link to hardware-specific clock data
3320 *
3321 * clk_register is the primary interface for populating the clock tree with new
3322 * clock nodes. It returns a pointer to the newly allocated struct clk which
a59a5163 3323 * cannot be dereferenced by driver code but may be used in conjunction with the
293ba3b4
SB
3324 * rest of the clock API. In the event of an error clk_register will return an
3325 * error code; drivers must test for an error code after calling clk_register.
3326 */
3327struct clk *clk_register(struct device *dev, struct clk_hw *hw)
b2476490 3328{
d1302a36 3329 int i, ret;
d6968fca 3330 struct clk_core *core;
293ba3b4 3331
d6968fca
SB
3332 core = kzalloc(sizeof(*core), GFP_KERNEL);
3333 if (!core) {
293ba3b4
SB
3334 ret = -ENOMEM;
3335 goto fail_out;
3336 }
b2476490 3337
d6968fca
SB
3338 core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
3339 if (!core->name) {
0197b3ea
SK
3340 ret = -ENOMEM;
3341 goto fail_name;
3342 }
29fd2a34
JB
3343
3344 if (WARN_ON(!hw->init->ops)) {
3345 ret = -EINVAL;
3346 goto fail_ops;
3347 }
d6968fca 3348 core->ops = hw->init->ops;
29fd2a34 3349
9a34b453 3350 if (dev && pm_runtime_enabled(dev))
24478839
MR
3351 core->rpm_enabled = true;
3352 core->dev = dev;
ac2df527 3353 if (dev && dev->driver)
d6968fca
SB
3354 core->owner = dev->driver->owner;
3355 core->hw = hw;
3356 core->flags = hw->init->flags;
3357 core->num_parents = hw->init->num_parents;
9783c0d9
SB
3358 core->min_rate = 0;
3359 core->max_rate = ULONG_MAX;
d6968fca 3360 hw->core = core;
b2476490 3361
d1302a36 3362 /* allocate local copy in case parent_names is __initdata */
d6968fca 3363 core->parent_names = kcalloc(core->num_parents, sizeof(char *),
96a7ed90 3364 GFP_KERNEL);
d1302a36 3365
d6968fca 3366 if (!core->parent_names) {
d1302a36
MT
3367 ret = -ENOMEM;
3368 goto fail_parent_names;
3369 }
3370
3371
3372 /* copy each string name in case parent_names is __initdata */
d6968fca
SB
3373 for (i = 0; i < core->num_parents; i++) {
3374 core->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
0197b3ea 3375 GFP_KERNEL);
d6968fca 3376 if (!core->parent_names[i]) {
d1302a36
MT
3377 ret = -ENOMEM;
3378 goto fail_parent_names_copy;
3379 }
3380 }
3381
176d1169
MY
3382 /* avoid unnecessary string look-ups of clk_core's possible parents. */
3383 core->parents = kcalloc(core->num_parents, sizeof(*core->parents),
3384 GFP_KERNEL);
3385 if (!core->parents) {
3386 ret = -ENOMEM;
3387 goto fail_parents;
3388 };
3389
d6968fca 3390 INIT_HLIST_HEAD(&core->clks);
1c8e6004 3391
1df4046a
SB
3392 /*
3393 * Don't call clk_hw_create_clk() here because that would pin the
3394 * provider module to itself and prevent it from ever being removed.
3395 */
3396 hw->clk = alloc_clk(core, NULL, NULL);
035a61c3 3397 if (IS_ERR(hw->clk)) {
035a61c3 3398 ret = PTR_ERR(hw->clk);
176d1169 3399 goto fail_parents;
035a61c3
TV
3400 }
3401
1df4046a
SB
3402 clk_core_link_consumer(hw->core, hw->clk);
3403
be45ebf2 3404 ret = __clk_core_init(core);
d1302a36 3405 if (!ret)
035a61c3 3406 return hw->clk;
b2476490 3407
1df4046a
SB
3408 clk_prepare_lock();
3409 clk_core_unlink_consumer(hw->clk);
3410 clk_prepare_unlock();
3411
3412 free_clk(hw->clk);
035a61c3 3413 hw->clk = NULL;
b2476490 3414
176d1169
MY
3415fail_parents:
3416 kfree(core->parents);
d1302a36
MT
3417fail_parent_names_copy:
3418 while (--i >= 0)
d6968fca
SB
3419 kfree_const(core->parent_names[i]);
3420 kfree(core->parent_names);
d1302a36 3421fail_parent_names:
29fd2a34 3422fail_ops:
d6968fca 3423 kfree_const(core->name);
0197b3ea 3424fail_name:
d6968fca 3425 kfree(core);
d1302a36
MT
3426fail_out:
3427 return ERR_PTR(ret);
b2476490
MT
3428}
3429EXPORT_SYMBOL_GPL(clk_register);
3430
4143804c
SB
3431/**
3432 * clk_hw_register - register a clk_hw and return an error code
3433 * @dev: device that is registering this clock
3434 * @hw: link to hardware-specific clock data
3435 *
3436 * clk_hw_register is the primary interface for populating the clock tree with
3437 * new clock nodes. It returns an integer equal to zero indicating success or
3438 * less than zero indicating failure. Drivers must test for an error code after
3439 * calling clk_hw_register().
3440 */
3441int clk_hw_register(struct device *dev, struct clk_hw *hw)
3442{
3443 return PTR_ERR_OR_ZERO(clk_register(dev, hw));
3444}
3445EXPORT_SYMBOL_GPL(clk_hw_register);
3446
6e5ab41b 3447/* Free memory allocated for a clock. */
fcb0ee6a
SN
3448static void __clk_release(struct kref *ref)
3449{
d6968fca
SB
3450 struct clk_core *core = container_of(ref, struct clk_core, ref);
3451 int i = core->num_parents;
fcb0ee6a 3452
496eadf8
KK
3453 lockdep_assert_held(&prepare_lock);
3454
d6968fca 3455 kfree(core->parents);
fcb0ee6a 3456 while (--i >= 0)
d6968fca 3457 kfree_const(core->parent_names[i]);
fcb0ee6a 3458
d6968fca
SB
3459 kfree(core->parent_names);
3460 kfree_const(core->name);
3461 kfree(core);
fcb0ee6a
SN
3462}
3463
3464/*
3465 * Empty clk_ops for unregistered clocks. These are used temporarily
3466 * after clk_unregister() was called on a clock and until last clock
3467 * consumer calls clk_put() and the struct clk object is freed.
3468 */
3469static int clk_nodrv_prepare_enable(struct clk_hw *hw)
3470{
3471 return -ENXIO;
3472}
3473
3474static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
3475{
3476 WARN_ON_ONCE(1);
3477}
3478
3479static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
3480 unsigned long parent_rate)
3481{
3482 return -ENXIO;
3483}
3484
3485static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
3486{
3487 return -ENXIO;
3488}
3489
3490static const struct clk_ops clk_nodrv_ops = {
3491 .enable = clk_nodrv_prepare_enable,
3492 .disable = clk_nodrv_disable_unprepare,
3493 .prepare = clk_nodrv_prepare_enable,
3494 .unprepare = clk_nodrv_disable_unprepare,
3495 .set_rate = clk_nodrv_set_rate,
3496 .set_parent = clk_nodrv_set_parent,
3497};
3498
1df5c939
MB
3499/**
3500 * clk_unregister - unregister a currently registered clock
3501 * @clk: clock to unregister
1df5c939 3502 */
fcb0ee6a
SN
3503void clk_unregister(struct clk *clk)
3504{
3505 unsigned long flags;
3506
6314b679
SB
3507 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
3508 return;
3509
035a61c3 3510 clk_debug_unregister(clk->core);
fcb0ee6a
SN
3511
3512 clk_prepare_lock();
3513
035a61c3
TV
3514 if (clk->core->ops == &clk_nodrv_ops) {
3515 pr_err("%s: unregistered clock: %s\n", __func__,
3516 clk->core->name);
4106a3d9 3517 goto unlock;
fcb0ee6a
SN
3518 }
3519 /*
3520 * Assign empty clock ops for consumers that might still hold
3521 * a reference to this clock.
3522 */
3523 flags = clk_enable_lock();
035a61c3 3524 clk->core->ops = &clk_nodrv_ops;
fcb0ee6a
SN
3525 clk_enable_unlock(flags);
3526
035a61c3
TV
3527 if (!hlist_empty(&clk->core->children)) {
3528 struct clk_core *child;
874f224c 3529 struct hlist_node *t;
fcb0ee6a
SN
3530
3531 /* Reparent all children to the orphan list. */
035a61c3
TV
3532 hlist_for_each_entry_safe(child, t, &clk->core->children,
3533 child_node)
91baa9ff 3534 clk_core_set_parent_nolock(child, NULL);
fcb0ee6a
SN
3535 }
3536
035a61c3 3537 hlist_del_init(&clk->core->child_node);
fcb0ee6a 3538
035a61c3 3539 if (clk->core->prepare_count)
fcb0ee6a 3540 pr_warn("%s: unregistering prepared clock: %s\n",
035a61c3 3541 __func__, clk->core->name);
e55a839a
JB
3542
3543 if (clk->core->protect_count)
3544 pr_warn("%s: unregistering protected clock: %s\n",
3545 __func__, clk->core->name);
3546
035a61c3 3547 kref_put(&clk->core->ref, __clk_release);
4106a3d9 3548unlock:
fcb0ee6a
SN
3549 clk_prepare_unlock();
3550}
1df5c939
MB
3551EXPORT_SYMBOL_GPL(clk_unregister);
3552
4143804c
SB
3553/**
3554 * clk_hw_unregister - unregister a currently registered clk_hw
3555 * @hw: hardware-specific clock data to unregister
3556 */
3557void clk_hw_unregister(struct clk_hw *hw)
3558{
3559 clk_unregister(hw->clk);
3560}
3561EXPORT_SYMBOL_GPL(clk_hw_unregister);
3562
46c8773a
SB
3563static void devm_clk_release(struct device *dev, void *res)
3564{
293ba3b4 3565 clk_unregister(*(struct clk **)res);
46c8773a
SB
3566}
3567
4143804c
SB
3568static void devm_clk_hw_release(struct device *dev, void *res)
3569{
3570 clk_hw_unregister(*(struct clk_hw **)res);
3571}
3572
46c8773a
SB
3573/**
3574 * devm_clk_register - resource managed clk_register()
3575 * @dev: device that is registering this clock
3576 * @hw: link to hardware-specific clock data
3577 *
3578 * Managed clk_register(). Clocks returned from this function are
3579 * automatically clk_unregister()ed on driver detach. See clk_register() for
3580 * more information.
3581 */
3582struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
3583{
3584 struct clk *clk;
293ba3b4 3585 struct clk **clkp;
46c8773a 3586
293ba3b4
SB
3587 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
3588 if (!clkp)
46c8773a
SB
3589 return ERR_PTR(-ENOMEM);
3590
293ba3b4
SB
3591 clk = clk_register(dev, hw);
3592 if (!IS_ERR(clk)) {
3593 *clkp = clk;
3594 devres_add(dev, clkp);
46c8773a 3595 } else {
293ba3b4 3596 devres_free(clkp);
46c8773a
SB
3597 }
3598
3599 return clk;
3600}
3601EXPORT_SYMBOL_GPL(devm_clk_register);
3602
4143804c
SB
3603/**
3604 * devm_clk_hw_register - resource managed clk_hw_register()
3605 * @dev: device that is registering this clock
3606 * @hw: link to hardware-specific clock data
3607 *
c47265ad 3608 * Managed clk_hw_register(). Clocks registered by this function are
4143804c
SB
3609 * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register()
3610 * for more information.
3611 */
3612int devm_clk_hw_register(struct device *dev, struct clk_hw *hw)
3613{
3614 struct clk_hw **hwp;
3615 int ret;
3616
3617 hwp = devres_alloc(devm_clk_hw_release, sizeof(*hwp), GFP_KERNEL);
3618 if (!hwp)
3619 return -ENOMEM;
3620
3621 ret = clk_hw_register(dev, hw);
3622 if (!ret) {
3623 *hwp = hw;
3624 devres_add(dev, hwp);
3625 } else {
3626 devres_free(hwp);
3627 }
3628
3629 return ret;
3630}
3631EXPORT_SYMBOL_GPL(devm_clk_hw_register);
3632
46c8773a
SB
3633static int devm_clk_match(struct device *dev, void *res, void *data)
3634{
3635 struct clk *c = res;
3636 if (WARN_ON(!c))
3637 return 0;
3638 return c == data;
3639}
3640
4143804c
SB
3641static int devm_clk_hw_match(struct device *dev, void *res, void *data)
3642{
3643 struct clk_hw *hw = res;
3644
3645 if (WARN_ON(!hw))
3646 return 0;
3647 return hw == data;
3648}
3649
46c8773a
SB
3650/**
3651 * devm_clk_unregister - resource managed clk_unregister()
3652 * @clk: clock to unregister
3653 *
3654 * Deallocate a clock allocated with devm_clk_register(). Normally
3655 * this function will not need to be called and the resource management
3656 * code will ensure that the resource is freed.
3657 */
3658void devm_clk_unregister(struct device *dev, struct clk *clk)
3659{
3660 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
3661}
3662EXPORT_SYMBOL_GPL(devm_clk_unregister);
3663
4143804c
SB
3664/**
3665 * devm_clk_hw_unregister - resource managed clk_hw_unregister()
3666 * @dev: device that is unregistering the hardware-specific clock data
3667 * @hw: link to hardware-specific clock data
3668 *
3669 * Unregister a clk_hw registered with devm_clk_hw_register(). Normally
3670 * this function will not need to be called and the resource management
3671 * code will ensure that the resource is freed.
3672 */
3673void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw)
3674{
3675 WARN_ON(devres_release(dev, devm_clk_hw_release, devm_clk_hw_match,
3676 hw));
3677}
3678EXPORT_SYMBOL_GPL(devm_clk_hw_unregister);
3679
ac2df527
SN
3680/*
3681 * clkdev helpers
3682 */
ac2df527
SN
3683
3684void __clk_put(struct clk *clk)
3685{
10cdfe54
TV
3686 struct module *owner;
3687
00efcb1c 3688 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
ac2df527
SN
3689 return;
3690
fcb0ee6a 3691 clk_prepare_lock();
1c8e6004 3692
55e9b8b7
JB
3693 /*
3694 * Before calling clk_put, all calls to clk_rate_exclusive_get() from a
3695 * given user should be balanced with calls to clk_rate_exclusive_put()
3696 * and by that same consumer
3697 */
3698 if (WARN_ON(clk->exclusive_count)) {
3699 /* We voiced our concern, let's sanitize the situation */
3700 clk->core->protect_count -= (clk->exclusive_count - 1);
3701 clk_core_rate_unprotect(clk->core);
3702 clk->exclusive_count = 0;
3703 }
3704
50595f8b 3705 hlist_del(&clk->clks_node);
ec02ace8
TV
3706 if (clk->min_rate > clk->core->req_rate ||
3707 clk->max_rate < clk->core->req_rate)
3708 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
3709
1c8e6004
TV
3710 owner = clk->core->owner;
3711 kref_put(&clk->core->ref, __clk_release);
3712
fcb0ee6a
SN
3713 clk_prepare_unlock();
3714
10cdfe54 3715 module_put(owner);
035a61c3 3716
1df4046a 3717 free_clk(clk);
ac2df527
SN
3718}
3719
b2476490
MT
3720/*** clk rate change notifiers ***/
3721
3722/**
3723 * clk_notifier_register - add a clk rate change notifier
3724 * @clk: struct clk * to watch
3725 * @nb: struct notifier_block * with callback info
3726 *
3727 * Request notification when clk's rate changes. This uses an SRCU
3728 * notifier because we want it to block and notifier unregistrations are
3729 * uncommon. The callbacks associated with the notifier must not
3730 * re-enter into the clk framework by calling any top-level clk APIs;
3731 * this will cause a nested prepare_lock mutex.
3732 *
198bb594
MY
3733 * In all notification cases (pre, post and abort rate change) the original
3734 * clock rate is passed to the callback via struct clk_notifier_data.old_rate
3735 * and the new frequency is passed via struct clk_notifier_data.new_rate.
b2476490 3736 *
b2476490
MT
3737 * clk_notifier_register() must be called from non-atomic context.
3738 * Returns -EINVAL if called with null arguments, -ENOMEM upon
3739 * allocation failure; otherwise, passes along the return value of
3740 * srcu_notifier_chain_register().
3741 */
3742int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
3743{
3744 struct clk_notifier *cn;
3745 int ret = -ENOMEM;
3746
3747 if (!clk || !nb)
3748 return -EINVAL;
3749
eab89f69 3750 clk_prepare_lock();
b2476490
MT
3751
3752 /* search the list of notifiers for this clk */
3753 list_for_each_entry(cn, &clk_notifier_list, node)
3754 if (cn->clk == clk)
3755 break;
3756
3757 /* if clk wasn't in the notifier list, allocate new clk_notifier */
3758 if (cn->clk != clk) {
1808a320 3759 cn = kzalloc(sizeof(*cn), GFP_KERNEL);
b2476490
MT
3760 if (!cn)
3761 goto out;
3762
3763 cn->clk = clk;
3764 srcu_init_notifier_head(&cn->notifier_head);
3765
3766 list_add(&cn->node, &clk_notifier_list);
3767 }
3768
3769 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
3770
035a61c3 3771 clk->core->notifier_count++;
b2476490
MT
3772
3773out:
eab89f69 3774 clk_prepare_unlock();
b2476490
MT
3775
3776 return ret;
3777}
3778EXPORT_SYMBOL_GPL(clk_notifier_register);
3779
3780/**
3781 * clk_notifier_unregister - remove a clk rate change notifier
3782 * @clk: struct clk *
3783 * @nb: struct notifier_block * with callback info
3784 *
3785 * Request no further notification for changes to 'clk' and frees memory
3786 * allocated in clk_notifier_register.
3787 *
3788 * Returns -EINVAL if called with null arguments; otherwise, passes
3789 * along the return value of srcu_notifier_chain_unregister().
3790 */
3791int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
3792{
3793 struct clk_notifier *cn = NULL;
3794 int ret = -EINVAL;
3795
3796 if (!clk || !nb)
3797 return -EINVAL;
3798
eab89f69 3799 clk_prepare_lock();
b2476490
MT
3800
3801 list_for_each_entry(cn, &clk_notifier_list, node)
3802 if (cn->clk == clk)
3803 break;
3804
3805 if (cn->clk == clk) {
3806 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
3807
035a61c3 3808 clk->core->notifier_count--;
b2476490
MT
3809
3810 /* XXX the notifier code should handle this better */
3811 if (!cn->notifier_head.head) {
3812 srcu_cleanup_notifier_head(&cn->notifier_head);
72b5322f 3813 list_del(&cn->node);
b2476490
MT
3814 kfree(cn);
3815 }
3816
3817 } else {
3818 ret = -ENOENT;
3819 }
3820
eab89f69 3821 clk_prepare_unlock();
b2476490
MT
3822
3823 return ret;
3824}
3825EXPORT_SYMBOL_GPL(clk_notifier_unregister);
766e6a4e
GL
3826
3827#ifdef CONFIG_OF
3828/**
3829 * struct of_clk_provider - Clock provider registration structure
3830 * @link: Entry in global list of clock providers
3831 * @node: Pointer to device tree node of clock provider
3832 * @get: Get clock callback. Returns NULL or a struct clk for the
3833 * given clock specifier
3834 * @data: context pointer to be passed into @get callback
3835 */
3836struct of_clk_provider {
3837 struct list_head link;
3838
3839 struct device_node *node;
3840 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
0861e5b8 3841 struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data);
766e6a4e
GL
3842 void *data;
3843};
3844
f2f6c255
PG
3845static const struct of_device_id __clk_of_table_sentinel
3846 __used __section(__clk_of_table_end);
3847
766e6a4e 3848static LIST_HEAD(of_clk_providers);
d6782c26
SN
3849static DEFINE_MUTEX(of_clk_mutex);
3850
766e6a4e
GL
3851struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
3852 void *data)
3853{
3854 return data;
3855}
3856EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
3857
0861e5b8
SB
3858struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data)
3859{
3860 return data;
3861}
3862EXPORT_SYMBOL_GPL(of_clk_hw_simple_get);
3863
494bfec9
SG
3864struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
3865{
3866 struct clk_onecell_data *clk_data = data;
3867 unsigned int idx = clkspec->args[0];
3868
3869 if (idx >= clk_data->clk_num) {
7e96353c 3870 pr_err("%s: invalid clock index %u\n", __func__, idx);
494bfec9
SG
3871 return ERR_PTR(-EINVAL);
3872 }
3873
3874 return clk_data->clks[idx];
3875}
3876EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
3877
0861e5b8
SB
3878struct clk_hw *
3879of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data)
3880{
3881 struct clk_hw_onecell_data *hw_data = data;
3882 unsigned int idx = clkspec->args[0];
3883
3884 if (idx >= hw_data->num) {
3885 pr_err("%s: invalid index %u\n", __func__, idx);
3886 return ERR_PTR(-EINVAL);
3887 }
3888
3889 return hw_data->hws[idx];
3890}
3891EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get);
3892
766e6a4e
GL
3893/**
3894 * of_clk_add_provider() - Register a clock provider for a node
3895 * @np: Device node pointer associated with clock provider
3896 * @clk_src_get: callback for decoding clock
3897 * @data: context pointer for @clk_src_get callback.
3898 */
3899int of_clk_add_provider(struct device_node *np,
3900 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
3901 void *data),
3902 void *data)
3903{
3904 struct of_clk_provider *cp;
86be408b 3905 int ret;
766e6a4e 3906
1808a320 3907 cp = kzalloc(sizeof(*cp), GFP_KERNEL);
766e6a4e
GL
3908 if (!cp)
3909 return -ENOMEM;
3910
3911 cp->node = of_node_get(np);
3912 cp->data = data;
3913 cp->get = clk_src_get;
3914
d6782c26 3915 mutex_lock(&of_clk_mutex);
766e6a4e 3916 list_add(&cp->link, &of_clk_providers);
d6782c26 3917 mutex_unlock(&of_clk_mutex);
16673931 3918 pr_debug("Added clock from %pOF\n", np);
766e6a4e 3919
86be408b
SN
3920 ret = of_clk_set_defaults(np, true);
3921 if (ret < 0)
3922 of_clk_del_provider(np);
3923
3924 return ret;
766e6a4e
GL
3925}
3926EXPORT_SYMBOL_GPL(of_clk_add_provider);
3927
0861e5b8
SB
3928/**
3929 * of_clk_add_hw_provider() - Register a clock provider for a node
3930 * @np: Device node pointer associated with clock provider
3931 * @get: callback for decoding clk_hw
3932 * @data: context pointer for @get callback.
3933 */
3934int of_clk_add_hw_provider(struct device_node *np,
3935 struct clk_hw *(*get)(struct of_phandle_args *clkspec,
3936 void *data),
3937 void *data)
3938{
3939 struct of_clk_provider *cp;
3940 int ret;
3941
3942 cp = kzalloc(sizeof(*cp), GFP_KERNEL);
3943 if (!cp)
3944 return -ENOMEM;
3945
3946 cp->node = of_node_get(np);
3947 cp->data = data;
3948 cp->get_hw = get;
3949
3950 mutex_lock(&of_clk_mutex);
3951 list_add(&cp->link, &of_clk_providers);
3952 mutex_unlock(&of_clk_mutex);
16673931 3953 pr_debug("Added clk_hw provider from %pOF\n", np);
0861e5b8
SB
3954
3955 ret = of_clk_set_defaults(np, true);
3956 if (ret < 0)
3957 of_clk_del_provider(np);
3958
3959 return ret;
3960}
3961EXPORT_SYMBOL_GPL(of_clk_add_hw_provider);
3962
aa795c41
SB
3963static void devm_of_clk_release_provider(struct device *dev, void *res)
3964{
3965 of_clk_del_provider(*(struct device_node **)res);
3966}
3967
05502bf9
MV
3968/*
3969 * We allow a child device to use its parent device as the clock provider node
3970 * for cases like MFD sub-devices where the child device driver wants to use
3971 * devm_*() APIs but not list the device in DT as a sub-node.
3972 */
3973static struct device_node *get_clk_provider_node(struct device *dev)
3974{
3975 struct device_node *np, *parent_np;
3976
3977 np = dev->of_node;
3978 parent_np = dev->parent ? dev->parent->of_node : NULL;
3979
3980 if (!of_find_property(np, "#clock-cells", NULL))
3981 if (of_find_property(parent_np, "#clock-cells", NULL))
3982 np = parent_np;
3983
3984 return np;
3985}
3986
e45838b5
MV
3987/**
3988 * devm_of_clk_add_hw_provider() - Managed clk provider node registration
3989 * @dev: Device acting as the clock provider (used for DT node and lifetime)
3990 * @get: callback for decoding clk_hw
3991 * @data: context pointer for @get callback
3992 *
05502bf9
MV
3993 * Registers clock provider for given device's node. If the device has no DT
3994 * node or if the device node lacks of clock provider information (#clock-cells)
3995 * then the parent device's node is scanned for this information. If parent node
3996 * has the #clock-cells then it is used in registration. Provider is
3997 * automatically released at device exit.
e45838b5
MV
3998 *
3999 * Return: 0 on success or an errno on failure.
4000 */
aa795c41
SB
4001int devm_of_clk_add_hw_provider(struct device *dev,
4002 struct clk_hw *(*get)(struct of_phandle_args *clkspec,
4003 void *data),
4004 void *data)
4005{
4006 struct device_node **ptr, *np;
4007 int ret;
4008
4009 ptr = devres_alloc(devm_of_clk_release_provider, sizeof(*ptr),
4010 GFP_KERNEL);
4011 if (!ptr)
4012 return -ENOMEM;
4013
05502bf9 4014 np = get_clk_provider_node(dev);
aa795c41
SB
4015 ret = of_clk_add_hw_provider(np, get, data);
4016 if (!ret) {
4017 *ptr = np;
4018 devres_add(dev, ptr);
4019 } else {
4020 devres_free(ptr);
4021 }
4022
4023 return ret;
4024}
4025EXPORT_SYMBOL_GPL(devm_of_clk_add_hw_provider);
4026
766e6a4e
GL
4027/**
4028 * of_clk_del_provider() - Remove a previously registered clock provider
4029 * @np: Device node pointer associated with clock provider
4030 */
4031void of_clk_del_provider(struct device_node *np)
4032{
4033 struct of_clk_provider *cp;
4034
d6782c26 4035 mutex_lock(&of_clk_mutex);
766e6a4e
GL
4036 list_for_each_entry(cp, &of_clk_providers, link) {
4037 if (cp->node == np) {
4038 list_del(&cp->link);
4039 of_node_put(cp->node);
4040 kfree(cp);
4041 break;
4042 }
4043 }
d6782c26 4044 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
4045}
4046EXPORT_SYMBOL_GPL(of_clk_del_provider);
4047
aa795c41
SB
4048static int devm_clk_provider_match(struct device *dev, void *res, void *data)
4049{
4050 struct device_node **np = res;
4051
4052 if (WARN_ON(!np || !*np))
4053 return 0;
4054
4055 return *np == data;
4056}
4057
e45838b5
MV
4058/**
4059 * devm_of_clk_del_provider() - Remove clock provider registered using devm
4060 * @dev: Device to whose lifetime the clock provider was bound
4061 */
aa795c41
SB
4062void devm_of_clk_del_provider(struct device *dev)
4063{
4064 int ret;
05502bf9 4065 struct device_node *np = get_clk_provider_node(dev);
aa795c41
SB
4066
4067 ret = devres_release(dev, devm_of_clk_release_provider,
05502bf9 4068 devm_clk_provider_match, np);
aa795c41
SB
4069
4070 WARN_ON(ret);
4071}
4072EXPORT_SYMBOL(devm_of_clk_del_provider);
4073
5dc7e842
SB
4074/*
4075 * Beware the return values when np is valid, but no clock provider is found.
4076 * If name == NULL, the function returns -ENOENT.
4077 * If name != NULL, the function returns -EINVAL. This is because
4078 * of_parse_phandle_with_args() is called even if of_property_match_string()
4079 * returns an error.
4080 */
cf13f289
SB
4081static int of_parse_clkspec(const struct device_node *np, int index,
4082 const char *name, struct of_phandle_args *out_args)
4472287a
SB
4083{
4084 int ret = -ENOENT;
4085
4086 /* Walk up the tree of devices looking for a clock property that matches */
4087 while (np) {
4088 /*
4089 * For named clocks, first look up the name in the
4090 * "clock-names" property. If it cannot be found, then index
4091 * will be an error code and of_parse_phandle_with_args() will
4092 * return -EINVAL.
4093 */
4094 if (name)
4095 index = of_property_match_string(np, "clock-names", name);
4096 ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells",
4097 index, out_args);
4098 if (!ret)
4099 break;
4100 if (name && index >= 0)
4101 break;
4102
4103 /*
4104 * No matching clock found on this node. If the parent node
4105 * has a "clock-ranges" property, then we can try one of its
4106 * clocks.
4107 */
4108 np = np->parent;
4109 if (np && !of_get_property(np, "clock-ranges", NULL))
4110 break;
4111 index = 0;
4112 }
4113
4114 return ret;
4115}
4116
0861e5b8
SB
4117static struct clk_hw *
4118__of_clk_get_hw_from_provider(struct of_clk_provider *provider,
4119 struct of_phandle_args *clkspec)
4120{
4121 struct clk *clk;
0861e5b8 4122
74002fcd
SB
4123 if (provider->get_hw)
4124 return provider->get_hw(clkspec, provider->data);
0861e5b8 4125
74002fcd
SB
4126 clk = provider->get(clkspec, provider->data);
4127 if (IS_ERR(clk))
4128 return ERR_CAST(clk);
4129 return __clk_get_hw(clk);
0861e5b8
SB
4130}
4131
cf13f289
SB
4132static struct clk_hw *
4133of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec)
766e6a4e
GL
4134{
4135 struct of_clk_provider *provider;
1df4046a 4136 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER);
766e6a4e 4137
306c342f
SB
4138 if (!clkspec)
4139 return ERR_PTR(-EINVAL);
4140
306c342f 4141 mutex_lock(&of_clk_mutex);
766e6a4e 4142 list_for_each_entry(provider, &of_clk_providers, link) {
f155d15b 4143 if (provider->node == clkspec->np) {
0861e5b8 4144 hw = __of_clk_get_hw_from_provider(provider, clkspec);
1df4046a
SB
4145 if (!IS_ERR(hw))
4146 break;
73e0e496 4147 }
766e6a4e 4148 }
306c342f 4149 mutex_unlock(&of_clk_mutex);
d6782c26 4150
4472287a 4151 return hw;
d6782c26
SN
4152}
4153
306c342f
SB
4154/**
4155 * of_clk_get_from_provider() - Lookup a clock from a clock provider
4156 * @clkspec: pointer to a clock specifier data structure
4157 *
4158 * This function looks up a struct clk from the registered list of clock
4159 * providers, an input is a clock specifier data structure as returned
4160 * from the of_parse_phandle_with_args() function call.
4161 */
d6782c26
SN
4162struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
4163{
4472287a
SB
4164 struct clk_hw *hw = of_clk_get_hw_from_clkspec(clkspec);
4165
efa85048 4166 return clk_hw_create_clk(NULL, hw, NULL, __func__);
766e6a4e 4167}
fb4dd222 4168EXPORT_SYMBOL_GPL(of_clk_get_from_provider);
766e6a4e 4169
cf13f289
SB
4170struct clk_hw *of_clk_get_hw(struct device_node *np, int index,
4171 const char *con_id)
4172{
4173 int ret;
4174 struct clk_hw *hw;
4175 struct of_phandle_args clkspec;
4176
4177 ret = of_parse_clkspec(np, index, con_id, &clkspec);
4178 if (ret)
4179 return ERR_PTR(ret);
4180
4181 hw = of_clk_get_hw_from_clkspec(&clkspec);
4182 of_node_put(clkspec.np);
4183
4184 return hw;
4185}
4186
4187static struct clk *__of_clk_get(struct device_node *np,
4188 int index, const char *dev_id,
4189 const char *con_id)
4190{
4191 struct clk_hw *hw = of_clk_get_hw(np, index, con_id);
4192
4193 return clk_hw_create_clk(NULL, hw, dev_id, con_id);
4194}
4195
4196struct clk *of_clk_get(struct device_node *np, int index)
4197{
4198 return __of_clk_get(np, index, np->full_name, NULL);
4199}
4200EXPORT_SYMBOL(of_clk_get);
4201
4202/**
4203 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
4204 * @np: pointer to clock consumer node
4205 * @name: name of consumer's clock input, or NULL for the first clock reference
4206 *
4207 * This function parses the clocks and clock-names properties,
4208 * and uses them to look up the struct clk from the registered list of clock
4209 * providers.
4210 */
4211struct clk *of_clk_get_by_name(struct device_node *np, const char *name)
4212{
4213 if (!np)
4214 return ERR_PTR(-ENOENT);
4215
65cf20ad 4216 return __of_clk_get(np, 0, np->full_name, name);
cf13f289
SB
4217}
4218EXPORT_SYMBOL(of_clk_get_by_name);
4219
929e7f3b
SB
4220/**
4221 * of_clk_get_parent_count() - Count the number of clocks a device node has
4222 * @np: device node to count
4223 *
4224 * Returns: The number of clocks that are possible parents of this node
4225 */
4226unsigned int of_clk_get_parent_count(struct device_node *np)
f6102742 4227{
929e7f3b
SB
4228 int count;
4229
4230 count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
4231 if (count < 0)
4232 return 0;
4233
4234 return count;
f6102742
MT
4235}
4236EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
4237
766e6a4e
GL
4238const char *of_clk_get_parent_name(struct device_node *np, int index)
4239{
4240 struct of_phandle_args clkspec;
7a0fc1a3 4241 struct property *prop;
766e6a4e 4242 const char *clk_name;
7a0fc1a3
BD
4243 const __be32 *vp;
4244 u32 pv;
766e6a4e 4245 int rc;
7a0fc1a3 4246 int count;
0a4807c2 4247 struct clk *clk;
766e6a4e 4248
766e6a4e
GL
4249 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
4250 &clkspec);
4251 if (rc)
4252 return NULL;
4253
7a0fc1a3
BD
4254 index = clkspec.args_count ? clkspec.args[0] : 0;
4255 count = 0;
4256
4257 /* if there is an indices property, use it to transfer the index
4258 * specified into an array offset for the clock-output-names property.
4259 */
4260 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
4261 if (index == pv) {
4262 index = count;
4263 break;
4264 }
4265 count++;
4266 }
8da411cc
MY
4267 /* We went off the end of 'clock-indices' without finding it */
4268 if (prop && !vp)
4269 return NULL;
7a0fc1a3 4270
766e6a4e 4271 if (of_property_read_string_index(clkspec.np, "clock-output-names",
7a0fc1a3 4272 index,
0a4807c2
SB
4273 &clk_name) < 0) {
4274 /*
4275 * Best effort to get the name if the clock has been
4276 * registered with the framework. If the clock isn't
4277 * registered, we return the node name as the name of
4278 * the clock as long as #clock-cells = 0.
4279 */
4280 clk = of_clk_get_from_provider(&clkspec);
4281 if (IS_ERR(clk)) {
4282 if (clkspec.args_count == 0)
4283 clk_name = clkspec.np->name;
4284 else
4285 clk_name = NULL;
4286 } else {
4287 clk_name = __clk_get_name(clk);
4288 clk_put(clk);
4289 }
4290 }
4291
766e6a4e
GL
4292
4293 of_node_put(clkspec.np);
4294 return clk_name;
4295}
4296EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
4297
2e61dfb3
DN
4298/**
4299 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
4300 * number of parents
4301 * @np: Device node pointer associated with clock provider
4302 * @parents: pointer to char array that hold the parents' names
4303 * @size: size of the @parents array
4304 *
4305 * Return: number of parents for the clock node.
4306 */
4307int of_clk_parent_fill(struct device_node *np, const char **parents,
4308 unsigned int size)
4309{
4310 unsigned int i = 0;
4311
4312 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
4313 i++;
4314
4315 return i;
4316}
4317EXPORT_SYMBOL_GPL(of_clk_parent_fill);
4318
1771b10d 4319struct clock_provider {
a5970433 4320 void (*clk_init_cb)(struct device_node *);
1771b10d
GC
4321 struct device_node *np;
4322 struct list_head node;
4323};
4324
1771b10d
GC
4325/*
4326 * This function looks for a parent clock. If there is one, then it
4327 * checks that the provider for this parent clock was initialized, in
4328 * this case the parent clock will be ready.
4329 */
4330static int parent_ready(struct device_node *np)
4331{
4332 int i = 0;
4333
4334 while (true) {
4335 struct clk *clk = of_clk_get(np, i);
4336
4337 /* this parent is ready we can check the next one */
4338 if (!IS_ERR(clk)) {
4339 clk_put(clk);
4340 i++;
4341 continue;
4342 }
4343
4344 /* at least one parent is not ready, we exit now */
4345 if (PTR_ERR(clk) == -EPROBE_DEFER)
4346 return 0;
4347
4348 /*
4349 * Here we make assumption that the device tree is
4350 * written correctly. So an error means that there is
4351 * no more parent. As we didn't exit yet, then the
4352 * previous parent are ready. If there is no clock
4353 * parent, no need to wait for them, then we can
4354 * consider their absence as being ready
4355 */
4356 return 1;
4357 }
4358}
4359
d56f8994
LJ
4360/**
4361 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
4362 * @np: Device node pointer associated with clock provider
4363 * @index: clock index
f7ae7503 4364 * @flags: pointer to top-level framework flags
d56f8994
LJ
4365 *
4366 * Detects if the clock-critical property exists and, if so, sets the
4367 * corresponding CLK_IS_CRITICAL flag.
4368 *
4369 * Do not use this function. It exists only for legacy Device Tree
4370 * bindings, such as the one-clock-per-node style that are outdated.
4371 * Those bindings typically put all clock data into .dts and the Linux
4372 * driver has no clock data, thus making it impossible to set this flag
4373 * correctly from the driver. Only those drivers may call
4374 * of_clk_detect_critical from their setup functions.
4375 *
4376 * Return: error code or zero on success
4377 */
4378int of_clk_detect_critical(struct device_node *np,
4379 int index, unsigned long *flags)
4380{
4381 struct property *prop;
4382 const __be32 *cur;
4383 uint32_t idx;
4384
4385 if (!np || !flags)
4386 return -EINVAL;
4387
4388 of_property_for_each_u32(np, "clock-critical", prop, cur, idx)
4389 if (index == idx)
4390 *flags |= CLK_IS_CRITICAL;
4391
4392 return 0;
4393}
4394
766e6a4e
GL
4395/**
4396 * of_clk_init() - Scan and init clock providers from the DT
4397 * @matches: array of compatible values and init functions for providers.
4398 *
1771b10d 4399 * This function scans the device tree for matching clock providers
e5ca8fb4 4400 * and calls their initialization functions. It also does it by trying
1771b10d 4401 * to follow the dependencies.
766e6a4e
GL
4402 */
4403void __init of_clk_init(const struct of_device_id *matches)
4404{
7f7ed584 4405 const struct of_device_id *match;
766e6a4e 4406 struct device_node *np;
1771b10d
GC
4407 struct clock_provider *clk_provider, *next;
4408 bool is_init_done;
4409 bool force = false;
2573a02a 4410 LIST_HEAD(clk_provider_list);
766e6a4e 4411
f2f6c255 4412 if (!matches)
819b4861 4413 matches = &__clk_of_table;
f2f6c255 4414
1771b10d 4415 /* First prepare the list of the clocks providers */
7f7ed584 4416 for_each_matching_node_and_match(np, matches, &match) {
2e3b19f1
SB
4417 struct clock_provider *parent;
4418
3e5dd6f6
GU
4419 if (!of_device_is_available(np))
4420 continue;
4421
2e3b19f1
SB
4422 parent = kzalloc(sizeof(*parent), GFP_KERNEL);
4423 if (!parent) {
4424 list_for_each_entry_safe(clk_provider, next,
4425 &clk_provider_list, node) {
4426 list_del(&clk_provider->node);
6bc9d9d6 4427 of_node_put(clk_provider->np);
2e3b19f1
SB
4428 kfree(clk_provider);
4429 }
6bc9d9d6 4430 of_node_put(np);
2e3b19f1
SB
4431 return;
4432 }
1771b10d
GC
4433
4434 parent->clk_init_cb = match->data;
6bc9d9d6 4435 parent->np = of_node_get(np);
3f6d439f 4436 list_add_tail(&parent->node, &clk_provider_list);
1771b10d
GC
4437 }
4438
4439 while (!list_empty(&clk_provider_list)) {
4440 is_init_done = false;
4441 list_for_each_entry_safe(clk_provider, next,
4442 &clk_provider_list, node) {
4443 if (force || parent_ready(clk_provider->np)) {
86be408b 4444
989eafd0
RR
4445 /* Don't populate platform devices */
4446 of_node_set_flag(clk_provider->np,
4447 OF_POPULATED);
4448
1771b10d 4449 clk_provider->clk_init_cb(clk_provider->np);
86be408b
SN
4450 of_clk_set_defaults(clk_provider->np, true);
4451
1771b10d 4452 list_del(&clk_provider->node);
6bc9d9d6 4453 of_node_put(clk_provider->np);
1771b10d
GC
4454 kfree(clk_provider);
4455 is_init_done = true;
4456 }
4457 }
4458
4459 /*
e5ca8fb4 4460 * We didn't manage to initialize any of the
1771b10d
GC
4461 * remaining providers during the last loop, so now we
4462 * initialize all the remaining ones unconditionally
4463 * in case the clock parent was not mandatory
4464 */
4465 if (!is_init_done)
4466 force = true;
766e6a4e
GL
4467 }
4468}
4469#endif