[people/arne_f/kernel.git] / drivers / clocksource / timer-sp.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * ARM timer implementation, found in Integrator, Versatile and Realview
 * platforms.  Not all platforms support all registers and bits in these
 * registers, so we mark them with A for Integrator AP, C for Integrator
 * CP, V for Versatile and R for Realview.
 *
 * Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview
 * can have 16-bit or 32-bit selectable via a bit in the control register.
 *
 * Every SP804 contains two identical timers.
 */
#define TIMER_1_BASE	0x00
#define TIMER_2_BASE	0x20

#define TIMER_LOAD	0x00			/* ACVR rw */
#define TIMER_VALUE	0x04			/* ACVR ro */
#define TIMER_CTRL	0x08			/* ACVR rw */
#define TIMER_CTRL_ONESHOT	(1 << 0)	/*  CVR */
#define TIMER_CTRL_32BIT	(1 << 1)	/*  CVR */
#define TIMER_CTRL_DIV1		(0 << 2)	/* ACVR */
#define TIMER_CTRL_DIV16	(1 << 2)	/* ACVR */
#define TIMER_CTRL_DIV256	(2 << 2)	/* ACVR */
#define TIMER_CTRL_IE		(1 << 5)	/*   VR */
#define TIMER_CTRL_PERIODIC	(1 << 6)	/* ACVR */
#define TIMER_CTRL_ENABLE	(1 << 7)	/* ACVR */

#define TIMER_INTCLR	0x0c			/* ACVR wo */
#define TIMER_RIS	0x10			/*  CVR ro */
#define TIMER_MIS	0x14			/*  CVR ro */
#define TIMER_BGLOAD	0x18			/*  CVR rw */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
ba02a215 RK	2	/*
	3	* ARM timer implementation, found in Integrator, Versatile and Realview
	4	* platforms. Not all platforms support all registers and bits in these
	5	* registers, so we mark them with A for Integrator AP, C for Integrator
	6	* CP, V for Versatile and R for Realview.
	7	*
	8	* Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview
	9	* can have 16-bit or 32-bit selectable via a bit in the control register.
98ed4ceb PM	10	*
98ed4ceb PM	11	* Every SP804 contains two identical timers.
ba02a215	12	*/
98ed4ceb PM	13	#define TIMER_1_BASE 0x00
	14	#define TIMER_2_BASE 0x20
	15
ba02a215 RK	16	#define TIMER_LOAD 0x00 /* ACVR rw */
	17	#define TIMER_VALUE 0x04 /* ACVR ro */
	18	#define TIMER_CTRL 0x08 /* ACVR rw */
	19	#define TIMER_CTRL_ONESHOT (1 << 0) /* CVR */
	20	#define TIMER_CTRL_32BIT (1 << 1) /* CVR */
	21	#define TIMER_CTRL_DIV1 (0 << 2) /* ACVR */
	22	#define TIMER_CTRL_DIV16 (1 << 2) /* ACVR */
	23	#define TIMER_CTRL_DIV256 (2 << 2) /* ACVR */
	24	#define TIMER_CTRL_IE (1 << 5) /* VR */
	25	#define TIMER_CTRL_PERIODIC (1 << 6) /* ACVR */
	26	#define TIMER_CTRL_ENABLE (1 << 7) /* ACVR */
b720f732	27
ba02a215 RK	28	#define TIMER_INTCLR 0x0c /* ACVR wo */
	29	#define TIMER_RIS 0x10 /* CVR ro */
	30	#define TIMER_MIS 0x14 /* CVR ro */
	31	#define TIMER_BGLOAD 0x18 /* CVR rw */