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zsmalloc: Fix CPU hotplug callback registration
[people/ms/linux.git] / drivers / cpufreq / acpi-cpufreq.c
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1da177e4 1/*
3a58df35 2 * acpi-cpufreq.c - ACPI Processor P-States Driver
1da177e4
LT
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
fe27cb35 7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
1da177e4
LT
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
24 *
25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26 */
27
1da177e4
LT
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
fe27cb35
VP
31#include <linux/smp.h>
32#include <linux/sched.h>
1da177e4 33#include <linux/cpufreq.h>
d395bf12 34#include <linux/compiler.h>
8adcc0c6 35#include <linux/dmi.h>
5a0e3ad6 36#include <linux/slab.h>
1da177e4
LT
37
38#include <linux/acpi.h>
3a58df35
DJ
39#include <linux/io.h>
40#include <linux/delay.h>
41#include <linux/uaccess.h>
42
1da177e4
LT
43#include <acpi/processor.h>
44
dde9f7ba 45#include <asm/msr.h>
fe27cb35
VP
46#include <asm/processor.h>
47#include <asm/cpufeature.h>
fe27cb35 48
1da177e4
LT
49MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
50MODULE_DESCRIPTION("ACPI Processor P-States Driver");
51MODULE_LICENSE("GPL");
52
acd31624
AP
53#define PFX "acpi-cpufreq: "
54
dde9f7ba
VP
55enum {
56 UNDEFINED_CAPABLE = 0,
57 SYSTEM_INTEL_MSR_CAPABLE,
3dc9a633 58 SYSTEM_AMD_MSR_CAPABLE,
dde9f7ba
VP
59 SYSTEM_IO_CAPABLE,
60};
61
62#define INTEL_MSR_RANGE (0xffff)
3dc9a633 63#define AMD_MSR_RANGE (0x7)
dde9f7ba 64
615b7300
AP
65#define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
66
fe27cb35 67struct acpi_cpufreq_data {
64be7eed
VP
68 struct acpi_processor_performance *acpi_data;
69 struct cpufreq_frequency_table *freq_table;
70 unsigned int resume;
71 unsigned int cpu_feature;
f4fd3797 72 cpumask_var_t freqdomain_cpus;
1da177e4
LT
73};
74
f1625066 75static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data);
ea348f3e 76
50109292 77/* acpi_perf_data is a pointer to percpu data. */
3f6c4df7 78static struct acpi_processor_performance __percpu *acpi_perf_data;
1da177e4
LT
79
80static struct cpufreq_driver acpi_cpufreq_driver;
81
d395bf12 82static unsigned int acpi_pstate_strict;
615b7300
AP
83static struct msr __percpu *msrs;
84
85static bool boost_state(unsigned int cpu)
86{
87 u32 lo, hi;
88 u64 msr;
89
90 switch (boot_cpu_data.x86_vendor) {
91 case X86_VENDOR_INTEL:
92 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
93 msr = lo | ((u64)hi << 32);
94 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
95 case X86_VENDOR_AMD:
96 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
97 msr = lo | ((u64)hi << 32);
98 return !(msr & MSR_K7_HWCR_CPB_DIS);
99 }
100 return false;
101}
102
103static void boost_set_msrs(bool enable, const struct cpumask *cpumask)
104{
105 u32 cpu;
106 u32 msr_addr;
107 u64 msr_mask;
108
109 switch (boot_cpu_data.x86_vendor) {
110 case X86_VENDOR_INTEL:
111 msr_addr = MSR_IA32_MISC_ENABLE;
112 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
113 break;
114 case X86_VENDOR_AMD:
115 msr_addr = MSR_K7_HWCR;
116 msr_mask = MSR_K7_HWCR_CPB_DIS;
117 break;
118 default:
119 return;
120 }
121
122 rdmsr_on_cpus(cpumask, msr_addr, msrs);
123
124 for_each_cpu(cpu, cpumask) {
125 struct msr *reg = per_cpu_ptr(msrs, cpu);
126 if (enable)
127 reg->q &= ~msr_mask;
128 else
129 reg->q |= msr_mask;
130 }
131
132 wrmsr_on_cpus(cpumask, msr_addr, msrs);
133}
134
cfc9c8ed 135static int _store_boost(int val)
615b7300 136{
615b7300 137 get_online_cpus();
615b7300 138 boost_set_msrs(val, cpu_online_mask);
615b7300 139 put_online_cpus();
615b7300
AP
140 pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis");
141
cfc9c8ed 142 return 0;
615b7300
AP
143}
144
f4fd3797
LT
145static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
146{
147 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
148
149 return cpufreq_show_cpus(data->freqdomain_cpus, buf);
150}
151
152cpufreq_freq_attr_ro(freqdomain_cpus);
153
11269ff5 154#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
cfc9c8ed
LM
155static ssize_t store_boost(const char *buf, size_t count)
156{
157 int ret;
158 unsigned long val = 0;
159
160 if (!acpi_cpufreq_driver.boost_supported)
161 return -EINVAL;
162
163 ret = kstrtoul(buf, 10, &val);
164 if (ret || (val > 1))
165 return -EINVAL;
166
167 _store_boost((int) val);
168
169 return count;
170}
171
11269ff5
AP
172static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
173 size_t count)
174{
cfc9c8ed 175 return store_boost(buf, count);
11269ff5
AP
176}
177
178static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
179{
cfc9c8ed 180 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
11269ff5
AP
181}
182
59027d35 183cpufreq_freq_attr_rw(cpb);
11269ff5
AP
184#endif
185
dde9f7ba
VP
186static int check_est_cpu(unsigned int cpuid)
187{
92cb7612 188 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
dde9f7ba 189
0de51088 190 return cpu_has(cpu, X86_FEATURE_EST);
dde9f7ba
VP
191}
192
3dc9a633
MG
193static int check_amd_hwpstate_cpu(unsigned int cpuid)
194{
195 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
196
197 return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
198}
199
dde9f7ba 200static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
fe27cb35 201{
64be7eed
VP
202 struct acpi_processor_performance *perf;
203 int i;
fe27cb35
VP
204
205 perf = data->acpi_data;
206
3a58df35 207 for (i = 0; i < perf->state_count; i++) {
fe27cb35
VP
208 if (value == perf->states[i].status)
209 return data->freq_table[i].frequency;
210 }
211 return 0;
212}
213
dde9f7ba
VP
214static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
215{
216 int i;
a6f6e6e6 217 struct acpi_processor_performance *perf;
dde9f7ba 218
3dc9a633
MG
219 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
220 msr &= AMD_MSR_RANGE;
221 else
222 msr &= INTEL_MSR_RANGE;
223
a6f6e6e6
VP
224 perf = data->acpi_data;
225
3a58df35 226 for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
50701588 227 if (msr == perf->states[data->freq_table[i].driver_data].status)
dde9f7ba
VP
228 return data->freq_table[i].frequency;
229 }
230 return data->freq_table[0].frequency;
231}
232
dde9f7ba
VP
233static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
234{
235 switch (data->cpu_feature) {
64be7eed 236 case SYSTEM_INTEL_MSR_CAPABLE:
3dc9a633 237 case SYSTEM_AMD_MSR_CAPABLE:
dde9f7ba 238 return extract_msr(val, data);
64be7eed 239 case SYSTEM_IO_CAPABLE:
dde9f7ba 240 return extract_io(val, data);
64be7eed 241 default:
dde9f7ba
VP
242 return 0;
243 }
244}
245
dde9f7ba
VP
246struct msr_addr {
247 u32 reg;
248};
249
fe27cb35
VP
250struct io_addr {
251 u16 port;
252 u8 bit_width;
253};
254
255struct drv_cmd {
dde9f7ba 256 unsigned int type;
bfa318ad 257 const struct cpumask *mask;
3a58df35
DJ
258 union {
259 struct msr_addr msr;
260 struct io_addr io;
261 } addr;
fe27cb35
VP
262 u32 val;
263};
264
01599fca
AM
265/* Called via smp_call_function_single(), on the target CPU */
266static void do_drv_read(void *_cmd)
1da177e4 267{
72859081 268 struct drv_cmd *cmd = _cmd;
dde9f7ba
VP
269 u32 h;
270
271 switch (cmd->type) {
64be7eed 272 case SYSTEM_INTEL_MSR_CAPABLE:
3dc9a633 273 case SYSTEM_AMD_MSR_CAPABLE:
dde9f7ba
VP
274 rdmsr(cmd->addr.msr.reg, cmd->val, h);
275 break;
64be7eed 276 case SYSTEM_IO_CAPABLE:
4e581ff1
VP
277 acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
278 &cmd->val,
279 (u32)cmd->addr.io.bit_width);
dde9f7ba 280 break;
64be7eed 281 default:
dde9f7ba
VP
282 break;
283 }
fe27cb35 284}
1da177e4 285
01599fca
AM
286/* Called via smp_call_function_many(), on the target CPUs */
287static void do_drv_write(void *_cmd)
fe27cb35 288{
72859081 289 struct drv_cmd *cmd = _cmd;
13424f65 290 u32 lo, hi;
dde9f7ba
VP
291
292 switch (cmd->type) {
64be7eed 293 case SYSTEM_INTEL_MSR_CAPABLE:
13424f65
VP
294 rdmsr(cmd->addr.msr.reg, lo, hi);
295 lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
296 wrmsr(cmd->addr.msr.reg, lo, hi);
dde9f7ba 297 break;
3dc9a633
MG
298 case SYSTEM_AMD_MSR_CAPABLE:
299 wrmsr(cmd->addr.msr.reg, cmd->val, 0);
300 break;
64be7eed 301 case SYSTEM_IO_CAPABLE:
4e581ff1
VP
302 acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
303 cmd->val,
304 (u32)cmd->addr.io.bit_width);
dde9f7ba 305 break;
64be7eed 306 default:
dde9f7ba
VP
307 break;
308 }
fe27cb35 309}
1da177e4 310
95dd7227 311static void drv_read(struct drv_cmd *cmd)
fe27cb35 312{
4a28395d 313 int err;
fe27cb35
VP
314 cmd->val = 0;
315
4a28395d
AM
316 err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1);
317 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
fe27cb35
VP
318}
319
320static void drv_write(struct drv_cmd *cmd)
321{
ea34f43a
LT
322 int this_cpu;
323
324 this_cpu = get_cpu();
325 if (cpumask_test_cpu(this_cpu, cmd->mask))
326 do_drv_write(cmd);
01599fca 327 smp_call_function_many(cmd->mask, do_drv_write, cmd, 1);
ea34f43a 328 put_cpu();
fe27cb35 329}
1da177e4 330
4d8bb537 331static u32 get_cur_val(const struct cpumask *mask)
fe27cb35 332{
64be7eed
VP
333 struct acpi_processor_performance *perf;
334 struct drv_cmd cmd;
1da177e4 335
4d8bb537 336 if (unlikely(cpumask_empty(mask)))
fe27cb35 337 return 0;
1da177e4 338
f1625066 339 switch (per_cpu(acfreq_data, cpumask_first(mask))->cpu_feature) {
dde9f7ba
VP
340 case SYSTEM_INTEL_MSR_CAPABLE:
341 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
8673b83b 342 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
dde9f7ba 343 break;
3dc9a633
MG
344 case SYSTEM_AMD_MSR_CAPABLE:
345 cmd.type = SYSTEM_AMD_MSR_CAPABLE;
8673b83b 346 cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
3dc9a633 347 break;
dde9f7ba
VP
348 case SYSTEM_IO_CAPABLE:
349 cmd.type = SYSTEM_IO_CAPABLE;
f1625066 350 perf = per_cpu(acfreq_data, cpumask_first(mask))->acpi_data;
dde9f7ba
VP
351 cmd.addr.io.port = perf->control_register.address;
352 cmd.addr.io.bit_width = perf->control_register.bit_width;
353 break;
354 default:
355 return 0;
356 }
357
bfa318ad 358 cmd.mask = mask;
fe27cb35 359 drv_read(&cmd);
1da177e4 360
2d06d8c4 361 pr_debug("get_cur_val = %u\n", cmd.val);
fe27cb35
VP
362
363 return cmd.val;
364}
1da177e4 365
fe27cb35
VP
366static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
367{
f1625066 368 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu);
64be7eed 369 unsigned int freq;
e56a727b 370 unsigned int cached_freq;
fe27cb35 371
2d06d8c4 372 pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
fe27cb35
VP
373
374 if (unlikely(data == NULL ||
64be7eed 375 data->acpi_data == NULL || data->freq_table == NULL)) {
fe27cb35 376 return 0;
1da177e4
LT
377 }
378
e56a727b 379 cached_freq = data->freq_table[data->acpi_data->state].frequency;
e39ad415 380 freq = extract_freq(get_cur_val(cpumask_of(cpu)), data);
e56a727b
VP
381 if (freq != cached_freq) {
382 /*
383 * The dreaded BIOS frequency change behind our back.
384 * Force set the frequency on next target call.
385 */
386 data->resume = 1;
387 }
388
2d06d8c4 389 pr_debug("cur freq = %u\n", freq);
1da177e4 390
fe27cb35 391 return freq;
1da177e4
LT
392}
393
72859081 394static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
64be7eed 395 struct acpi_cpufreq_data *data)
fe27cb35 396{
64be7eed
VP
397 unsigned int cur_freq;
398 unsigned int i;
1da177e4 399
3a58df35 400 for (i = 0; i < 100; i++) {
fe27cb35
VP
401 cur_freq = extract_freq(get_cur_val(mask), data);
402 if (cur_freq == freq)
403 return 1;
404 udelay(10);
405 }
406 return 0;
407}
408
409static int acpi_cpufreq_target(struct cpufreq_policy *policy,
9c0ebcf7 410 unsigned int index)
1da177e4 411{
f1625066 412 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
64be7eed 413 struct acpi_processor_performance *perf;
64be7eed 414 struct drv_cmd cmd;
8edc59d9 415 unsigned int next_perf_state = 0; /* Index into perf table */
64be7eed 416 int result = 0;
fe27cb35 417
fe27cb35 418 if (unlikely(data == NULL ||
95dd7227 419 data->acpi_data == NULL || data->freq_table == NULL)) {
fe27cb35
VP
420 return -ENODEV;
421 }
1da177e4 422
fe27cb35 423 perf = data->acpi_data;
9c0ebcf7 424 next_perf_state = data->freq_table[index].driver_data;
7650b281 425 if (perf->state == next_perf_state) {
fe27cb35 426 if (unlikely(data->resume)) {
2d06d8c4 427 pr_debug("Called after resume, resetting to P%d\n",
64be7eed 428 next_perf_state);
fe27cb35
VP
429 data->resume = 0;
430 } else {
2d06d8c4 431 pr_debug("Already at target state (P%d)\n",
64be7eed 432 next_perf_state);
4d8bb537 433 goto out;
fe27cb35 434 }
09b4d1ee
VP
435 }
436
64be7eed
VP
437 switch (data->cpu_feature) {
438 case SYSTEM_INTEL_MSR_CAPABLE:
439 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
440 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
13424f65 441 cmd.val = (u32) perf->states[next_perf_state].control;
64be7eed 442 break;
3dc9a633
MG
443 case SYSTEM_AMD_MSR_CAPABLE:
444 cmd.type = SYSTEM_AMD_MSR_CAPABLE;
445 cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
446 cmd.val = (u32) perf->states[next_perf_state].control;
447 break;
64be7eed
VP
448 case SYSTEM_IO_CAPABLE:
449 cmd.type = SYSTEM_IO_CAPABLE;
450 cmd.addr.io.port = perf->control_register.address;
451 cmd.addr.io.bit_width = perf->control_register.bit_width;
452 cmd.val = (u32) perf->states[next_perf_state].control;
453 break;
454 default:
4d8bb537
MT
455 result = -ENODEV;
456 goto out;
64be7eed 457 }
09b4d1ee 458
4d8bb537 459 /* cpufreq holds the hotplug lock, so we are safe from here on */
fe27cb35 460 if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
bfa318ad 461 cmd.mask = policy->cpus;
fe27cb35 462 else
bfa318ad 463 cmd.mask = cpumask_of(policy->cpu);
09b4d1ee 464
fe27cb35 465 drv_write(&cmd);
09b4d1ee 466
fe27cb35 467 if (acpi_pstate_strict) {
d4019f0a
VK
468 if (!check_freqs(cmd.mask, data->freq_table[index].frequency,
469 data)) {
2d06d8c4 470 pr_debug("acpi_cpufreq_target failed (%d)\n",
64be7eed 471 policy->cpu);
4d8bb537 472 result = -EAGAIN;
09b4d1ee
VP
473 }
474 }
475
e15d8309
VK
476 if (!result)
477 perf->state = next_perf_state;
fe27cb35 478
4d8bb537 479out:
fe27cb35 480 return result;
1da177e4
LT
481}
482
1da177e4 483static unsigned long
64be7eed 484acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
1da177e4 485{
64be7eed 486 struct acpi_processor_performance *perf = data->acpi_data;
09b4d1ee 487
1da177e4
LT
488 if (cpu_khz) {
489 /* search the closest match to cpu_khz */
490 unsigned int i;
491 unsigned long freq;
09b4d1ee 492 unsigned long freqn = perf->states[0].core_frequency * 1000;
1da177e4 493
3a58df35 494 for (i = 0; i < (perf->state_count-1); i++) {
1da177e4 495 freq = freqn;
95dd7227 496 freqn = perf->states[i+1].core_frequency * 1000;
1da177e4 497 if ((2 * cpu_khz) > (freqn + freq)) {
09b4d1ee 498 perf->state = i;
64be7eed 499 return freq;
1da177e4
LT
500 }
501 }
95dd7227 502 perf->state = perf->state_count-1;
64be7eed 503 return freqn;
09b4d1ee 504 } else {
1da177e4 505 /* assume CPU is at P0... */
09b4d1ee
VP
506 perf->state = 0;
507 return perf->states[0].core_frequency * 1000;
508 }
1da177e4
LT
509}
510
2fdf66b4
RR
511static void free_acpi_perf_data(void)
512{
513 unsigned int i;
514
515 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
516 for_each_possible_cpu(i)
517 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
518 ->shared_cpu_map);
519 free_percpu(acpi_perf_data);
520}
521
615b7300
AP
522static int boost_notify(struct notifier_block *nb, unsigned long action,
523 void *hcpu)
524{
525 unsigned cpu = (long)hcpu;
526 const struct cpumask *cpumask;
527
528 cpumask = get_cpu_mask(cpu);
529
530 /*
531 * Clear the boost-disable bit on the CPU_DOWN path so that
532 * this cpu cannot block the remaining ones from boosting. On
533 * the CPU_UP path we simply keep the boost-disable flag in
534 * sync with the current global state.
535 */
536
537 switch (action) {
538 case CPU_UP_PREPARE:
539 case CPU_UP_PREPARE_FROZEN:
cfc9c8ed 540 boost_set_msrs(acpi_cpufreq_driver.boost_enabled, cpumask);
615b7300
AP
541 break;
542
543 case CPU_DOWN_PREPARE:
544 case CPU_DOWN_PREPARE_FROZEN:
545 boost_set_msrs(1, cpumask);
546 break;
547
548 default:
549 break;
550 }
551
552 return NOTIFY_OK;
553}
554
555
556static struct notifier_block boost_nb = {
557 .notifier_call = boost_notify,
558};
559
09b4d1ee
VP
560/*
561 * acpi_cpufreq_early_init - initialize ACPI P-States library
562 *
563 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
564 * in order to determine correct frequency and voltage pairings. We can
565 * do _PDC and _PSD and find out the processor dependency for the
566 * actual init that will happen later...
567 */
50109292 568static int __init acpi_cpufreq_early_init(void)
09b4d1ee 569{
2fdf66b4 570 unsigned int i;
2d06d8c4 571 pr_debug("acpi_cpufreq_early_init\n");
09b4d1ee 572
50109292
FY
573 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
574 if (!acpi_perf_data) {
2d06d8c4 575 pr_debug("Memory allocation error for acpi_perf_data.\n");
50109292 576 return -ENOMEM;
09b4d1ee 577 }
2fdf66b4 578 for_each_possible_cpu(i) {
eaa95840 579 if (!zalloc_cpumask_var_node(
80855f73
MT
580 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
581 GFP_KERNEL, cpu_to_node(i))) {
2fdf66b4
RR
582
583 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
584 free_acpi_perf_data();
585 return -ENOMEM;
586 }
587 }
09b4d1ee
VP
588
589 /* Do initialization in ACPI core */
fe27cb35
VP
590 acpi_processor_preregister_performance(acpi_perf_data);
591 return 0;
09b4d1ee
VP
592}
593
95625b8f 594#ifdef CONFIG_SMP
8adcc0c6
VP
595/*
596 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
597 * or do it in BIOS firmware and won't inform about it to OS. If not
598 * detected, this has a side effect of making CPU run at a different speed
599 * than OS intended it to run at. Detect it and handle it cleanly.
600 */
601static int bios_with_sw_any_bug;
602
1855256c 603static int sw_any_bug_found(const struct dmi_system_id *d)
8adcc0c6
VP
604{
605 bios_with_sw_any_bug = 1;
606 return 0;
607}
608
1855256c 609static const struct dmi_system_id sw_any_bug_dmi_table[] = {
8adcc0c6
VP
610 {
611 .callback = sw_any_bug_found,
612 .ident = "Supermicro Server X6DLP",
613 .matches = {
614 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
615 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
616 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
617 },
618 },
619 { }
620};
1a8e42fa
PB
621
622static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
623{
293afe44
JV
624 /* Intel Xeon Processor 7100 Series Specification Update
625 * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
1a8e42fa
PB
626 * AL30: A Machine Check Exception (MCE) Occurring during an
627 * Enhanced Intel SpeedStep Technology Ratio Change May Cause
293afe44 628 * Both Processor Cores to Lock Up. */
1a8e42fa
PB
629 if (c->x86_vendor == X86_VENDOR_INTEL) {
630 if ((c->x86 == 15) &&
631 (c->x86_model == 6) &&
293afe44
JV
632 (c->x86_mask == 8)) {
633 printk(KERN_INFO "acpi-cpufreq: Intel(R) "
634 "Xeon(R) 7100 Errata AL30, processors may "
635 "lock up on frequency changes: disabling "
636 "acpi-cpufreq.\n");
1a8e42fa 637 return -ENODEV;
293afe44 638 }
1a8e42fa
PB
639 }
640 return 0;
641}
95625b8f 642#endif
8adcc0c6 643
64be7eed 644static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
1da177e4 645{
64be7eed
VP
646 unsigned int i;
647 unsigned int valid_states = 0;
648 unsigned int cpu = policy->cpu;
649 struct acpi_cpufreq_data *data;
64be7eed 650 unsigned int result = 0;
92cb7612 651 struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
64be7eed 652 struct acpi_processor_performance *perf;
293afe44
JV
653#ifdef CONFIG_SMP
654 static int blacklisted;
655#endif
1da177e4 656
2d06d8c4 657 pr_debug("acpi_cpufreq_cpu_init\n");
1da177e4 658
1a8e42fa 659#ifdef CONFIG_SMP
293afe44
JV
660 if (blacklisted)
661 return blacklisted;
662 blacklisted = acpi_cpufreq_blacklist(c);
663 if (blacklisted)
664 return blacklisted;
1a8e42fa
PB
665#endif
666
d5b73cd8 667 data = kzalloc(sizeof(*data), GFP_KERNEL);
1da177e4 668 if (!data)
64be7eed 669 return -ENOMEM;
1da177e4 670
f4fd3797
LT
671 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
672 result = -ENOMEM;
673 goto err_free;
674 }
675
b36128c8 676 data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu);
f1625066 677 per_cpu(acfreq_data, cpu) = data;
1da177e4 678
95dd7227 679 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
fe27cb35 680 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
1da177e4 681
fe27cb35 682 result = acpi_processor_register_performance(data->acpi_data, cpu);
1da177e4 683 if (result)
f4fd3797 684 goto err_free_mask;
1da177e4 685
09b4d1ee 686 perf = data->acpi_data;
09b4d1ee 687 policy->shared_type = perf->shared_type;
95dd7227 688
46f18e3a 689 /*
95dd7227 690 * Will let policy->cpus know about dependency only when software
46f18e3a
VP
691 * coordination is required.
692 */
693 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
8adcc0c6 694 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
835481d9 695 cpumask_copy(policy->cpus, perf->shared_cpu_map);
8adcc0c6 696 }
f4fd3797 697 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
8adcc0c6
VP
698
699#ifdef CONFIG_SMP
700 dmi_check_system(sw_any_bug_dmi_table);
2624f90c 701 if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
8adcc0c6 702 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
835481d9 703 cpumask_copy(policy->cpus, cpu_core_mask(cpu));
8adcc0c6 704 }
acd31624
AP
705
706 if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
707 cpumask_clear(policy->cpus);
708 cpumask_set_cpu(cpu, policy->cpus);
f4fd3797 709 cpumask_copy(data->freqdomain_cpus, cpu_sibling_mask(cpu));
acd31624
AP
710 policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
711 pr_info_once(PFX "overriding BIOS provided _PSD data\n");
712 }
8adcc0c6 713#endif
09b4d1ee 714
1da177e4 715 /* capability check */
09b4d1ee 716 if (perf->state_count <= 1) {
2d06d8c4 717 pr_debug("No P-States\n");
1da177e4
LT
718 result = -ENODEV;
719 goto err_unreg;
720 }
09b4d1ee 721
fe27cb35
VP
722 if (perf->control_register.space_id != perf->status_register.space_id) {
723 result = -ENODEV;
724 goto err_unreg;
725 }
726
727 switch (perf->control_register.space_id) {
64be7eed 728 case ACPI_ADR_SPACE_SYSTEM_IO:
c40a4518
MG
729 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
730 boot_cpu_data.x86 == 0xf) {
731 pr_debug("AMD K8 systems must use native drivers.\n");
732 result = -ENODEV;
733 goto err_unreg;
734 }
2d06d8c4 735 pr_debug("SYSTEM IO addr space\n");
dde9f7ba
VP
736 data->cpu_feature = SYSTEM_IO_CAPABLE;
737 break;
64be7eed 738 case ACPI_ADR_SPACE_FIXED_HARDWARE:
2d06d8c4 739 pr_debug("HARDWARE addr space\n");
3dc9a633
MG
740 if (check_est_cpu(cpu)) {
741 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
742 break;
dde9f7ba 743 }
3dc9a633
MG
744 if (check_amd_hwpstate_cpu(cpu)) {
745 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
746 break;
747 }
748 result = -ENODEV;
749 goto err_unreg;
64be7eed 750 default:
2d06d8c4 751 pr_debug("Unknown addr space %d\n",
64be7eed 752 (u32) (perf->control_register.space_id));
1da177e4
LT
753 result = -ENODEV;
754 goto err_unreg;
755 }
756
d5b73cd8 757 data->freq_table = kmalloc(sizeof(*data->freq_table) *
95dd7227 758 (perf->state_count+1), GFP_KERNEL);
1da177e4
LT
759 if (!data->freq_table) {
760 result = -ENOMEM;
761 goto err_unreg;
762 }
763
764 /* detect transition latency */
765 policy->cpuinfo.transition_latency = 0;
3a58df35 766 for (i = 0; i < perf->state_count; i++) {
64be7eed
VP
767 if ((perf->states[i].transition_latency * 1000) >
768 policy->cpuinfo.transition_latency)
769 policy->cpuinfo.transition_latency =
770 perf->states[i].transition_latency * 1000;
1da177e4 771 }
1da177e4 772
a59d1637
PV
773 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
774 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
775 policy->cpuinfo.transition_latency > 20 * 1000) {
a59d1637 776 policy->cpuinfo.transition_latency = 20 * 1000;
61c8c67e
JP
777 printk_once(KERN_INFO
778 "P-state transition latency capped at 20 uS\n");
a59d1637
PV
779 }
780
1da177e4 781 /* table init */
3a58df35
DJ
782 for (i = 0; i < perf->state_count; i++) {
783 if (i > 0 && perf->states[i].core_frequency >=
3cdf552b 784 data->freq_table[valid_states-1].frequency / 1000)
fe27cb35
VP
785 continue;
786
50701588 787 data->freq_table[valid_states].driver_data = i;
fe27cb35 788 data->freq_table[valid_states].frequency =
64be7eed 789 perf->states[i].core_frequency * 1000;
fe27cb35 790 valid_states++;
1da177e4 791 }
3d4a7ef3 792 data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
8edc59d9 793 perf->state = 0;
1da177e4 794
776b57be 795 result = cpufreq_table_validate_and_show(policy, data->freq_table);
95dd7227 796 if (result)
1da177e4 797 goto err_freqfree;
1da177e4 798
d876dfbb
TR
799 if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
800 printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n");
801
a507ac4b 802 switch (perf->control_register.space_id) {
64be7eed 803 case ACPI_ADR_SPACE_SYSTEM_IO:
1bab64d5
VK
804 /*
805 * The core will not set policy->cur, because
806 * cpufreq_driver->get is NULL, so we need to set it here.
807 * However, we have to guess it, because the current speed is
808 * unknown and not detectable via IO ports.
809 */
dde9f7ba
VP
810 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
811 break;
64be7eed 812 case ACPI_ADR_SPACE_FIXED_HARDWARE:
7650b281 813 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
dde9f7ba 814 break;
64be7eed 815 default:
dde9f7ba
VP
816 break;
817 }
818
1da177e4
LT
819 /* notify BIOS that we exist */
820 acpi_processor_notify_smm(THIS_MODULE);
821
2d06d8c4 822 pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
09b4d1ee 823 for (i = 0; i < perf->state_count; i++)
2d06d8c4 824 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
64be7eed 825 (i == perf->state ? '*' : ' '), i,
09b4d1ee
VP
826 (u32) perf->states[i].core_frequency,
827 (u32) perf->states[i].power,
828 (u32) perf->states[i].transition_latency);
1da177e4 829
4b31e774
DB
830 /*
831 * the first call to ->target() should result in us actually
832 * writing something to the appropriate registers.
833 */
834 data->resume = 1;
64be7eed 835
fe27cb35 836 return result;
1da177e4 837
95dd7227 838err_freqfree:
1da177e4 839 kfree(data->freq_table);
95dd7227 840err_unreg:
09b4d1ee 841 acpi_processor_unregister_performance(perf, cpu);
f4fd3797
LT
842err_free_mask:
843 free_cpumask_var(data->freqdomain_cpus);
95dd7227 844err_free:
1da177e4 845 kfree(data);
f1625066 846 per_cpu(acfreq_data, cpu) = NULL;
1da177e4 847
64be7eed 848 return result;
1da177e4
LT
849}
850
64be7eed 851static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
1da177e4 852{
f1625066 853 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
1da177e4 854
2d06d8c4 855 pr_debug("acpi_cpufreq_cpu_exit\n");
1da177e4
LT
856
857 if (data) {
858 cpufreq_frequency_table_put_attr(policy->cpu);
f1625066 859 per_cpu(acfreq_data, policy->cpu) = NULL;
64be7eed
VP
860 acpi_processor_unregister_performance(data->acpi_data,
861 policy->cpu);
f4fd3797 862 free_cpumask_var(data->freqdomain_cpus);
dab5fff1 863 kfree(data->freq_table);
1da177e4
LT
864 kfree(data);
865 }
866
64be7eed 867 return 0;
1da177e4
LT
868}
869
64be7eed 870static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
1da177e4 871{
f1625066 872 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
1da177e4 873
2d06d8c4 874 pr_debug("acpi_cpufreq_resume\n");
1da177e4
LT
875
876 data->resume = 1;
877
64be7eed 878 return 0;
1da177e4
LT
879}
880
64be7eed 881static struct freq_attr *acpi_cpufreq_attr[] = {
1da177e4 882 &cpufreq_freq_attr_scaling_available_freqs,
f4fd3797 883 &freqdomain_cpus,
11269ff5 884 NULL, /* this is a placeholder for cpb, do not remove */
1da177e4
LT
885 NULL,
886};
887
888static struct cpufreq_driver acpi_cpufreq_driver = {
db9be219 889 .verify = cpufreq_generic_frequency_table_verify,
9c0ebcf7 890 .target_index = acpi_cpufreq_target,
e2f74f35
TR
891 .bios_limit = acpi_processor_get_bios_limit,
892 .init = acpi_cpufreq_cpu_init,
893 .exit = acpi_cpufreq_cpu_exit,
894 .resume = acpi_cpufreq_resume,
895 .name = "acpi-cpufreq",
e2f74f35 896 .attr = acpi_cpufreq_attr,
cfc9c8ed 897 .set_boost = _store_boost,
1da177e4
LT
898};
899
615b7300
AP
900static void __init acpi_cpufreq_boost_init(void)
901{
902 if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) {
903 msrs = msrs_alloc();
904
905 if (!msrs)
906 return;
907
cfc9c8ed
LM
908 acpi_cpufreq_driver.boost_supported = true;
909 acpi_cpufreq_driver.boost_enabled = boost_state(0);
615b7300
AP
910 get_online_cpus();
911
912 /* Force all MSRs to the same value */
cfc9c8ed
LM
913 boost_set_msrs(acpi_cpufreq_driver.boost_enabled,
914 cpu_online_mask);
615b7300
AP
915
916 register_cpu_notifier(&boost_nb);
917
918 put_online_cpus();
cfc9c8ed 919 }
615b7300
AP
920}
921
eb8c68ef 922static void acpi_cpufreq_boost_exit(void)
615b7300 923{
615b7300
AP
924 if (msrs) {
925 unregister_cpu_notifier(&boost_nb);
926
927 msrs_free(msrs);
928 msrs = NULL;
929 }
930}
931
64be7eed 932static int __init acpi_cpufreq_init(void)
1da177e4 933{
50109292
FY
934 int ret;
935
75c07581
RW
936 if (acpi_disabled)
937 return -ENODEV;
938
8a61e12e
YL
939 /* don't keep reloading if cpufreq_driver exists */
940 if (cpufreq_get_current_driver())
75c07581 941 return -EEXIST;
ee297533 942
2d06d8c4 943 pr_debug("acpi_cpufreq_init\n");
1da177e4 944
50109292
FY
945 ret = acpi_cpufreq_early_init();
946 if (ret)
947 return ret;
09b4d1ee 948
11269ff5
AP
949#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
950 /* this is a sysfs file with a strange name and an even stranger
951 * semantic - per CPU instantiation, but system global effect.
952 * Lets enable it only on AMD CPUs for compatibility reasons and
953 * only if configured. This is considered legacy code, which
954 * will probably be removed at some point in the future.
955 */
956 if (check_amd_hwpstate_cpu(0)) {
957 struct freq_attr **iter;
958
959 pr_debug("adding sysfs entry for cpb\n");
960
961 for (iter = acpi_cpufreq_attr; *iter != NULL; iter++)
962 ;
963
964 /* make sure there is a terminator behind it */
965 if (iter[1] == NULL)
966 *iter = &cpb;
967 }
968#endif
cfc9c8ed 969 acpi_cpufreq_boost_init();
11269ff5 970
847aef6f 971 ret = cpufreq_register_driver(&acpi_cpufreq_driver);
eb8c68ef 972 if (ret) {
2fdf66b4 973 free_acpi_perf_data();
eb8c68ef
KRW
974 acpi_cpufreq_boost_exit();
975 }
847aef6f 976 return ret;
1da177e4
LT
977}
978
64be7eed 979static void __exit acpi_cpufreq_exit(void)
1da177e4 980{
2d06d8c4 981 pr_debug("acpi_cpufreq_exit\n");
1da177e4 982
615b7300
AP
983 acpi_cpufreq_boost_exit();
984
1da177e4
LT
985 cpufreq_unregister_driver(&acpi_cpufreq_driver);
986
50f4ddd4 987 free_acpi_perf_data();
1da177e4
LT
988}
989
d395bf12 990module_param(acpi_pstate_strict, uint, 0644);
64be7eed 991MODULE_PARM_DESC(acpi_pstate_strict,
95dd7227
DJ
992 "value 0 or non-zero. non-zero -> strict ACPI checks are "
993 "performed during frequency changes.");
1da177e4
LT
994
995late_initcall(acpi_cpufreq_init);
996module_exit(acpi_cpufreq_exit);
997
efa17194
MG
998static const struct x86_cpu_id acpi_cpufreq_ids[] = {
999 X86_FEATURE_MATCH(X86_FEATURE_ACPI),
1000 X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
1001 {}
1002};
1003MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
1004
c655affb
RW
1005static const struct acpi_device_id processor_device_ids[] = {
1006 {ACPI_PROCESSOR_OBJECT_HID, },
1007 {ACPI_PROCESSOR_DEVICE_HID, },
1008 {},
1009};
1010MODULE_DEVICE_TABLE(acpi, processor_device_ids);
1011
1da177e4 1012MODULE_ALIAS("acpi");