[people/arne_f/kernel.git] / drivers / cpufreq / cppc_cpufreq.c

/*
 * CPPC (Collaborative Processor Performance Control) driver for
 * interfacing with the CPUfreq layer and governors. See
 * cppc_acpi.c for CPPC specific methods.
 *
 * (C) Copyright 2014, 2015 Linaro Ltd.
 * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; version 2
 * of the License.
 */

#define pr_fmt(fmt)	"CPPC Cpufreq:"	fmt

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/cpu.h>
#include <linux/cpufreq.h>
#include <linux/dmi.h>
#include <linux/time.h>
#include <linux/vmalloc.h>

#include <asm/unaligned.h>

#include <acpi/cppc_acpi.h>

/* Minimum struct length needed for the DMI processor entry we want */
#define DMI_ENTRY_PROCESSOR_MIN_LENGTH	48

/* Offest in the DMI processor structure for the max frequency */
#define DMI_PROCESSOR_MAX_SPEED  0x14

/*
 * These structs contain information parsed from per CPU
 * ACPI _CPC structures.
 * e.g. For each CPU the highest, lowest supported
 * performance capabilities, desired performance level
 * requested etc.
 */
static struct cppc_cpudata **all_cpu_data;

/* Capture the max KHz from DMI */
static u64 cppc_dmi_max_khz;

/* Callback function used to retrieve the max frequency from DMI */
static void cppc_find_dmi_mhz(const struct dmi_header *dm, void *private)
{
	const u8 *dmi_data = (const u8 *)dm;
	u16 *mhz = (u16 *)private;

	if (dm->type == DMI_ENTRY_PROCESSOR &&
	    dm->length >= DMI_ENTRY_PROCESSOR_MIN_LENGTH) {
		u16 val = (u16)get_unaligned((const u16 *)
				(dmi_data + DMI_PROCESSOR_MAX_SPEED));
		*mhz = val > *mhz ? val : *mhz;
	}
}

/* Look up the max frequency in DMI */
static u64 cppc_get_dmi_max_khz(void)
{
	u16 mhz = 0;

	dmi_walk(cppc_find_dmi_mhz, &mhz);

	/*
	 * Real stupid fallback value, just in case there is no
	 * actual value set.
	 */
	mhz = mhz ? mhz : 1;

	return (1000 * mhz);
}

static int cppc_cpufreq_set_target(struct cpufreq_policy *policy,
		unsigned int target_freq,
		unsigned int relation)
{
	struct cppc_cpudata *cpu;
	struct cpufreq_freqs freqs;
	u32 desired_perf;
	int ret = 0;

	cpu = all_cpu_data[policy->cpu];

	desired_perf = (u64)target_freq * cpu->perf_caps.highest_perf / cppc_dmi_max_khz;
	/* Return if it is exactly the same perf */
	if (desired_perf == cpu->perf_ctrls.desired_perf)
		return ret;

	cpu->perf_ctrls.desired_perf = desired_perf;
	freqs.old = policy->cur;
	freqs.new = target_freq;

	cpufreq_freq_transition_begin(policy, &freqs);
	ret = cppc_set_perf(cpu->cpu, &cpu->perf_ctrls);
	cpufreq_freq_transition_end(policy, &freqs, ret != 0);

	if (ret)
		pr_debug("Failed to set target on CPU:%d. ret:%d\n",
				cpu->cpu, ret);

	return ret;
}

static int cppc_verify_policy(struct cpufreq_policy *policy)
{
	cpufreq_verify_within_cpu_limits(policy);
	return 0;
}

static void cppc_cpufreq_stop_cpu(struct cpufreq_policy *policy)
{
	int cpu_num = policy->cpu;
	struct cppc_cpudata *cpu = all_cpu_data[cpu_num];
	int ret;

	cpu->perf_ctrls.desired_perf = cpu->perf_caps.lowest_perf;

	ret = cppc_set_perf(cpu_num, &cpu->perf_ctrls);
	if (ret)
		pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
				cpu->perf_caps.lowest_perf, cpu_num, ret);
}

/*
 * The PCC subspace describes the rate at which platform can accept commands
 * on the shared PCC channel (including READs which do not count towards freq
 * trasition requests), so ideally we need to use the PCC values as a fallback
 * if we don't have a platform specific transition_delay_us
 */
#ifdef CONFIG_ARM64
#include <asm/cputype.h>

static unsigned int cppc_cpufreq_get_transition_delay_us(int cpu)
{
	unsigned long implementor = read_cpuid_implementor();
	unsigned long part_num = read_cpuid_part_number();
	unsigned int delay_us = 0;

	switch (implementor) {
	case ARM_CPU_IMP_QCOM:
		switch (part_num) {
		case QCOM_CPU_PART_FALKOR_V1:
		case QCOM_CPU_PART_FALKOR:
			delay_us = 10000;
			break;
		default:
			delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
			break;
		}
		break;
	default:
		delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
		break;
	}

	return delay_us;
}

#else

static unsigned int cppc_cpufreq_get_transition_delay_us(int cpu)
{
	return cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
}
#endif

static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
{
	struct cppc_cpudata *cpu;
	unsigned int cpu_num = policy->cpu;
	int ret = 0;

	cpu = all_cpu_data[policy->cpu];

	cpu->cpu = cpu_num;
	ret = cppc_get_perf_caps(policy->cpu, &cpu->perf_caps);

	if (ret) {
		pr_debug("Err reading CPU%d perf capabilities. ret:%d\n",
				cpu_num, ret);
		return ret;
	}

	cppc_dmi_max_khz = cppc_get_dmi_max_khz();

	/*
	 * Set min to lowest nonlinear perf to avoid any efficiency penalty (see
	 * Section 8.4.7.1.1.5 of ACPI 6.1 spec)
	 */
	policy->min = cpu->perf_caps.lowest_nonlinear_perf * cppc_dmi_max_khz /
		cpu->perf_caps.highest_perf;
	policy->max = cppc_dmi_max_khz;

	/*
	 * Set cpuinfo.min_freq to Lowest to make the full range of performance
	 * available if userspace wants to use any perf between lowest & lowest
	 * nonlinear perf
	 */
	policy->cpuinfo.min_freq = cpu->perf_caps.lowest_perf * cppc_dmi_max_khz /
		cpu->perf_caps.highest_perf;
	policy->cpuinfo.max_freq = cppc_dmi_max_khz;

	policy->cpuinfo.transition_latency = cppc_get_transition_latency(cpu_num);
	policy->transition_delay_us = cppc_cpufreq_get_transition_delay_us(cpu_num);
	policy->shared_type = cpu->shared_type;

	if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
		int i;

		cpumask_copy(policy->cpus, cpu->shared_cpu_map);

		for_each_cpu(i, policy->cpus) {
			if (unlikely(i == policy->cpu))
				continue;

			memcpy(&all_cpu_data[i]->perf_caps, &cpu->perf_caps,
			       sizeof(cpu->perf_caps));
		}
	} else if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL) {
		/* Support only SW_ANY for now. */
		pr_debug("Unsupported CPU co-ord type\n");
		return -EFAULT;
	}

	cpu->cur_policy = policy;

	/* Set policy->cur to max now. The governors will adjust later. */
	policy->cur = cppc_dmi_max_khz;
	cpu->perf_ctrls.desired_perf = cpu->perf_caps.highest_perf;

	ret = cppc_set_perf(cpu_num, &cpu->perf_ctrls);
	if (ret)
		pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
				cpu->perf_caps.highest_perf, cpu_num, ret);

	return ret;
}

static struct cpufreq_driver cppc_cpufreq_driver = {
	.flags = CPUFREQ_CONST_LOOPS,
	.verify = cppc_verify_policy,
	.target = cppc_cpufreq_set_target,
	.init = cppc_cpufreq_cpu_init,
	.stop_cpu = cppc_cpufreq_stop_cpu,
	.name = "cppc_cpufreq",
};

static int __init cppc_cpufreq_init(void)
{
	int i, ret = 0;
	struct cppc_cpudata *cpu;

	if (acpi_disabled)
		return -ENODEV;

	all_cpu_data = kzalloc(sizeof(void *) * num_possible_cpus(), GFP_KERNEL);
	if (!all_cpu_data)
		return -ENOMEM;

	for_each_possible_cpu(i) {
		all_cpu_data[i] = kzalloc(sizeof(struct cppc_cpudata), GFP_KERNEL);
		if (!all_cpu_data[i])
			goto out;

		cpu = all_cpu_data[i];
		if (!zalloc_cpumask_var(&cpu->shared_cpu_map, GFP_KERNEL))
			goto out;
	}

	ret = acpi_get_psd_map(all_cpu_data);
	if (ret) {
		pr_debug("Error parsing PSD data. Aborting cpufreq registration.\n");
		goto out;
	}

	ret = cpufreq_register_driver(&cppc_cpufreq_driver);
	if (ret)
		goto out;

	return ret;

out:
	for_each_possible_cpu(i) {
		cpu = all_cpu_data[i];
		if (!cpu)
			break;
		free_cpumask_var(cpu->shared_cpu_map);
		kfree(cpu);
	}

	kfree(all_cpu_data);
	return -ENODEV;
}

static void __exit cppc_cpufreq_exit(void)
{
	struct cppc_cpudata *cpu;
	int i;

	cpufreq_unregister_driver(&cppc_cpufreq_driver);

	for_each_possible_cpu(i) {
		cpu = all_cpu_data[i];
		free_cpumask_var(cpu->shared_cpu_map);
		kfree(cpu);
	}

	kfree(all_cpu_data);
}

module_exit(cppc_cpufreq_exit);
MODULE_AUTHOR("Ashwin Chaugule");
MODULE_DESCRIPTION("CPUFreq driver based on the ACPI CPPC v5.0+ spec");
MODULE_LICENSE("GPL");

late_initcall(cppc_cpufreq_init);

static const struct acpi_device_id cppc_acpi_ids[] = {
	{ACPI_PROCESSOR_DEVICE_HID, },
	{}
};

MODULE_DEVICE_TABLE(acpi, cppc_acpi_ids);
Commit	Line	Data
5477fb3b AC	1	/*
	2	* CPPC (Collaborative Processor Performance Control) driver for
	3	* interfacing with the CPUfreq layer and governors. See
	4	* cppc_acpi.c for CPPC specific methods.
	5	*
	6	* (C) Copyright 2014, 2015 Linaro Ltd.
	7	* Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* as published by the Free Software Foundation; version 2
	12	* of the License.
	13	*/
	14
	15	#define pr_fmt(fmt) "CPPC Cpufreq:" fmt
	16
	17	#include <linux/kernel.h>
	18	#include <linux/module.h>
	19	#include <linux/delay.h>
	20	#include <linux/cpu.h>
	21	#include <linux/cpufreq.h>
ad38677d	22	#include <linux/dmi.h>
f1e90bf9	23	#include <linux/time.h>
5477fb3b AC	24	#include <linux/vmalloc.h>
5477fb3b AC	25
ad38677d AS	26	#include <asm/unaligned.h>
ad38677d AS	27
5477fb3b AC	28	#include <acpi/cppc_acpi.h>
5477fb3b AC	29
ad38677d AS	30	/* Minimum struct length needed for the DMI processor entry we want */
	31	#define DMI_ENTRY_PROCESSOR_MIN_LENGTH 48
	32
	33	/* Offest in the DMI processor structure for the max frequency */
	34	#define DMI_PROCESSOR_MAX_SPEED 0x14
	35
5477fb3b AC	36	/*
	37	* These structs contain information parsed from per CPU
	38	* ACPI _CPC structures.
	39	* e.g. For each CPU the highest, lowest supported
	40	* performance capabilities, desired performance level
	41	* requested etc.
	42	*/
41dd6403	43	static struct cppc_cpudata **all_cpu_data;
5477fb3b	44
ad38677d AS	45	/* Capture the max KHz from DMI */
	46	static u64 cppc_dmi_max_khz;
	47
	48	/* Callback function used to retrieve the max frequency from DMI */
	49	static void cppc_find_dmi_mhz(const struct dmi_header dm, void private)
	50	{
	51	const u8 dmi_data = (const u8 )dm;
	52	u16 mhz = (u16 )private;
	53
	54	if (dm->type == DMI_ENTRY_PROCESSOR &&
	55	dm->length >= DMI_ENTRY_PROCESSOR_MIN_LENGTH) {
	56	u16 val = (u16)get_unaligned((const u16 *)
	57	(dmi_data + DMI_PROCESSOR_MAX_SPEED));
	58	mhz = val > mhz ? val : *mhz;
	59	}
	60	}
	61
	62	/* Look up the max frequency in DMI */
	63	static u64 cppc_get_dmi_max_khz(void)
	64	{
	65	u16 mhz = 0;
	66
	67	dmi_walk(cppc_find_dmi_mhz, &mhz);
	68
	69	/*
	70	* Real stupid fallback value, just in case there is no
	71	* actual value set.
	72	*/
	73	mhz = mhz ? mhz : 1;
	74
	75	return (1000 * mhz);
	76	}
	77
5477fb3b AC	78	static int cppc_cpufreq_set_target(struct cpufreq_policy *policy,
	79	unsigned int target_freq,
	80	unsigned int relation)
	81	{
41dd6403	82	struct cppc_cpudata *cpu;
5477fb3b	83	struct cpufreq_freqs freqs;
c197d758	84	u32 desired_perf;
5477fb3b AC	85	int ret = 0;
	86
	87	cpu = all_cpu_data[policy->cpu];
	88
c197d758 HT	89	desired_perf = (u64)target_freq * cpu->perf_caps.highest_perf / cppc_dmi_max_khz;
	90	/* Return if it is exactly the same perf */
	91	if (desired_perf == cpu->perf_ctrls.desired_perf)
	92	return ret;
	93
	94	cpu->perf_ctrls.desired_perf = desired_perf;
5477fb3b AC	95	freqs.old = policy->cur;
	96	freqs.new = target_freq;
	97
	98	cpufreq_freq_transition_begin(policy, &freqs);
	99	ret = cppc_set_perf(cpu->cpu, &cpu->perf_ctrls);
	100	cpufreq_freq_transition_end(policy, &freqs, ret != 0);
	101
	102	if (ret)
	103	pr_debug("Failed to set target on CPU:%d. ret:%d\n",
	104	cpu->cpu, ret);
	105
	106	return ret;
	107	}
	108
	109	static int cppc_verify_policy(struct cpufreq_policy *policy)
	110	{
	111	cpufreq_verify_within_cpu_limits(policy);
	112	return 0;
	113	}
	114
	115	static void cppc_cpufreq_stop_cpu(struct cpufreq_policy *policy)
	116	{
	117	int cpu_num = policy->cpu;
41dd6403	118	struct cppc_cpudata *cpu = all_cpu_data[cpu_num];
5477fb3b AC	119	int ret;
	120
	121	cpu->perf_ctrls.desired_perf = cpu->perf_caps.lowest_perf;
	122
	123	ret = cppc_set_perf(cpu_num, &cpu->perf_ctrls);
	124	if (ret)
	125	pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
	126	cpu->perf_caps.lowest_perf, cpu_num, ret);
	127	}
	128
1083a7e8 PP	129	/*
	130	* The PCC subspace describes the rate at which platform can accept commands
	131	* on the shared PCC channel (including READs which do not count towards freq
	132	* trasition requests), so ideally we need to use the PCC values as a fallback
	133	* if we don't have a platform specific transition_delay_us
	134	*/
	135	#ifdef CONFIG_ARM64
	136	#include <asm/cputype.h>
	137
	138	static unsigned int cppc_cpufreq_get_transition_delay_us(int cpu)
	139	{
	140	unsigned long implementor = read_cpuid_implementor();
	141	unsigned long part_num = read_cpuid_part_number();
	142	unsigned int delay_us = 0;
	143
	144	switch (implementor) {
	145	case ARM_CPU_IMP_QCOM:
	146	switch (part_num) {
	147	case QCOM_CPU_PART_FALKOR_V1:
	148	case QCOM_CPU_PART_FALKOR:
	149	delay_us = 10000;
	150	break;
	151	default:
	152	delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
	153	break;
	154	}
	155	break;
	156	default:
	157	delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
	158	break;
	159	}
	160
	161	return delay_us;
	162	}
	163
	164	#else
	165
	166	static unsigned int cppc_cpufreq_get_transition_delay_us(int cpu)
	167	{
	168	return cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
	169	}
	170	#endif
	171
5477fb3b AC	172	static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
5477fb3b AC	173	{
41dd6403	174	struct cppc_cpudata *cpu;
5477fb3b AC	175	unsigned int cpu_num = policy->cpu;
	176	int ret = 0;
	177
	178	cpu = all_cpu_data[policy->cpu];
	179
	180	cpu->cpu = cpu_num;
	181	ret = cppc_get_perf_caps(policy->cpu, &cpu->perf_caps);
	182
	183	if (ret) {
	184	pr_debug("Err reading CPU%d perf capabilities. ret:%d\n",
	185	cpu_num, ret);
	186	return ret;
	187	}
	188
ad38677d AS	189	cppc_dmi_max_khz = cppc_get_dmi_max_khz();
ad38677d AS	190
73808d0f PP	191	/*
	192	* Set min to lowest nonlinear perf to avoid any efficiency penalty (see
	193	* Section 8.4.7.1.1.5 of ACPI 6.1 spec)
	194	*/
	195	policy->min = cpu->perf_caps.lowest_nonlinear_perf * cppc_dmi_max_khz /
	196	cpu->perf_caps.highest_perf;
ad38677d	197	policy->max = cppc_dmi_max_khz;
73808d0f PP	198
	199	/*
	200	* Set cpuinfo.min_freq to Lowest to make the full range of performance
	201	* available if userspace wants to use any perf between lowest & lowest
	202	* nonlinear perf
	203	*/
	204	policy->cpuinfo.min_freq = cpu->perf_caps.lowest_perf * cppc_dmi_max_khz /
	205	cpu->perf_caps.highest_perf;
	206	policy->cpuinfo.max_freq = cppc_dmi_max_khz;
	207
be8b88d7	208	policy->cpuinfo.transition_latency = cppc_get_transition_latency(cpu_num);
1083a7e8	209	policy->transition_delay_us = cppc_cpufreq_get_transition_delay_us(cpu_num);
9dc17917	210	policy->shared_type = cpu->shared_type;
5477fb3b	211
96fdc64d SY	212	if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
	213	int i;
	214
5477fb3b	215	cpumask_copy(policy->cpus, cpu->shared_cpu_map);
96fdc64d SY	216
	217	for_each_cpu(i, policy->cpus) {
	218	if (unlikely(i == policy->cpu))
	219	continue;
	220
	221	memcpy(&all_cpu_data[i]->perf_caps, &cpu->perf_caps,
	222	sizeof(cpu->perf_caps));
	223	}
	224	} else if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL) {
5477fb3b AC	225	/* Support only SW_ANY for now. */
	226	pr_debug("Unsupported CPU co-ord type\n");
	227	return -EFAULT;
	228	}
	229
5477fb3b AC	230	cpu->cur_policy = policy;
	231
	232	/* Set policy->cur to max now. The governors will adjust later. */
ad38677d AS	233	policy->cur = cppc_dmi_max_khz;
ad38677d AS	234	cpu->perf_ctrls.desired_perf = cpu->perf_caps.highest_perf;
5477fb3b AC	235
	236	ret = cppc_set_perf(cpu_num, &cpu->perf_ctrls);
	237	if (ret)
	238	pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
	239	cpu->perf_caps.highest_perf, cpu_num, ret);
	240
	241	return ret;
	242	}
	243
	244	static struct cpufreq_driver cppc_cpufreq_driver = {
	245	.flags = CPUFREQ_CONST_LOOPS,
	246	.verify = cppc_verify_policy,
	247	.target = cppc_cpufreq_set_target,
	248	.init = cppc_cpufreq_cpu_init,
	249	.stop_cpu = cppc_cpufreq_stop_cpu,
	250	.name = "cppc_cpufreq",
	251	};
	252
	253	static int __init cppc_cpufreq_init(void)
	254	{
	255	int i, ret = 0;
41dd6403	256	struct cppc_cpudata *cpu;
5477fb3b AC	257
	258	if (acpi_disabled)
	259	return -ENODEV;
	260
	261	all_cpu_data = kzalloc(sizeof(void ) num_possible_cpus(), GFP_KERNEL);
	262	if (!all_cpu_data)
	263	return -ENOMEM;
	264
	265	for_each_possible_cpu(i) {
41dd6403	266	all_cpu_data[i] = kzalloc(sizeof(struct cppc_cpudata), GFP_KERNEL);
5477fb3b AC	267	if (!all_cpu_data[i])
	268	goto out;
	269
	270	cpu = all_cpu_data[i];
	271	if (!zalloc_cpumask_var(&cpu->shared_cpu_map, GFP_KERNEL))
	272	goto out;
	273	}
	274
	275	ret = acpi_get_psd_map(all_cpu_data);
	276	if (ret) {
	277	pr_debug("Error parsing PSD data. Aborting cpufreq registration.\n");
	278	goto out;
	279	}
	280
	281	ret = cpufreq_register_driver(&cppc_cpufreq_driver);
	282	if (ret)
	283	goto out;
	284
	285	return ret;
	286
	287	out:
4a8b1c46 CH	288	for_each_possible_cpu(i) {
	289	cpu = all_cpu_data[i];
	290	if (!cpu)
	291	break;
	292	free_cpumask_var(cpu->shared_cpu_map);
	293	kfree(cpu);
	294	}
5477fb3b AC	295
	296	kfree(all_cpu_data);
	297	return -ENODEV;
	298	}
	299
a29a1e76 AC	300	static void __exit cppc_cpufreq_exit(void)
a29a1e76 AC	301	{
41dd6403	302	struct cppc_cpudata *cpu;
a29a1e76 AC	303	int i;
	304
	305	cpufreq_unregister_driver(&cppc_cpufreq_driver);
	306
	307	for_each_possible_cpu(i) {
	308	cpu = all_cpu_data[i];
	309	free_cpumask_var(cpu->shared_cpu_map);
	310	kfree(cpu);
	311	}
	312
	313	kfree(all_cpu_data);
	314	}
	315
	316	module_exit(cppc_cpufreq_exit);
	317	MODULE_AUTHOR("Ashwin Chaugule");
	318	MODULE_DESCRIPTION("CPUFreq driver based on the ACPI CPPC v5.0+ spec");
	319	MODULE_LICENSE("GPL");
	320
5477fb3b	321	late_initcall(cppc_cpufreq_init);
974f8649 PP	322
	323	static const struct acpi_device_id cppc_acpi_ids[] = {
	324	{ACPI_PROCESSOR_DEVICE_HID, },
	325	{}
	326	};
	327
	328	MODULE_DEVICE_TABLE(acpi, cppc_acpi_ids);